Search results for: digital filter design

Authors: Ju-Hong Lee, Chong-Jia Ciou, Yuan-Hau Yang

Abstract:

This paper deals with the problem of two-dimensional (2-D) recursive doubly complementary (DC) digital filter design. We present a structure of 2-D recursive DC filters by using 2-D symmetric half-plane (SHP) recursive digital all-pass lattice filters (DALFs). The novelty of using 2-D SHP recursive DALFs to construct a 2-D recursive DC digital lattice filter is that the resulting 2-D SHP recursive DC digital lattice filter provides better performance than the existing 2-D SHP recursive DC digital filter. Moreover, the proposed structure possesses a favorable 2-D DC half-band (DC-HB) property that allows about half of the 2-D SHP recursive DALF’s coefficients to be zero. This leads to considerable savings in computational burden for implementation. To ensure the stability of a designed 2-D SHP recursive DC digital lattice filter, some necessary constraints on the phase of the 2-D SHP recursive DALF during the design process are presented. Design of a 2-D diamond-shape decimation/interpolation filter is presented for illustration and comparison.

Keywords: all-pass digital filter, doubly complementary, lattice structure, symmetric half-plane digital filter, sampling rate conversion

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Authors: Jong-Jy Shyu, Soo-Chang Pei, Yun-Da Huang

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In this paper, design of wide-range variable fractional-delay (WR-VFD) finite impulse response (FIR) digital filters is proposed. With respect to the conventional VFD filter which is designed such that its delay is adjustable within one unit, the proposed VFD FIR filter is designed such that its delay can be tunable within a wider range. By the traces of coefficients of the fractional-delay FIR filter, it is found that the conventional method of polynomial substitution for filter coefficients no longer satisfies the design demand, and the circuits perform the sinc function (sinc converter) are added to overcome this problem. In this paper, least-squares method is adopted to design WR-VFD FIR filter. Throughout this paper, several examples will be proposed to demonstrate the effectiveness of the presented methods.

Keywords: digital filter, FIR filter, variable fractional-delay (VFD) filter, least-squares approximation

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Authors: Phuoc Si Nguyen

Abstract:

Frequency transformation with Pascal matrix equations is a method for transforming an electronic filter (analogue or digital) into another filter. The technique is based on frequency transformation in the s-domain, bilinear z-transform with pre-warping frequency, inverse bilinear transformation and a very useful application of the Pascal’s triangle that simplifies computing and enables calculation by hand when transforming from one filter to another. This paper will introduce two methods to transform a filter into a digital filter: frequency transformation from the s-domain into the z-domain; and frequency transformation in the z-domain. Further, two Pascal matrix equations are derived: an analogue to digital filter Pascal matrix equation and a digital to digital filter Pascal matrix equation. These are used to design a desired digital filter from a given filter.

Keywords: frequency transformation, bilinear z-transformation, pre-warping frequency, digital filters, analog filters, pascal’s triangle

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Authors: Phuoc Si Nguyen

Abstract:

Infinite impulse response (IIR) filters can be designed from an analogue low pass prototype by using frequency transformation in the s-domain and bilinear z-transformation with pre-warping frequency; this method is known as frequency transformation from the s-domain to the z-domain. This paper will introduce a new method to transform an IIR digital filter to another type of IIR digital filter (low pass, high pass, band pass, band stop or narrow band) using a technique based on inverse bilinear z-transformation and inverse matrices. First, a matrix equation is derived from inverse bilinear z-transformation and Pascal’s triangle. This Low Pass Digital to Digital Filter Pascal Matrix Equation is used to transform a low pass digital filter to other digital filter types. From this equation and the inverse matrix, a Digital to Digital Filter Pascal Matrix Equation can be derived that is able to transform any IIR digital filter. This paper will also introduce some specific matrices to replace the inverse matrix, which is difficult to determine due to the larger size of the matrix in the current method. This will make computing and hand calculation easier when transforming from one IIR digital filter to another in the digital domain.

Keywords: bilinear z-transformation, frequency transformation, inverse bilinear z-transformation, IIR digital filters

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Authors: Ju-Hong Lee, Ding-Chen Chung

Abstract:

This paper deals with the optimal design of recursive doubly complementary (DC) digital filter design using a metaheuristic based optimization technique. Based on the theory of DC digital filters using two recursive digital all-pass filters (DAFs), the design problem is appropriately formulated to result in an objective function which is a weighted sum of the phase response errors of the designed DAFs. To deal with the stability of the recursive DC filters during the design process, we can either impose some necessary constraints on the phases of the recursive DAFs. Through a frequency sampling and a weighted least squares approach, the optimization problem of the objective function can be solved by utilizing a population based stochastic optimization approach. The resulting DC digital filters can possess satisfactory frequency response. Simulation results are presented for illustration and comparison.

Keywords: doubly complementary, digital all-pass filter, weighted least squares algorithm, particle swarm optimization

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Authors: J. S. Dhillon, K. K. Dhaliwal

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In almost all the digital filtering applications the digital infinite impulse response (IIR) filters are preferred over finite impulse response (FIR) filters because they provide much better performance, less computational cost and have smaller memory requirements for similar magnitude specifications. However, the digital IIR filters are generally multimodal with respect to the filter coefficients and therefore, reliable methods that can provide global optimal solutions are required. The artificial bee colony (ABC) algorithm is one such recently introduced meta-heuristic optimization algorithm. But in some cases it shows insufficiency while searching the solution space resulting in a weak exchange of information and hence is not able to return better solutions. To overcome this deficiency, the opposition based learning strategy is incorporated in ABC and hence a modified version called oppositional artificial bee colony (OABC) algorithm is proposed in this paper. Duplication of members is avoided during the run which also augments the exploration ability. The developed algorithm is then applied for the design of optimal and stable digital IIR filter structure where design of low-pass (LP) and high-pass (HP) filters is carried out. Fuzzy theory is applied to achieve maximize satisfaction of minimum magnitude error and stability constraints. To check the effectiveness of OABC, the results are compared with some well established filter design techniques and it is observed that in most cases OABC returns better or atleast comparable results.

Keywords: digital infinite impulse response filter, artificial bee colony optimization, opposition based learning, digital filter design, multi-parameter optimization

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Authors: Ju-Hong Lee, Chong-Jia Ciou

Abstract:

This paper deals with the problem of two-dimensional (2-D) recursive two-channel quincunx quadrature mirror filter (QQMF) banks design. The analysis and synthesis filters of the 2-D recursive QQMF bank are composed of 2-D recursive digital allpass lattice filters (DALFs) with symmetric half-plane (SHP) support regions. Using the 2-D doubly complementary half-band (DC-HB) property possessed by the analysis and synthesis filters, we facilitate the design of the proposed QQMF bank. For finding the coefficients of the 2-D recursive SHP DALFs, we present a structure of 2-D recursive digital allpass filters by using 2-D SHP recursive digital all-pass lattice filters (DALFs). The novelty of using 2-D SHP recursive DALFs to construct a 2-D recursive QQMF bank is that the resulting 2-D recursive QQMF bank provides better performance than the existing 2-D recursive QQMF banks. Simulation results are also presented for illustration and comparison.

Keywords: all-pass digital filter, lattice structure, quincunx QMF bank, symmetric half-plane digital filter

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Authors: Thiago Brito Bezerra

Abstract:

This paper presents a novel approach to reduce power consumption of digital filters based on dynamic bypassing of partial products in their multipliers. The bypassing elements incorporated into the multiplier hardware eliminate redundant signal transitions, which appear within the carry-save adders when the partial product is zero. This technique reduces the power consumption by around 20%. The circuit implementation was made using the AMS 0.18 um technology. The bypassing technique applied to the circuits is outlined.

Keywords: digital filter, low-power, bypassing technique, low-pass filter

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Authors: Ju-Hong Lee, Ding-Chen Chung

Abstract:

The paper deals with the optimal design of two-channel linear-phase (LP) quadrature mirror filter (QMF) banks using a metaheuristic based optimization technique. Based on the theory of two-channel QMF banks using two recursive digital all-pass filters (DAFs), the design problem is appropriately formulated to result in an objective function which is a weighted sum of the group delay error of the designed QMF bank and the magnitude response error of the designed low-pass analysis filter. Through a frequency sampling and a weighted least squares approach, the optimization problem of the objective function can be solved by utilizing a particle swarm optimization algorithm. The resulting two-channel QMF banks can possess approximately LP response without magnitude distortion. Simulation results are presented for illustration and comparison.

Keywords: quadrature mirror filter bank, digital all-pass filter, weighted least squares algorithm, particle swarm optimization

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Authors: Mohamad Farhat, Bal Virdee

Abstract:

This paper present a compact Microstrip Bandpass filter exhibiting a very wide stop band and high selectivity. The filter comprises of asymmetric resonator structures, which are interconnected by an inter-digital capacitor to enable the realization of a wide bandwidth with high rejection level. High selectivity is obtained by optimizing the parameters of the interdigital capacitor. The filter has high out-of-band rejection (> 30 dB), less than 0.6 dB of insertion-loss, up to 5.5 GHz spurii free, and about 18 dB of return-loss. Full-wave electromagnetic simulator ADSTM (Mom) is used to analyze and optimize the prototype bandpass filter. The proposed technique was verified practically to validate the design methodology. The experimental results of the prototype circuit are presented and a good agreement was obtained comparing with the simulation results. The dimensions of the proposed filter are 32 x 24 mm2.The filter’s characteristics and compact size make it suitable for wireless communication systems.

Keywords: asymmetric resonator, bandpass filter, microstrip, spurious suppression, ultra-wide stop band

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Authors: Wilhelm Hoeflinger, Thomas Laminger, Johannes Wolfslehner

Abstract:

For vacuum cleaned dust filters, used e. g. in textile industry, there exist no calculation methods to determine design parameters (e. g. traverse speed of the nozzle, filter area...). In this work a method to calculate the optimum traverse speed of the nozzle of an industrial-size flat dust filter at a given mean pressure drop and filter face velocity was elaborated. Well-known equations for the design of a cleanable multi-chamber bag-house-filter were modified in order to take into account a continuously regeneration of a dust filter by a nozzle. Thereby, the specific filter medium resistance and the specific cake resistance values are needed which can be derived from filter tests under constant operation conditions. A lab-scale filter test rig was used to derive the specific filter media resistance value and the specific cake resistance value for vacuum cleaned filter operation. Three different filter media were tested and the determined parameters were compared to each other.

Keywords: design of dust filter, dust removing, filter regeneration, operation parameters

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Authors: M. Iruleswari, A. Jeyapaul Murugan

Abstract:

Most fundamental part used in many Digital Signal Processing (DSP) application is a Finite Impulse Response (FIR) filter because of its linear phase, stability and regular structure. Designing a high-speed and hardware efficient FIR filter is a very challenging task as the complexity increases with the filter order. In most applications the higher order filters are required but the memory usage of the filter increases exponentially with the order of the filter. Using multipliers occupy a large chip area and need high computation time. Multiplier-less memory-based techniques have gained popularity over past two decades due to their high throughput processing capability and reduced dynamic power consumption. This paper describes the design and implementation of highly efficient Look-Up Table (LUT) based circuit for the implementation of FIR filter using Distributed arithmetic algorithm. It is a multiplier less FIR filter. The LUT can be subdivided into a number of LUT to reduce the memory usage of the LUT for higher order filter. Analysis on the performance of various filter orders with different address length is done using Xilinx 14.5 synthesis tool. The proposed design provides less latency, less memory usage and high throughput.

Keywords: finite impulse response, distributed arithmetic, field programmable gate array, look-up table

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Authors: Kah-Hyong Chang, Xin Liu, Jia Hao Cheong, Saisundar Sankaranarayanan, Dexing Pang, Hongzhao Zheng

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A digital baseband Application-Specific Integrated Circuit (ASIC) is developed for a microchip transponder to transmit signals and temperature levels from biomedical monitoring devices. The transmission protocol is adapted from the ISO/IEC 11784/85 standard. The module has a decimation filter that employs only a single adder-subtractor in its datapath. The filtered output is coded with cyclic redundancy check and transmitted through backscattering Load Shift Keying (LSK) modulation to a reader. Fabricated using the 0.18-μm CMOS technology, the module occupies 0.116 mm² in chip area (digital baseband: 0.060 mm², decimation filter: 0.056 mm²), and consumes a total of less than 0.9 μW of power (digital baseband: 0.75 μW, decimation filter: 0.14 μW).

Keywords: biomedical sensor, decimation filter, radio frequency integrated circuit (RFIC) baseband, temperature sensor

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Authors: N. Azadi-Tinat, H. Oraizi

Abstract:

Design of compact UWB multilayered microstrip filter with E-shape resonator is presented, which provides wide stopband up to 20 GHz and arbitrary impedance matching. The design procedure is developed based on the method of least squares and theory of N-coupled transmission lines. The dimensions of designed filter are about 11 mm × 11 mm and the three E-shape resonators are placed among four dielectric layers. The average insertion loss in the passband is less than 1 dB and in the stopband is about 30 dB up to 20 GHz. Its group delay in the UWB region is about 0.5 ns. The performance of the optimized filter design perfectly agrees with the microwave simulation softwares.

Keywords: method of least square, multilayer microstrip filter, n-coupled transmission lines, ultra-wideband

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Authors: Fawzia Al-Sakeer, Hassan Aldeeb

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Development in the communications field is proceeding at an amazing speed, which has led researchers to improve and develop electronic circuits by increasing their efficiency and reducing their size to reduce the weight of electronic devices. One of the most important of these circuits is the band-pass filter, which is what made us carry out this research, which aims to use an alternate technology to design a dual band-pass filter by using a stepped impedance microstrip transmission line. We designed a filter that works at two center frequency bands by designing with the ADS program, and the results were excellent, as we obtained the two design frequencies, which are 1 and 3GHz, and the values of insertion loss S11, which was more than 21dB with a small area.

Keywords: band pass filter, dual band band-pass filter, ADS, microstrip filter, stepped impedance

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Authors: Ju-Hong Lee, Yi-Lin Shieh

Abstract:

Two-dimensional (2-D) quadrature mirror filter (QMF) banks have been widely considered for high-quality coding of image and video data at low bit rates. Without implementing subband coding, a 2-D QMF bank is required to have an exactly linear-phase response without magnitude distortion, i.e., the perfect reconstruction (PR) characteristics. The design problem of 2-D QMF banks with the PR characteristics has been considered in the literature for many years. This paper presents a transformation approach for designing 2-D two-channel QMF banks. Under a suitable one-dimensional (1-D) to two-dimensional (2-D) transformation with a specified decimation/interpolation matrix, the analysis and synthesis filters of the QMF bank are composed of 1-D causal and stable digital allpass filters (DAFs) and possess the 2-D doubly complementary half-band (DC-HB) property. This facilitates the design problem of the two-channel QMF banks by finding the real coefficients of the 1-D recursive DAFs. The design problem is formulated based on the minimax phase approximation for the 1-D DAFs. A novel objective function is then derived to obtain an optimization for 1-D minimax phase approximation. As a result, the problem of minimizing the objective function can be simply solved by using the well-known weighted least-squares (WLS) algorithm in the minimax (L∞) optimal sense. The novelty of the proposed design method is that the design procedure is very simple and the designed 2-D QMF bank achieves perfect magnitude response and possesses satisfactory phase response. Simulation results show that the proposed design method provides much better design performance and much less design complexity as compared with the existing techniques.

Keywords: Quincunx QMF bank, doubly complementary filter, digital allpass filter, WLS algorithm

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Authors: Guillermo Cardoso-Landa, Ana Julita Cuenca-Castro

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The present paper focuses to research the possible causes of curtain failure of dam "El Batan" in Querétaro, Mexico, including the design of the fineness of the employee filter during the construction of the curtain was verified since this depends greatly on the proper functioning of this filter. To carry out the required analysis, it was necessary to document elements provided understanding about the composition and behavior of the land curtain, and the main types of failure in these curtains. The general characteristics of the curtain dam "El Batan", the composition of the filter, as well as possible causes resulted in the failure were also analyzed. Once obtained data starting, the actual analysis was carried out by reviewing the following possible causes of failure: fails due to a poor constructive process of the curtain, failure due to hydraulic suppression, fails due to a structural design wrong, fails due to a geotechnical design wrong, fails due to a hydraulic design wrong, fails due to an inadequate design of the curtain filter. It is concluded that the type of the filter employed in the land dam curtain of "El Batan", located in the municipality of Querétaro, México, do not have adequate characteristics, outside of the ranges of design, using the curves: Terzaghi criteria, Sherard and Dunnigan criteria, UCSCS criteria, and Foster and Fell criteria.

Keywords: failure, dam, filter, curtain

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Authors: Shiksha Jain, Ramesh Mishra

Abstract:

One of the most widely used complex signals processing operation is filtering. The most important FIR digital filter are widely used in DSP for filtering to alter the spectrum according to some given specifications. Power consumption and Area complexity in the algorithm of Finite Impulse Response (FIR) filter is mainly caused by multipliers. So we present a multiplier less technique (DA technique). In this technique, precomputed value of inner product is stored in LUT. Which are further added and shifted with number of iterations equal to the precision of input sample. But the exponential growth of LUT with the order of FIR filter, in this basic structure, makes it prohibitive for many applications. The significant area and power reduction over traditional Distributed Arithmetic (DA) structure is presented in this paper, by the use of slicing of LUT to the desired length. An architecture of 16 tap FIR filter is presented, with different length of slice of LUT. The result of FIR Filter implementation on Xilinx ISE synthesis tool (XST) vertex-4 FPGA Tool by using proposed method shows the increase of the maximum frequency, the decrease of the resources as usage saving in area with more number of slices and the reduction dynamic power.

Keywords: multiplier less technique, linear phase symmetric FIR filter, FPGA tool, look up table

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Authors: Misbahuddin Mahammad, P. Chandra Sekhar, Metuku Shyamsunder

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The oversampled output of a sigma-delta modulator is decimated to Nyquist sampling rate by decimation filters. The decimation filters work twofold; they decimate the sampling rate by a factor of OSR (oversampling rate) and they remove the out band quantization noise resulting in an increase in resolution. The speed, area and power consumption of oversampled converter are governed largely by decimation filters in sigma-delta A/D converters. The scope of the work is to design a decimation filter for sigma-delta ADC and simulation using MATLAB. The decimation filter structure is based on cascaded-integrated comb (CIC) filter. A second decimation filter is using CIC for large rate change and cascaded FIR filters, for small rate changes, to improve the frequency response. The proposed structure is even more hardware efficient.

Keywords: sigma delta modulator, CIC filter, decimation filter, compensation filter, noise shaping

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Authors: Rajesh Mehra, Bharti Thakur

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In this paper, an IIR filter has been designed and simulated on an FPGA. The implementation is based on MAC algorithm which uses multiply-and-accumulate operations IIR filter design implementation. Parallel Pipelined structure is used to implement the proposed IIR Filter taking optimal advantage of the look up table of the FPGA device. The designed filter has been synthesized on DSP slice based FPGA to perform multiplier function of MAC unit. The DSP slices are useful to enhance the speed performance. The developed IIR filter is designed and simulated with Matlab and synthesized with Xilinx Synthesis Tool (XST), and implemented on Virtex 5 and Spartan 3 ADSP FPGA devices. The IIR filter implemented on Virtex 5 FPGA can operate at an estimated frequency of 81.5 MHz as compared to 40.5 MHz in case of Spartan 3 ADSP FPGA. The Virtex 5 based implementation also consumes less slices and slice flip flops of target FPGA in comparison to Spartan 3 ADSP based implementation to provide cost effective solution for signal processing applications.

Keywords: Butterworth filter, DSP, IIR, MAC, FPGA

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Authors: Taha Ahmed Özbey, Sedat Nazlıbilek, Alparslan Çağrı Yapıcı

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Combline cavity filters have gained significant attention in recent years due to their exceptional narrowband characteristics, high unloaded Q, remarkable out-of-band rejection, and versatile post-manufacturing tuning capabilities. These filters play a vital role in various wireless communication systems, radar applications, and other advanced technologies where stringent frequency selectivity and superior performance are required. This paper represents combined cavity filter design and implementation by coupling matrix synthesis. Limited filter length, 50 dB out-of-band rejection, and agile design were aimed. To do so, CAD tools and intuitive methods were used.

Keywords: cavity, band pass filter, cavity combline filter, coupling matrix synthesis

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Authors: Avelino Marques, Diamantino Freitas

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Some important electroacoustic systems, like loudspeaker systems, exhibit a nonminimum phase behavior that poses considerable effort when applying advanced digital signal processing techniques, such as linear equalization. In this paper, the position and the number of zeros and poles of the inverse filter, FIR type or IIR type, designed using time domain techniques, are studied, compared and related to the nonminimum phase zeros of system to be equalized. Conclusions about the impact of the position of the system non-minimum phase zeros, on the length/order of the inverse filter and on the delay of the equalized system are outlined as a guide to previously decide which type of filter will be more adequate.

Keywords: loudspeaker systems, nonminimum phase system, FIR and IIR filter, delay

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Authors: Muhammad Yasir Wadood, Fatemeh Babaeian

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By developing ultra-wideband (UWB) systems, there is a high demand for UWB filters with low insertion loss, wide bandwidth, and having a planar structure which is compatible with other components of the UWB system. A microstrip interdigital filter is a great option for designing UWB filters. However, the presence of via holes in this structure creates difficulties in the fabrication procedure of the filter. Especially in the higher frequency band, any misalignment of the drilled via hole with the Microstrip stubs causes large errors in the measurement results compared to the desired results. Moreover, in this case (high-frequency designs), the line width of the stubs are very narrow, so highly precise small via holes are required to be implemented, which increases the cost of fabrication significantly. Also, in this case, there is a risk of having fabrication errors. To combat this issue, in this paper, a via-less UWB microstrip filter is proposed which is designed based on a modification of a conventional inter-digital bandpass filter. The novel approaches in this filter design are 1) replacement of each via hole with a quarter-wavelength open circuit stub to avoid the complexity of manufacturing, 2) using a bend structure to reduce the unwanted coupling effects and 3) minimising the size. Using the proposed structure, a UWB filter operating in the frequency band of 3.9-6.6 GHz (1-dB bandwidth) is designed and fabricated. The promising results of the simulation and measurement are presented in this paper. The selected substrate for these designs was Rogers RO4003 with a thickness of 20 mils. This is a common substrate in most of the industrial projects. The compact size of the proposed filter is highly beneficial for applications which require a very miniature size of hardware.

Keywords: band-pass filters, inter-digital filter, microstrip, via-less

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Authors: Rajesh Mehra

Abstract:

In this paper an IIR filter has been designed and simulated on an FPGA. The implementation is based on MAC algorithm which uses multiply-and-accumulate operations IIR filter design implementation. Parallel Pipelined structure is used to implement the proposed IIR Filter taking optimal advantage of the look up table of the FPGA device. The designed filter has been synthesized on DSP slice based FPGA to perform multiplier function of MAC unit. The DSP slices are useful to enhance the speed performance. The developed IIR filter is designed and simulated with MATLAB and synthesized with Xilinx Synthesis Tool (XST), and implemented on Virtex 5 and Spartan 3 ADSP FPGA devices. The IIR filter implemented on Virtex 5 FPGA can operate at an estimated frequency of 81.5 MHz as compared to 40.5 MHz in case of Spartan 3 ADSP FPGA. The Virtex 5 based implementation also consumes less slices and slice flip flops of target FPGA in comparison to Spartan 3 ADSP based implementation to provide cost effective solution for signal processing applications.

Keywords: butterworth, DSP, IIR, MAC, FPGA

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Authors: Sivaraman Karthikeyan

Abstract:

Due to rapidly developing power electronics devices and technologies such as power line communication or self-commutating converters, voltage and current distortion, as well as interferences, have increased in the frequency range of 2 kHz to 150 kHz; there is an urgent need for regulation of electromagnetic compatibility (EMC) standards in this frequency range. Measuring or testing compliance with emission and immunity limitations necessitates the use of precise, repeatable measuring methods. Appropriate filters to minimize the fundamental component and its harmonics below 2 kHz in the measuring signal would improve the measurement accuracy in this frequency range leading to better analysis. This paper discusses filter suggestions in the current measurement standard and proposes an infinite impulse response (IIR) filter design that is optimized for a low number of poles, strong fundamental damping, and high accuracy above 2 kHz. The new filter’s transfer function is delivered as a result. An analog implementation is derived from the overall design.

Keywords: supraharmonics, 2 kHz, 150 kHz, filter, analog filter

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Authors: Liew Hui Fang, Syed Idris Syed Hassan, Mohd Fareq Abd. Malek, Yufridin Wahab, Norshafinash Saudin

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The paper implementation new approach method applied into transforming lumped element circuit into microstrip line form for Butterworth low pass filter which is operating at LC band. The filter’s lumped element circuits and microstrip line form were first designed and simulated using Advanced Design Software (ADS) to obtain the best filter characteristic based on S-parameter and implemented on FR4 substrate for order N=3,4,5,6,7,8 and 9. The importance of a new approach of transforming method as a correction factor has been considered into designed microstrip line. From ADS simulation results proved that the response of microstrip line circuit of Butterworth low pass filter with fringing correction factor has an excellent agreement with its lumped circuit. This shows that the new approach of transforming lumped element circuit into microstrip line is able to solve the conventional design of complexity size of circuit of Butterworth low pass filter (LPF) into microstrip line.

Keywords: Butterworth low pass filter, number of order, microstrip line, microwave filter, maximally flat

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Authors: S. Padmapriya, V. Lakshmi Prabha

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In this paper, an efficient reconfigurable fixed-point Least Mean Square Adaptive FIR filter is proposed. The proposed architecture has two methods of operation: one is area efficient design and the other is optimized power. Pipelining of the adder blocks and partial product generator are used to achieve low area and reversible logic is used to obtain low power design. Depending upon the input samples and filter coefficients, one of the techniques is chosen. Least-Mean-Square adaptation is performed to update the weights. The architecture is coded using Verilog and synthesized in cadence encounter 0.18μm technology. The synthesized results show that the area reduction ratio of the proposed when compared with conventional technique is about 1.2%.

Keywords: adaptive filter, carry select adder, least mean square algorithm, reversible logic

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Authors: Damou Mehdi, Nouri Keltouma, Fahem Mohammed

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In this paper, the concept of substrate integrated waveguide (SIW) technology is used to design filter for 30 GHz communication systems. SIW is created in the substrate of RT/Duroid 5880 having relative permittivity ε_r= 2.2 and loss tangent tanφ = 0.0009. Four Via are placed on the century filter the structures of SIW are modeled using and have been optimized in software HFSS (High Frequency Structure Simulator), à transition is designed for a Ka-band transceiver module with a 28.5GHz center frequency, . and then the results are verified using another simulation CST Microwave Studio (Computer Simulation Technology). The return loss are less than -18 dB, and -13 dB respectively. The insertion loss is divided equally -1.2 dB and -1.4 respectively.

Keywords: transition, microstrip, substrat integrated wave guide, filter, via

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Authors: H. Nabaei, M. Joghataie

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In this article, we study the design methods of matched filter with commercial software including CST Studio and ADS in specific frequency: 900 MHz. At first, we select two amounts of impedance for studying matching of them. Then, using by matched filter utility tool in ADS software, we simulate and deviate the elements of matched filters. In the following, we implement matched filter in CST STUDIO software. The simulated results show the great conformity in this field. Also, we peruse scattering and Impedance parameters in the Derivative structure. Finally, the layout of matched filter is obtained by the schematic tool of CST STUDIO. In fact, here, we present the design process of matched filters in the specific frequency.

Keywords: impedance matching, lumped element, transmission line, maximum power transmission, 3D layout

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Authors: Dominik Krimpmann

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Information technology and information systems are currently at a tipping point. The digital age fundamentally transforms a large number of industries in the ways they work. Lines between business and technology blur. Researchers have acknowledged that this is the time in which the IT/IS organisation needs to re-strategise itself. In this paper, the author provides a structured review of the IS and organisation design literature addressing the question of how the digital age changes the design categories of an IT/IS organisation design. The findings show that most papers just analyse single aspects of either IT/IS relevant information or generic organisation design elements but miss a holistic ‘big-picture’ onto an IT/IS organisation design. This paper creates a holistic IT/IS organisation design framework bringing together the IS research strand, the digital strand and the generic organisation design strand. The research identified four IT/IS organisation design categories (strategy, structure, processes and people) and discusses the importance of two additional categories (sourcing and governance). The authors findings point to a first anchor point from which further research needs to be conducted to develop a holistic IT/IS organisation design framework.

Keywords: IT/IS strategy, IT/IS organisation design, digital age, organisational effectiveness, literature review

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