Search results for: multijunction heterostructure

Authors: Jiajia Yao, Guanlin Wu, Fang Liu, Junshuai Xue, Yue Hao

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As the production process of self-standing GaN substrates evolves, the commercialization of low dislocation density, large-scale, semi-insulating self-standing GaN substrates is gradually becoming a reality. This advancement has given rise to increased interest in GaN materials' homoepitaxial technology. However, at the homoepitaxial interface, there are considerable concentrations of impurity elements, including C, Si, and O, which generate parasitic leakage channels at the re-growth junction. This phenomenon results in leaked HEMTs that prove difficult to switch off, rendering them effectively non-functional. The emergence of leakage channels can also degrade the high-frequency properties and lower the power devices' breakdown voltage. In this study, the uniform epitaxy of AlGaN/GaN heterojunction with high electron mobility was accomplished through the surface treatment of the GaN substrates prior to growth and the design of the AlN isolation layer structure. By employing a procedure combining gallium atom in-situ cleaning and plasma nitridation, the C and O impurity concentrations at the homoepitaxial interface were diminished to the scale of 10¹⁷ cm-³. Additionally, the 1.5 nm nitrogen-rich AlN isolation layer successfully prevented the diffusion of Si impurities into the GaN channel layer. The result was an AlGaN/GaN heterojunction with an electron mobility of 1552 cm²/Vs and an electron density of 1.1 × 10¹³ cm-² at room temperature, obtained on a Fe-doped semi-insulating GaN substrate.

Keywords: MBE, AlGaN/GaN, homogenerous epitaxy, HEMT

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Authors: Arpan Bera, Rini Ganguly, Raja Chakraborty, Amlan J. Pal

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To deal with the increasing demands for the high-density non-volatile memory devices, we need nano-sites with efficient and stable charge storage capabilities. We prepared nanocrystals (NCs) of inorganic perovskite, CsPbCl₃ coated with Cs₄PbCl₆, by colloidal synthesis. Due to the type-I band alignment at the junction, this core-shell composite is expected to behave as a charge trapping site. Using Scanning Tunneling Spectroscopy (STS), we investigated voltage-controlled resistive switching in this heterostructure by tracking the change in its current-voltage (I-V) characteristics. By applying voltage pulse of appropriate magnitude on the NCs through this non-invasive method, different resistive states of this system were systematically accessed. For suitable pulse-magnitude, the response jumped to a branch with enhanced current indicating a high-resistance state (HRS) to low-resistance state (LRS) switching in the core-shell NCs. We could reverse this process by using a pulse of opposite polarity. These two distinct resistive states can be considered as two logic states, 0 and 1, which are accessible by varying voltage magnitude and polarity. STS being a local probe in space enabled us to capture this switching at individual NC site. Hence, we claim a bright prospect of these core-shell NCs made of inorganic halide perovskites in future high density memory application.

Keywords: Core-shell perovskite, CsPbCl₃-Cs₄PbCl₆, resistive switching, Scanning Tunneling Spectroscopy

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Authors: Mohammad Karimi, Magnus Heurlin, Lars Samuelson, Magnus Borgstrom, Hakan Pettersson

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Nanowire semiconductors are promising candidates for optoelectronic applications such as solar cells, photodetectors and lasers due to their quasi-1D geometry and large surface to volume ratio. The functional wavelength range of NW-based detectors is typically limited to the visible/near-infrared region. In this work, we present electrical and optical properties of IR photodetectors based on large square millimeter ensembles (>1million) of vertically processed semiconductor heterostructure nanowires (NWs) grown on InP substrates which operate in longer wavelengths. InP NWs comprising single or multiple (20) InAs/InAsP QDics axially embedded in an n-i-n geometry, have been grown on InP substrates using metal organic vapor phase epitaxy (MOVPE). The NWs are contacted in vertical direction by atomic layer deposition (ALD) deposition of 50 nm SiO2 as an insulating layer followed by sputtering of indium tin oxide (ITO) and evaporation of Ti and Au as top contact layer. In order to extend the sensitivity range to the mid-wavelength and long-wavelength regions, the intersubband transition within conduction band of InAsP QDisc is suggested. We present first experimental indications of intersubband photocurrent in NW geometry and discuss important design parameters for realization of intersubband detectors. Key advantages with the proposed design include large degree of freedom in choice of materials compositions, possible enhanced optical resonance effects due to periodically ordered NW arrays and the compatibility with silicon substrates. We believe that the proposed detector design offers the route towards monolithic integration of compact and sensitive III-V NW long wavelength detectors with Si technology.

Keywords: intersubband photodetector, infrared, nanowire, quantum disc

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Authors: Kwan-Ho Kim, Jin-Hong Park

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The multi-valued logic (MVL) circuits, which can handle more than two logic states, are one of the promising solutions to overcome the bit density limitations of conventional binary logic systems. Recently, tunneling devices such as Esaki diode and resonant tunneling diode (RTD) have been extensively explored to construct the MVL circuits. These tunneling devices present a negative differential resistance (NDR) phenomenon in which a current decreases as a voltage increases in a specific applied voltage region. Due to this non-monotonic current behavior, the tunneling devices have more than two threshold voltages, consequently enabling construction of MVL circuits. Recently, the emergence of two dimensional (2D) van der Waals (vdW) crystals has opened up the possibility to fabricate such tunneling devices easily. Owing to the defect-free surface of the 2D crystals, a very abrupt junction interface could be formed through a simple stacking process, which subsequently allowed the implementation of a high-performance tunneling device. Here, we report a vdW heterostructure based tunneling device with multiple threshold voltages, which was fabricated with black phosphorus (BP) and hafnium diselenide (HfSe₂). First, we exfoliated BP on the SiO₂ substrate and then transferred HfSe₂ on BP using dry transfer method. The BP and HfSe₂ form type-Ⅲ heterojunction so that the highly doped n+/p+ interface can be easily implemented without additional electrical or chemical doping process. Owing to high natural doping at the junction, record high peak to valley ratio (PVCR) of 16 was observed to the best our knowledge in 2D materials based NDR device. Furthermore, based on this, we first demonstrate the feasibility of the ternary latch by connecting two multi-threshold voltage devices in series.

Keywords: two dimensional van der Waals crystal, multi-valued logic, negative differential resistnace, tunneling device

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Authors: Wei-Chou Hsu, Ching-Sung Lee, Han-Yin Liu

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This work uses H2O2 oxidation technique to improve the pH sensitivity of the AlGaN/GaN-based ion-sensitive field-effect transistors (ISFETs). 10-nm-thick Al2O3 was grown on the surface of the AlGaN. It was found that the pH sensitivity was improved from 41.6 mV/pH to 55.2 mV/pH. Since the H2O2-grown Al2O3 was served as a passivation layer and the problem of Fermi-level pinning was suppressed for the ISFET with the H2O2 oxidation process. Hysteresis effect in the ISFET with the H2O2 treatment also became insignificant. The hysteresis effect was observed by dipping the ISFETs into different pH value solutions and comparing the voltage difference between the initial and final conditions. The hysteresis voltage (Vhys) of the ISFET with the H2O2 oxidation process was improved from 8.7 mV to 4.8 mV. The hysteresis effect is related to the buried binding sites which are related to the material defects like threading dislocations in the AlGaN/GaN heterostructure which was grown by the hetero-epitaxy technique. The H2O2-grown Al2O3 passivate these material defects and the Al2O3 has less material defects. The long-term stability of the ISFET is estimated by the drift effect measurement. The drift measurement was conducted by dipping the ISFETs into a specific pH value solution for 12 hours and the ISFETs were operating at a specific quiescent point. The drift rate is estimated by the drift voltage divided by the total measuring time. It was found that the drift rate of the ISFET was improved from 10.1 mV/hour to 1.91 mV/hour in the pH 7 solution, from 14.06 mV/hour to 6.38 mV/pH in the pH 2 solution, and from 12.8 mV/hour to 5.48 mV/hour in the pH 12 solution. The drift effect results from the capacitance variation in the electric double layer. The H2O2-grown Al2O3 provides an additional capacitance connection in series with the electric double layer. Therefore, the capacitance variation of the electric double layer became insignificant. Generally, the H2O2 oxidation process is a simple, fast, and cost-effective method for the AlGaN/GaN-based ISFET. Furthermore, the performance of the AlGaN/GaN ISFET was improved effectively and the non-ideal effects were suppressed.

Keywords: AlGaN/GaN, Al2O3, hysteresis effect, drift effect, reliability, passivation, pH sensors

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Authors: Haolun Sun, Ping Wang, Mei Wu, Meng Zhang, Bin Hou, Ling Yang, Xiaohua Ma, Yue Hao

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Gallium nitride (GaN) is an attractive material for next-generation power devices. It is noted that the performance of GaN-based high electron mobility transistors (HEMTs) is always limited by the self-heating effect. In response to the problem, integrating devices with polycrystalline diamond (PCD) has been demonstrated to be an efficient way to alleviate the self-heating issue of the GaN-based HEMTs. Among all the heat-spreading schemes, using PCD to cap the epitaxial layer before the HEMTs process is one of the most effective schemes. Now, the mainstream method of fabricating the PCD-capped HEMTs is to deposit the diamond heat-spreading layer on the AlGaN surface, which is covered by a thin nucleation dielectric/passivation layer. To achieve the pattern etching of the diamond heat spreader and device preparation, we selected SiN as the hard mask for diamond etching, which was deposited by plasma-enhanced chemical vapor deposition (PECVD). The conventional diamond etching method first uses F-based etching to remove the SiN from the special window region, followed by using O₂/Ar plasma to etch the diamond. However, the results of the scanning electron microscope (SEM) and focused ion beam microscopy (FIB) show that there are lots of diamond pillars on the etched diamond surface. Through our study, we found that it was caused by the high roughness of the diamond surface and the existence of the overlap between the diamond grains, which makes the etching of the SiN hard mask insufficient and leaves micro-masks on the diamond surface. Thus, a cyclic etching method was proposed to solve the problem of the residual SiN, which was left in the F-based etching. We used F-based etching during the first step to remove the SiN hard mask in the specific region; then, the O₂/Ar plasma was introduced to etch the diamond in the corresponding region. These two etching steps were set as one cycle. After the first cycle, we further used cyclic etching to clear the pillars, in which the F-based etching was used to remove the residual SiN, and then the O₂/Ar plasma was used to etch the diamond. Whether to take the next cyclic etching depends on whether there are still SiN micro-masks left. By using this method, we eventually achieved the self-terminated etching of the diamond and the smooth surface after the etching. These results demonstrate that the cyclic etching method can be successfully applied to the integrated preparation of polycrystalline diamond thin films and GaN HEMTs.

Keywords: AlGaN/GaN heterojunction, O₂/Ar plasma, cyclic etching, polycrystalline diamond

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Authors: Amit Bhunia, Mohit Kumar Singh, Maryam Al Huwayz, Mohamed Henini, Shouvik Datta

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We report [https://arxiv.org/abs/2107.13518] experimental detection and control of Schrodinger’s Cat like macroscopically large, quantum coherent state of a two-component Bose-Einstein condensate of spatially indirect electron-hole pairs or excitons using a resonant tunneling diode of III-V Semiconductors. This provides access to millions of excitons as qubits to allow efficient, fault-tolerant quantum computation. In this work, we measure phase-coherent periodic oscillations in photo-generated capacitance as a function of an applied voltage bias and light intensity over a macroscopically large area. Periodic presence and absence of splitting of excitonic peaks in the optical spectra measured by photocapacitance point towards tunneling induced variations in capacitive coupling between the quantum well and quantum dots. Observation of negative ‘quantum capacitance’ due to a screening of charge carriers by the quantum well indicates Coulomb correlations of interacting excitons in the plane of the sample. We also establish that coherent resonant tunneling in this well-dot heterostructure restricts the available momentum space of the charge carriers within this quantum well. Consequently, the electric polarization vector of the associated indirect excitons collective orients along the direction of applied bias and these excitons undergo Bose-Einstein condensation below ~100 K. Generation of interference beats in photocapacitance oscillation even with incoherent white light further confirm the presence of stable, long-range spatial correlation among these indirect excitons. We finally demonstrate collective Rabi oscillations of these macroscopically large, ‘multipartite’, two-level, coupled and uncoupled quantum states of excitonic condensate as qubits. Therefore, our study not only brings the physics and technology of Bose-Einstein condensation within the reaches of semiconductor chips but also opens up experimental investigations of the fundamentals of quantum physics using similar techniques. Operational temperatures of such two-component excitonic BEC can be raised further with a more densely packed, ordered array of QDs and/or using materials having larger excitonic binding energies. However, fabrications of single crystals of 0D-2D heterostructures using 2D materials (e.g. transition metal di-chalcogenides, oxides, perovskites etc.) having higher excitonic binding energies are still an open challenge for semiconductor optoelectronics. As of now, these 0D-2D heterostructures can already be scaled up for mass production of miniaturized, portable quantum optoelectronic devices using the existing III-V and/or Nitride based semiconductor fabrication technologies.

Keywords: exciton, Bose-Einstein condensation, quantum computation, heterostructures, semiconductor Physics, quantum fluids, Schrodinger's Cat

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Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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