Search results for: torus.

Authors: Pakkinee Chitsakul

Abstract:

In this article, we would like to show that there is no cut point of any point in a plane, but there exists the cut locus of a point in a flat torus. By the results, we would like to determine the structure of cut locus of a flat torus.

Keywords: Cut locus, flat torus, geodesics.

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Authors: Liu Gang, Gu Nai-jie, Bi Kun, Tu Kun, Dong Wan-li

Abstract:

All-to-all personalized communication, also known as complete exchange, is one of the most dense communication patterns in parallel computing. In this paper, we propose new indirect algorithms for complete exchange on all-port ring and torus. The new algorithms fully utilize all communication links and transmit messages along shortest paths to completely achieve the theoretical lower bounds on message transmission, which have not be achieved among other existing indirect algorithms. For 2D r × c ( r % c ) all-port torus, the algorithm has time complexities of optimal transmission cost and O(c) message startup cost. In addition, the proposed algorithms accommodate non-power-of-two tori where the number of nodes in each dimension needs not be power-of-two or square. Finally, the algorithms are conceptually simple and symmetrical for every message and every node so that they can be easily implemented and achieve the optimum in practice.

Keywords: Complete exchange, collective communication, all-to-all personalized communication, parallel computing, wormhole routing, torus.

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Authors: Ahmad Darabi, Hassan Moradi, Hossein Azarinfar

Abstract:

In this paper presented initial design of Low Speed Axial Flux Permanent Magnet (AFPM) Machine with Non-Slotted TORUS topology type by use of certain algorithm (Appendix). Validation of design algorithm studied by means of selected data of an initial prototype machine. Analytically design calculation carried out by means of design algorithm and obtained results compared with results of Finite Element Method (FEM).

Keywords: Axial Flux Permanent Magnet (AFPM) Machine, Design Algorithm, Finite Element Method (FEM), TORUS

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Authors: M. Hamad Hassan, S.A.M. Gilani

Abstract:

In this paper, a fragile watermarking scheme is proposed for color image specified object-s authentication. The color image is first transformed from RGB to YST color space, suitable for watermarking the color media. The T channel corresponds to the chrominance component of a color image andYS ÔèÑ T , therefore selected for embedding the watermark. The T channel is first divided into 2×2 non-overlapping blocks and the two LSBs are set to zero. The object that is to be authenticated is also divided into 2×2 nonoverlapping blocks and each block-s intensity mean is computed followed by eight bit encoding. The generated watermark is then embedded into T channel randomly selected 2×2 block-s LSBs using 2D-Torus Automorphism. Selection of block size is paramount for exact localization and recovery of work. The proposed scheme is blind, efficient and secure with ability to detect and locate even minor tampering applied to the image with full recovery of original work. The quality of watermarked media is quite high both subjectively and objectively. The technique is suitable for class of images with format such as gif, tif or bitmap.

Keywords: Image Authentication, LSBs, PSNR, 2D-Torus Automorphism, YST Color Space.

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Authors: Muna Tabuni

Abstract:

The paper contains an investigation of winding numbers of paths of zeros of analytic theta functions. We have considered briefly an analytic representation of finite quantum systems ZN. The analytic functions on a torus have exactly N zeros. The brief introduction to the zeros of analytic functions and there time evolution is given. We have discussed the periodic finite quantum systems. We have introduced the winding numbers in general. We consider the winding numbers of the zeros of analytic theta functions.

Keywords: Winding numbers, period, paths of zeros.

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Authors: Yahia Salah, Med Lassaad Kaddachi, Rached Tourki

Abstract:

This paper presents the design, implementation and evaluation of a micro-network, or Network-on-Chip (NoC), based on a generic pipeline router architecture. The router is designed to efficiently support traffic generated by multimedia applications on embedded multi-core systems. It employs a simplest routing mechanism and implements the round-robin scheduling strategy to resolve output port contentions and minimize latency. A virtual channel flow control is applied to avoid the head-of-line blocking problem and enhance performance in the NoC. The hardware design of the router architecture has been implemented at the register transfer level; its functionality is evaluated in the case of the two dimensional Mesh/Torus topology, and performance results are derived from ModelSim simulator and Xilinx ISE 9.2i synthesis tool. An example of a multi-core image processing system utilizing the NoC structure has been implemented and validated to demonstrate the capability of the proposed micro-network architecture. To reduce complexity of the image compression and decompression architecture, the system use image processing algorithm based on classical discrete cosine transform with an efficient zonal processing approach. The experimental results have confirmed that both the proposed image compression scheme and NoC architecture can achieve a reasonable image quality with lower processing time.

Keywords: Generic Pipeline Network-on-Chip Router Architecture, JPEG Image Compression, FPGA Hardware Implementation, Performance Evaluation.

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