Search results for: multithreading
6 QSI Dynamical Fetch Policy for SMT
Authors: Shu-Chiao Yang, Jong-Jiann Shieh
Abstract:
A Simultaneous Multithreading (SMT) Processor is capable of executing instructions from multiple threads in the same cycle. SMT in fact was introduced as a powerful architecture to superscalar to increase the throughput of the processor. Simultaneous Multithreading is a technique that permits multiple instructions from multiple independent applications or threads to compete limited resources each cycle. While the fetch unit has been identified as one of the major bottlenecks of SMT architecture, several fetch schemes were proposed by prior works to enhance the fetching efficiency and overall performance. In this paper, we propose a novel fetch policy called queue situation identifier (QSI) which counts some kind of long latency instructions of each thread each cycle then properly selects which threads to fetch next cycle. Simulation results show that in best case our fetch policy can achieve 30% on speedup and also can reduce the data cache level 1 miss rate.Keywords: SMT, QSI, DL1 miss rate.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 12685 Flexible, Adaptable and Scaleable Business Rules Management System for Data Validation
Authors: Kashif Kamran, Farooque Azam
Abstract:
The policies governing the business of any organization are well reflected in her business rules. The business rules are implemented by data validation techniques, coded during the software development process. Any change in business policies results in change in the code written for data validation used to enforce the business policies. Implementing the change in business rules without changing the code is the objective of this paper. The proposed approach enables users to create rule sets at run time once the software has been developed. The newly defined rule sets by end users are associated with the data variables for which the validation is required. The proposed approach facilitates the users to define business rules using all the comparison operators and Boolean operators. Multithreading is used to validate the data entered by end user against the business rules applied. The evaluation of the data is performed by a newly created thread using an enhanced form of the RPN (Reverse Polish Notation) algorithm.Keywords: Business Rules, data validation, multithreading, Reverse Polish Notation
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22704 Multiagent Systems Simulation
Authors: G. Balakayeva, A. Aktymbayeva
Abstract:
In this paper, we consider components of discrete event imitating model, implementing a simulation model by using JAVA and performing an input analysis of the data and an output analysis of the simulation results. Was lead development of imitating model of mass service system with n (n≥1) devices of service. On the basis of the developed process of a multithreading simulated the distributed processes with presence of synchronization. Was developed the algorithm of event-oriented simulation, was received results of system functioning with n devices of service.
Keywords: Imitating modeling, Mass service system, Multi agentsystem.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15893 Using Multi-Thread Technology Realize Most Short-Path Parallel Algorithm
Authors: Chang-le Lu, Yong Chen
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The shortest path question is in a graph theory model question, and it is applied in many fields. The most short-path question may divide into two kinds: Single sources most short-path, all apexes to most short-path. This article mainly introduces the problem of all apexes to most short-path, and gives a new parallel algorithm of all apexes to most short-path according to the Dijkstra algorithm. At last this paper realizes the parallel algorithms in the technology of C # multithreading.Keywords: Dijkstra algorithm, parallel algorithms, multi-thread technology, most short-path, ratio.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21092 Real-time Interactive Ocean Wave Simulation using Multithread
Authors: K. Prachumrak, T. Kanchanapornchai
Abstract:
This research simulates one of the natural phenomena, the ocean wave. Our goal is to be able to simulate the ocean wave at real-time rate with the water surface interacting with objects. The wave in this research is calm and smooth caused by the force of the wind above the ocean surface. In order to make the simulation of the wave real-time, the implementation of the GPU and the multithreading techniques are used here. Based on the fact that the new generation CPUs, for personal computers, have multi cores, they are useful for the multithread. This technique utilizes more than one core at a time. This simulation is programmed by C language with OpenGL. To make the simulation of the wave look more realistic, we applied an OpenGL technique called cube mapping (environmental mapping) to make water surface reflective and more realistic.Keywords: Interactive wave, ocean wave, wind effect, multithread
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 24801 Using the PGAS Programming Paradigm for Biological Sequence Alignment on a Chip Multi-Threading Architecture
Authors: M. Bakhouya, S. A. Bahra, T. El-Ghazawi
Abstract:
The Partitioned Global Address Space (PGAS) programming paradigm offers ease-of-use in expressing parallelism through a global shared address space while emphasizing performance by providing locality awareness through the partitioning of this address space. Therefore, the interest in PGAS programming languages is growing and many new languages have emerged and are becoming ubiquitously available on nearly all modern parallel architectures. Recently, new parallel machines with multiple cores are designed for targeting high performance applications. Most of the efforts have gone into benchmarking but there are a few examples of real high performance applications running on multicore machines. In this paper, we present and evaluate a parallelization technique for implementing a local DNA sequence alignment algorithm using a PGAS based language, UPC (Unified Parallel C) on a chip multithreading architecture, the UltraSPARC T1.Keywords: Partitioned Global Address Space, Unified Parallel C, Multicore machines, Multi-threading Architecture, Sequence alignment.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1389