Commenced in January 2007
Paper Count: 31430
A Low Power High Frequency CMOS RF Four Quadrant Analog Mixer
Abstract:This paper describes a CMOS four-quadrant multiplier intended for use in the front-end receiver by utilizing the square-law characteristic of the MOS transistor in the saturation region. The circuit is based on 0.35 um CMOS technology simulated using HSPICE software. The mixer has a third-order inter the power consumption is 271uW from a single 1.2V power supply. One of the features of the proposed design is using two MOS transistors limitation to reduce the supply voltage, which leads to reduce the power consumption. This technique provides a GHz bandwidth response and low power consumption.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1060084Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1741
 Mohammed K. Salama and Ahmed. M. Soliman "Low-Voltage Low- Power CMOS RF Four-QuadrantMultiplier" Int. J. Electron. Commun. (AE┬¿U) 57 (2003) No. 1, 74−78.
 W. Liu and Sh. Iuan Liu , "Design of a CMOS low-power and lowvoltage four-quadrant analog multiplier" springer science +business media , 16 september 2009.
 C. Sakul and K. Pongthana , "a low voltage supply four quadrant analog multiplier circuit" ieee International Symposium on Intelligent Signal Processing and Communication Systems , 2009, pp. 292-294.
 B. Razavi, "Design of Analog Integrated Circuits", New York: McGraw-Hill, 2001, pp. 126-129.
 N I. KHACHAB, A-AZIZ AL-SAQER AND J G. VARGHESE "High Linearity BiCMOS Multiplier/Transconductor Structures" Analog Integrated Circuits and Signal Processing, 16, 1998, pp. 47-61.
 SHEN-IUAN LIU, J-L LEE AND CH-CH CHANG "Low-Voltage BiCMOS Four-Quadrant Multiplier and Squarer" Analog Integrated Circuits and Signal Processing, 20, 1999, pp. 25-29.
 B. Bunchu and W. Surakampontorn "voltage mode CMOS squarer multiplier circuit" king mongkut s institute of technology ladkrabang.
 Witold Machowski , Stanis┼éaw Kuta , Jacek Jasielski "Four-quadrant analog multiplier based on CMOS inverters" Analog Integr Circ Sig Process 55, 2008, pp. 249-259.
 R. Hidayat, K. Dejhan, P. Moungnoul, and V. Miyanaga "ota based high frequency CMOS and squaring circuit" King Mongkut-s Institute of Technology Ladkrabang, Bangkok 10520, Thailand.
 SIMON CIMIN LI " A Symmetric Complementary Structure for RF CMOS Analog Squarer and Four-Quadrant Analog Multiplier" Analog Integrated Circuits and Signal Processing, 23, 2000, pp. 103-115.
 Moon, G.; Zaghloul, M.E.; Newcomb, R.W.: An Enhancement Mode MOS Voltage-Controlled Linear Resistor with Large Dynamic Range. IEEE J. Circuits and Systems 37 (1990), 1284-1288.
 MOSIS, Wafer Electrical Test Data and SPICE Model Parameters TSMC (0.09╬╝m).