Search results for: re-entrant

Authors: Durga C. Dalal, Swapan K. Pandit

Abstract:

In this paper, a numerical study has been made to analyze the transient 2-D flows of a viscous incompressible fluid through channels with forward or backward constriction. Problems addressed include flow through sudden contraction and sudden expansion channel geometries with rounded and increasingly sharp reentrant corner. In both the cases, numerical results are presented for the separation and reattachment points, streamlines, vorticity and flow patterns. A fourth order accurate compact scheme has been employed to efficiently capture steady state solutions of the governing equations. It appears from our study that sharpness of the throat in the channel is one of the important parameters to control the strength and size of the separation zone without modifying the general flow patterns. The comparison between the two cases shows that the upstream geometry plays a significant role on vortex growth dynamics.

Keywords: Forward and backward constriction, HOC scheme, Incompressible viscous flows, Separation and reattachment points.

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Authors: Ingy A. El-Khouly, Khaled S. El-Kilany, Aziz E. El-Sayed

Abstract:

The process of wafer fabrication is arguably the most technologically complex and capital intensive stage in semiconductor manufacturing. This large-scale discrete-event process is highly reentrant, and involves hundreds of machines, restrictions, and processing steps. Therefore, production control of wafer fabrication facilities (fab), specifically scheduling, is one of the most challenging problems that this industry faces. Dispatching rules have been extensively applied to the scheduling problems in semiconductor manufacturing. Moreover, lot release policies are commonly used in this manufacturing setting to further improve the performance of such systems and reduce its inherent variability. In this work, simulation is used in the scheduling of re-entrant flow shop manufacturing systems with an application in semiconductor wafer fabrication; where, a simulation model has been developed for the Intel Five-Machine Six Step Mini-Fab using the ExtendTM simulation environment. The Mini-Fab has been selected as it captures the challenges involved in scheduling the highly re-entrant semiconductor manufacturing lines. A number of scenarios have been developed and have been used to evaluate the effect of different dispatching rules and lot release policies on the selected performance measures. Results of simulation showed that the performance of the Mini-Fab can be drastically improved using a combination of dispatching rules and lot release policy.

Keywords: Dispatching rules, lot release policy, re-entrant flowshop, semiconductor manufacturing.

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