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Digital Predistorter with Pipelined Architecture Using CORDIC Processors

Authors: Kyunghoon Kim, Sungjoon Shim, Jun Tae Kim, Jong Tae Kim


In a wireless communication system, a predistorter(PD) is often employed to alleviate nonlinear distortions due to operating a power amplifier near saturation, thereby improving the system performance and reducing the interference to adjacent channels. This paper presents a new adaptive polynomial digital predistorter(DPD). The proposed DPD uses Coordinate Rotation Digital Computing(CORDIC) processors and PD process by pipelined architecture. It is simpler and faster than conventional adaptive polynomial DPD. The performance of the proposed DPD is proved by MATLAB simulation.

Keywords: CORDIC, DPD

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