A New Hardware Implementation of Manchester Line Decoder
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 33085
A New Hardware Implementation of Manchester Line Decoder

Authors: Ibrahim A. Khorwat, Nabil Naas

Abstract:

In this paper, we present a simple circuit for Manchester decoding and without using any complicated or programmable devices. This circuit can decode 90kbps of transmitted encoded data; however, greater than this transmission rate can be decoded if high speed devices were used. We also present a new method for extracting the embedded clock from Manchester data in order to use it for serial-to-parallel conversion. All of our experimental measurements have been done using simulation.

Keywords: High threshold level, level segregation, lowthreshold level, smoothing circuit synchronization..

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1330591

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References:


[1] NI Multisim, Version 10.0.144, 2007National instruments.
[2] www.national.com/ds/LM/LM339.pdf