Commenced in January 2007
Paper Count: 30073
Low Power Digital System for Reconfigurable Neural Recording System
Abstract:A digital system is proposed for low power 100- channel neural recording system in this paper, which consists of 100 amplifiers, 100 analog-to-digital converters (ADC), digital controller and baseband, transceiver for data link and RF command link. The proposed system is designed in a 0.18 μm CMOS process and 65 nm CMOS process.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1077401Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1213
 Moo Sung Chae, Zhi Yang, Mehmet R. Yuce, Linh Hoang, and Wentai Liu, "A 128-Channel 6 mW Wireless Neural Recording IC With Spike Feature Extraction and UWB Transmitter," IEEE Trans. Neural Syst. Rehabil. Eng., vol. 17, no. 4, pp.312-321. , August 2009.
 Reid R. Harrison, Paul T. Watkins, Ryan J. Kier, Robert O. Lovejoy, Daniel J.Black, Bradley Greger and Florian Solzbacher, "A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System," IEEE J. Solid-State Circuits, vol. 42, no. 1, pp. 123-133., January 2007.
 Peng Li, Xin Liu, Bin Zhao and Minkyu Je, "Digital System for Low Power Wireless Neural Recording System," International Symposium on Integrated Circuits. 2011.
 Olav E. Liseth, Daniel Mo, Hakon A. Hjortland, Tor Sverre "Bassen" Lande, and Dag T. Wisland, "Power-Efficient Cross-Correlation Beat Detection in Electrocardiogram Analysis Using Bitstreams," IEEE Trans.Biomedical circuits and systems, vol. 4, no. 6, December 2010.