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SoC Communication Architecture Modeling

Authors: Ziaddin Daie Koozekanani, Mina Zolfy Lighvan


One of the most challengeable issues in ESL (Electronic System Level) design is the lack of a general modeling scheme for on chip communication architecture. In this paper some of the mostly used methodologies for modeling and representation of on chip communication are investigated. Our goal is studying the existing methods to extract the requirements of a general representation scheme for communication architecture synthesis. The next step, will be introducing a modeling and representation method for being used in automatically synthesis process of on chip communication architecture.

Keywords: System on Chip, Communication architecture, Communication Modeling and Representation

Digital Object Identifier (DOI):

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[1] Blume, H. , Sydow, T. V. , Schleifer, J. , and Noll, T. G. , Petri Net Based Modeling of Communication in Systems on Chip, V. Kordic, Editor. 2008: Vienna.
[2] Pasricha, Sudeep and Dutt, Nikil, On-Chip Communication Architectures (System on Chip Interconnect). 2008: Morgan Kaufmann Publisher.
[3] Viaud, E., Pecheux, F., and Greiner, A. An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles. in Date 2006. 2006.
[4] Renner, F, Becker, D., and Glesner, M, Communication performance models for architecture precise prototyping of real-time embedded systems. RSP, 1999: p. 108-119.
[5] Gupta, P, Zhong, L, and Jha, N - K. A high-level interconnect power model for design space exploration. in ICCAD 2003. 2003.
[6] P, Sotiriadis and P., Chandrakasan A., A bus energy model for deep submicron technology. IEEE Transactions on Very Large Scale Integration Systems (TVLSI). 10(3): p. 341-350.
[7] Peterson, J. L. , Petri Net Theory and the Modeling of Systems. 1981: Prentice Hall, Englewood Cliffs.
[8] Blume, H., Sydow, T. V., Becker, D., and Noll, T. G., Applicatio of Deterministic and Schocastic Petrinets for Performance Modeling of NoC Architecture. Journal of Systems Architecture, 2007. 53: p. 466- 476.
[9] Rumbaugh, J, Jacobson, I, and Booch, G, The Unified Modeling Language Refrence Manual. 1998: Addison-Wesley.
[10] Indrusiak, L. and Glesner, A. SoC Specification using UML and Actor- Oriented Modeling in Baltic Electronics Conference, 2006 International. 2006. Tallin.
[11] Lee, E, Neuendorffer, S, and Wirthlin, M, Actor Oriented Design of Embedded Hardware and Software Systems. Journal of Circuits Systems and Computers, 2003. Vol. 12(No. 3): p. 231-260.
[12] Perez, J, Sevillano, J, Urcelayeta, S, and Velez, I. System Behaviour Capture: From UML to SystemC. in Forum on Specification and Design Languages 2008.
[13] Hoare, C. A. R, Communicating Sequential Processes. 2004: Prentice Hall International Series in Computing Science. 260.
[14] Brunzema, C and Nebel, W. CSP with Synthesisable SystemC and OSSS. in FDL'07. 2007.
[15] Allen Kent and Williams, James G., Encyclopedia of Computer Science and Technology. 1998.
[16] Barrett, G, Model checking in practice: The T9000 Virtual Channel Processor. IEEE Transactions on Software Engineering 1995. 21(2): p. 69-78.
[17] Cesario, W., Gautheir, L., Lyonnard, D., Nicolescu, G, and Jerraya, A, Object_based Hardware/Software Component Interaction Model for Interface Design in System-on-a-Chip circuits. The Journal of Systems and Softwares, 2004: p. 229-244.
[18] Lee, E. A and Parks, T. M, Dataflow process Networks. Proceedings of the IEEE, 1995. 83(5): p. 773-799.
[19] Stefanov, T, Zissulescu, C, Turjan, A, Kienhuis, B, and Deprettere, E. System Design Using Kahn Process Networks: The Compaan/Laura Approach. in Date'04. 2004.