Hardware Implementation of Local Binary Pattern Based Two-Bit Transform Motion Estimation
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Hardware Implementation of Local Binary Pattern Based Two-Bit Transform Motion Estimation

Authors: Seda Yavuz, Anıl Çelebi, Aysun Taşyapı Çelebi, Oğuzhan Urhan

Abstract:

Nowadays, demand for using real-time video transmission capable devices is ever-increasing. So, high resolution videos have made efficient video compression techniques an essential component for capturing and transmitting video data. Motion estimation has a critical role in encoding raw video. Hence, various motion estimation methods are introduced to efficiently compress the video. Low bit‑depth representation based motion estimation methods facilitate computation of matching criteria and thus, provide small hardware footprint. In this paper, a hardware implementation of a two-bit transformation based low-complexity motion estimation method using local binary pattern approach is proposed. Image frames are represented in two-bit depth instead of full-depth by making use of the local binary pattern as a binarization approach and the binarization part of the hardware architecture is explained in detail. Experimental results demonstrate the difference between the proposed hardware architecture and the architectures of well-known low-complexity motion estimation methods in terms of important aspects such as resource utilization, energy and power consumption.

Keywords: Binarization, hardware architecture, local binary pattern, motion estimation, two-bit transform.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1315515

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References:


[1] B. Natarajan, V. Bhaskaran, and K. Konstantinides, “Low-complexity block-based motion estimation via one-bit transforms,” IEEE Trans. Circuit Syst. Video Technol., vol. 7, no. 4, pp. 702-706, Aug. 1997.
[2] S. Ertürk, “Multiplication-free one-bit transform for low-complexity block-based motion estimation,” IEEE Signal Process. Lett., vol. 14, no. 2, pp. 109-112, Feb. 2007.
[3] A. Ertürk, and S. Ertürk, “Two-bit transform for binary block motion estimation,” IEEE Trans. Circuit Syst. Video Technol., vol. 15, no. 7, pp. 938- 946, July 2005.
[4] O. Urhan, and S. Ertürk, “Constrained one-bit transform for low-complexity block motion estimation,” IEEE Trans. Circuits and Syst. Video Technol., vol. 17, no.4, pp. 478-482, Apr. 2007.
[5] A. Akin, G. Sayilar, and I. Hamzaoglu, “High performance hardware architectures for one bit transform based single and multiple reference frame motion estimation,” IEEE Trans. Consum. Electron., vol. 56, no. 2, pp. 1144–1152, July 2010.
[6] S. Chatterjee, and I. Chakrabarti, “Low power vlsi architectures for one bit transformation based fast motion estimation,” IEEE Trans. Consum. Electron., vol. 56, no.4, pp. 2652–2660, January 2011.
[7] A. Celebi, H. J. Lee, and S Erturk, “Bit plane matching based variable block size motion estimation method and its hardware architecture,” IEEE Trans. Consum. Electron., vol. 56, no. 3, pp. 1625-1633, 2010.
[8] A. Çelebi, O. Urhan, İ. Hamzaoğlu, and S. Ertürk, “Efficient hardware implementations of low bit depth motion estimation algorithms,” IEEE Signal Process. Letters, vol. 16, no. 6, June 2009.
[9] A. Çelebi, and O. Urhan, “High performance hardware architecture for constrained one-bit transform based motion estimation,” 19th European Signal Processing Conference (EUSIPCO 2011), 2011, pp. 2151-2155.
[10] S. Yavuz, A. Taşyapı Çelebi, A. Çelebi, and O. Urhan, “Integer 1-bit transform method and its hardware architecture for low-complexity block-based motion estimation,” in Proc. of 25th Signal Processing and Communication Applications Conf. (SIU), Antalya, Turkey. DOI: 10.1109/SIU.2017.7960295, June 2017.
[11] B. Kır, M. Kurt, and O. Urhan, “Local binary pattern based fast digital image stabilization,” IEEE Signal Processing Letters, vol. 22, no. 3, pp. 341-345, 2015.
[12] S. Yavuz, A. Taşyapı Çelebi, A. Çelebi, and O. Urhan, “Local binary pattern method and its hardware architecture for low-complexity motion estimation,” in Proc. of 25th Signal Processing and Communication Applications Conf. (SIU), Antalya, Turkey. DOI: 10.1109/SIU.2017.7960443, June 2017.
[13] A. Taşyapı Çelebi, “Two-bit transform using local binary pattern method for low complexity block motion estimation,” revised version submitted for publication in Turkish Journal of Electrical Engineering and Computer Sciences.
[14] X. M. Zhao, and S. Q. Zhang, “Facial expression recognition using local binary patterns and discriminant kernel locally linear embedding,” EURASIP Journal of Advances in Signal Processing, pp. 1–9, 2012.
[15] Ylioinas J., Hadid A., Hong X., and Pietikainen M., “Age estimation using local binary pattern kernel density estimate,” Lecture Notes in Computer Science, vol. 8156, pp. 141–150, 2013.
[16] L. Liu, L. Zhao, G. Kuang, and P. Fieguth, “Extended local binary patterns for texture classification,” Image and Vision Computing, vol. 39, no. 2, pp. 86-99, 2012.
[17] S. Manivannan, R. Wang, and E. Trucco, “Extended gaussian-filtered local binary patterns for colonoscopy image classification,” in Int.Conf. on Computer Vision (ICCV-2013).
[18] S. Yavuz, A. Çelebi, M. Aslan, and O. Urhan, “Selective gray-coded bit-plane based low complexity motion estimation and its hardware architecture,” IEEE Trans. Consum. Electron, vol. 62, no. 1, pp. 76-84, Feb. 2016.