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Implementation of ADETRAN Language Using Message Passing Interface
Authors: Akiyoshi Wakatani
Abstract:This paper describes the Message Passing Interface (MPI) implementation of ADETRAN language, and its evaluation on SX-ACE supercomputers. ADETRAN language includes pdo statement that specifies the data distribution and parallel computations and pass statement that specifies the redistribution of arrays. Two methods for implementation of pass statement are discussed and the performance evaluation using Splitting-Up CG method is presented. The effectiveness of the parallelization is evaluated and the advantage of one dimensional distribution is empirically confirmed by using the results of experiments.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1112177Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 889
 R. Numrich and J. Reid, “Co-array Fortran for parallel programming,” ACM SIGPLAN Fortran Forum, vol. 17, issue 2, pp. 1-31, 1998.
 P. Charles, C. Grothoff, V. Saraswat, C. Donawa, A. Kielstra, K. Ebcioglu, C. Praun and V. Sarkar “X10: an object-oriented approach to non-uniform cluster computing,” ACM SIGPLAN Notices, vol. 40, issue 10, pp. 519-538, 2005.
 B. Chamberlain, D. Callahan and H. Zima, “Parallel Programmability and the Chapel Language,” International Journal of High Performance Computing Applications, vol. 21, no. 3, pp. 291-312, 2007.
 M. Nakao, H. Murai, T. Shimosaka and M. Sato, “Productivity and Performance of the HPC Challenge Benchmarks with the XcalableMP PGAS Language”, in Proc. of the 7th International Conference on PGAS Programming Models, pp. 157-171, 2013.
 C. Yang, W. Bland, J. Mellor-Crummey, P. Balaji, “Portable, MPI-interoperable coarray fortran,” ACM SIGPLAN Notices, vol. 49, issue 8, pp. 81-92, 2014.
 H. Kadota, K. Kaneko, I. Okabayashi, T. Okamoto, T. Mimura, Y. Nakakura, A. Wakatani, M. Nakajima, J. Nishikawa, K. Zaiki and T. Nogi “Pallel computer ADENART - its architecture and application,” in Proc. of the 5th international conference on Supercomputing, pp. 1-8, 1991.
 S. Odanaka and T. Nogi, “Massively parallel computation using a splitting-up operator method for three-dimensional device simulation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, issue 7, pp. 824-832, 1995.
 “SX-ACE super computer,” http://www.hpc.cmc.osaka-u.ac.jp/en/sx-ace/ (as of 3/2/2016)
 “GNU bison,” http://www.gnu.org/software/bison/ (as of 3/2/2016)
 “ADETRAN translator,” http://pplinux.is.konan-u.ac.jp/atran.html (as of 3/2/2016)