Search results for: systolic circuits
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 261

Search results for: systolic circuits

81 Improvement of Synchronous Machine Dynamic Characteristics via Neural Network Based Controllers

Authors: S. A. Gawish, F. A. Khalifa, R. M. Mostafa

Abstract:

This paper presents Simulation and experimental study aimed at investigating the effectiveness of an adaptive artificial neural network stabilizer on enhancing the damping torque of a synchronous generator. For this purpose, a power system comprising a synchronous generator feeding a large power system through a short tie line is considered. The proposed adaptive neuro-control system consists of two multi-layered feed forward neural networks, which work as a plant model identifier and a controller. It generates supplementary control signals to be utilized by conventional controllers. The details of the interfacing circuits, sensors and transducers, which have been designed and built for use in tests, are presented. The synchronous generator is tested to investigate the effect of tuning a Power System Stabilizer (PSS) on its dynamic stability. The obtained simulation and experimental results verify the basic theoretical concepts.

Keywords: Adaptive artificial neural network, power system stabilizer, synchronous generator.

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80 The Effect of Eight Weeks of Aerobic Training on Indices of Cardio-Respiratory and Exercise Tolerance in Overweight Women with Chronic Asthma

Authors: Somayeh Negahdari, Mohsen Ghanbarzadeh, Masoud Nikbakht, Heshmatolah Tavakol

Abstract:

Asthma, obesity and overweight are the main factors causing change within the heart and respiratory airways. Asthma symptoms are normally observed during exercising. Epidemiological studies have indicated asthma symptoms occurring due to certain lifestyle habits; for example, a sedentary lifestyle. In this study, eight weeks of aerobic exercises resulted in a positive effect overall in overweight women experiencing mild chronic asthma. The quasi-experimental applied research has been done based on experimental and control groups. The experimental group (seven patients) and control group (n = 7) were graded before and after the test. According to the Borg dyspnea and fatigue Perception Index, the training intensity has determined. Participants in the study performed a sub-maximal aerobic activity schedule (45% to 80% of maximum heart rate) for two months, while the control group (n = 7) stayed away from aerobic exercise. Data evaluation and analysis of covariance compared both the pre-test and post-test with paired t-test at significance level of P≤ 0.05. After eight weeks of exercise, the results of the experimental group show a significant decrease in resting heart rate, systolic blood pressure, minute ventilation, while a significant increase in maximal oxygen uptake and tolerance activity (P ≤ 0.05). In the control group, there was no significant difference in these parameters ((P ≤ 0.05). The results indicate the aerobic activity can strengthen the respiratory muscles, while other physiological factors could result in breathing and heart recovery. Aerobic activity also resulted in favorable changes in cardiovascular parameters, and exercise tolerance of overweight women with chronic asthma.

Keywords: Asthma, respiratory cardiac index, exercise tolerance, aerobic, overweight.

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79 A High Accuracy Measurement Circuit for Soil Moisture Detection

Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

Abstract:

The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

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78 A Novel Low Power Very Low Voltage High Performance Current Mirror

Authors: Khalil Monfaredi, Hassan Faraji Baghtash, Majid Abbasi

Abstract:

In this paper a novel high output impedance, low input impedance, wide bandwidth, very simple current mirror with input and output voltage requirements less than that of a simple current mirror is presented. These features are achieved with very simple structure avoiding extra large node impedances to ensure high bandwidth operation. The circuit's principle of operation is discussed and compared to simple and low voltage cascode (LVC) current mirrors. Such outstanding features of this current mirror as high output impedance ~384K, low input impedance~6.4, wide bandwidth~178MHz, low input voltage ~ 362mV, low output voltage ~ 38mV and low current transfer error ~4% (all at 50μA) makes it an outstanding choice for high performance applications. Simulation results in BSIM 0.35μm CMOS technology with HSPICE are given in comparison with simple, and LVC current mirrors to verify and validate the performance of the proposed current mirror.

Keywords: Analog circuits, Current mirror, high frequency, Low power, Low voltage.

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77 Hybrid Prefix Adder Architecture for Minimizing the Power Delay Product

Authors: P.Ramanathan, P.T.Vanathi

Abstract:

Parallel Prefix addition is a technique for improving the speed of binary addition. Due to continuing integrating intensity and the growing needs of portable devices, low-power and highperformance designs are of prime importance. The classical parallel prefix adder structures presented in the literature over the years optimize for logic depth, area, fan-out and interconnect count of logic circuits. In this paper, a new architecture for performing 8-bit, 16-bit and 32-bit Parallel Prefix addition is proposed. The proposed prefix adder structures is compared with several classical adders of same bit width in terms of power, delay and number of computational nodes. The results reveal that the proposed structures have the least power delay product when compared with its peer existing Prefix adder structures. Tanner EDA tool was used for simulating the adder designs in the TSMC 180 nm and TSMC 130 nm technologies.

Keywords: Parallel Prefix Adder (PPA), Dot operator, Semi-Dotoperator, Complementary Metal Oxide Semiconductor (CMOS), Odd-dot operator, Even-dot operator, Odd-semi-dot operator andEven-semi-dot operator.

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76 A New Integer Programming Formulation for the Chinese Postman Problem with Time Dependent Travel Times

Authors: Jinghao Sun, Guozhen Tan, Guangjian Hou

Abstract:

The Chinese Postman Problem (CPP) is one of the classical problems in graph theory and is applicable in a wide range of fields. With the rapid development of hybrid systems and model based testing, Chinese Postman Problem with Time Dependent Travel Times (CPPTDT) becomes more realistic than the classical problems. In the literature, we have proposed the first integer programming formulation for the CPPTDT problem, namely, circuit formulation, based on which some polyhedral results are investigated and a cutting plane algorithm is also designed. However, there exists a main drawback: the circuit formulation is only available for solving the special instances with all circuits passing through the origin. Therefore, this paper proposes a new integer programming formulation for solving all the general instances of CPPTDT. Moreover, the size of the circuit formulation is too large, which is reduced dramatically here. Thus, it is possible to design more efficient algorithm for solving the CPPTDT in the future research.

Keywords: Chinese Postman Problem, Time Dependent, Integer Programming, Upper Bound Analysis.

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75 Dynamic Performances of Tubular Linear Induction Motor for Pneumatic Capsule Pipeline System

Authors: Wisuwat Plodpradista

Abstract:

Tubular linear induction motor (TLIM) can be used as a capsule pump in a large pneumatic capsule pipeline (PCP) system. Parametric performance evaluation of the designed 1-meter diameter PCP-TLIM system yields encouraging results for practical implementation. The capsule thrust and speed inside the TLIM pump can be calculated from the combination of the PCP fluid mechanics and the TLIM equations. The TLIM equivalent circuits derived from those of the conventional three-phase induction motor are used as a model to predict the static test results of a small-scale PCP-TLIM system. In this paper, additional dynamic tests are performed on the same small-scale PCP-TLIM system with two capsules of different diameters. The behaviors of the capsule inside the pump are observed and analyzed. The dynamic performances from the dynamic tests are compared with the theoretical predictions based on the TLIM equivalent circuit model.

Keywords: Pneumatic capsule pipeline, Tubular linear induction motor

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74 Decoupled, Reduced Order Model for Double Output Induction Generator Using Integral Manifolds and Iterative Separation Theory

Authors: M. Sedighizadeh, A. Rezazadeh

Abstract:

In this paper presents a technique for developing the computational efficiency in simulating double output induction generators (DOIG) with two rotor circuits where stator transients are to be included. Iterative decomposition is used to separate the flux– Linkage equations into decoupled fast and slow subsystems, after which the model order of the fast subsystems is reduced by neglecting the heavily damped fast transients caused by the second rotor circuit using integral manifolds theory. The two decoupled subsystems along with the equation for the very slowly changing slip constitute a three time-scale model for the machine which resulted in increasing computational speed. Finally, the proposed method of reduced order in this paper is compared with the other conventional methods in linear and nonlinear modes and it is shown that this method is better than the other methods regarding simulation accuracy and speed.

Keywords: DOIG, Iterative separation, Integral manifolds, Reduced order.

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73 Harmonic Pollution Caused by Non-Linear Load: Analysis and Identification

Authors: K. Khlifi, A. Haddouk, M. Hlaili, H. Mechergui

Abstract:

The present paper provides a detailed analysis of prior methods and approaches for non-linear load identification in residential buildings. The main goal of this analysis is to decipher the distorted signals and to estimate the harmonics influence on power systems. We have performed an analytical study of non-linear loads behavior in the residential environment. Simulations have been performed in order to evaluate the distorted rate of the current and follow his behavior. To complete this work, an instrumental platform has been realized to carry out practical tests on single-phase non-linear loads which illustrate the current consumption of some domestic appliances supplied with single-phase sinusoidal voltage. These non-linear loads have been processed and tracked in order to limit their influence on the power grid and to reduce the Joule effect losses. As a result, the study has allowed to identify responsible circuits of harmonic pollution.

Keywords: Distortion rate, harmonic analysis, harmonic pollution, non-linear load, power factor.

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72 Implementation of Adder-Subtracter Design with VerilogHDL

Authors: May Phyo Thwal, Khin Htay Kyi, Kyaw Swar Soe

Abstract:

According to the density of the chips, designers are trying to put so any facilities of computational and storage on single chips. Along with the complexity of computational and storage circuits, the designing, testing and debugging become more and more complex and expensive. So, hardware design will be built by using very high speed hardware description language, which is more efficient and cost effective. This paper will focus on the implementation of 32-bit ALU design based on Verilog hardware description language. Adder and subtracter operate correctly on both unsigned and positive numbers. In ALU, addition takes most of the time if it uses the ripple-carry adder. The general strategy for designing fast adders is to reduce the time required to form carry signals. Adders that use this principle are called carry look- ahead adder. The carry look-ahead adder is to be designed with combination of 4-bit adders. The syntax of Verilog HDL is similar to the C programming language. This paper proposes a unified approach to ALU design in which both simulation and formal verification can co-exist.

Keywords: Addition, arithmetic logic unit, carry look-ahead adder, Verilog HDL.

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71 An Inductive Coupling Based CMOS Wireless Powering Link for Implantable Biomedical Applications

Authors: Lei Yao, Jia Hao Cheong, Rui-Feng Xue, Minkyu Je

Abstract:

A closed-loop controlled wireless power transmission circuit block for implantable biomedical applications is described in this paper. The circuit consists of one front-end rectifier, power management sub-block including bandgap reference and low drop-out regulators (LDOs) as well as transmission power detection / feedback circuits. Simulation result shows that the front-end rectifier achieves 80% power efficiency with 750-mV single-end peak-to-peak input voltage and 1.28-V output voltage under load current of 4 mA. The power management block can supply 1.8mA average load current under 1V consuming only 12μW power, which is equivalent to 99.3% power efficiency. The wireless power transmission block described in this paper achieves a maximum power efficiency of 80%. The wireless power transmission circuit block is designed and implemented using UMC 65-nm CMOS/RF process. It occupies 1 mm × 1.2 mm silicon area.

Keywords: Implantable biomedical devices, wireless power transfer, LDO, rectifier, closed-loop power control

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70 Pre-Analysis of Printed Circuit Boards Based On Multispectral Imaging for Vision Based Recognition of Electronics Waste

Authors: Florian Kleber, Martin Kampel

Abstract:

The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show, that a higher contrast is achieved in the near infrared compared to ultraviolett and visible light.

Keywords: Electronic Waste, Recycling, Multispectral Imaging, Printed Circuit Boards, Rare-Earth Elements.

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69 Effect of Twelve Weeks Brisk Walking on Blood Pressure, Body Mass Index, and Anthropometric Circumference of Obese Males

Authors: Kaukab Azeem

Abstract:

Introduction: Obesity is a major health risk issue in the present day of life for one and all globally. Obesity is one of the major concerns for public health according to recent increasing trends in obesity-related diseases such as Type 2 diabetes. ( Kazuya, 1994).and hyperlipidemia, (Sakata,1990) .which are more prevalent in Japanese adults with body mass index (BMI) values Z25 kg/m2.( Japanese Ministry of Health and Welfare,1997). The purpose of the study was to assess the effect of twelve weeks of brisk walking on blood pressure and body mass index, anthropometric measurements of obese males. Method: Thirty obese (BMI= above 30) males, aged 18 to 22 years, were selected from King Fahd University of Petroleum & Minerals, Saudi Arabia. The subject-s height (cm) was measured using a stadiometer and body mass (kg) was measured with a electronic weighing machine. BMI was subsequently calculated (kg/m2). The blood pressure was measured with standardized sphygmomanometer in mm of Hg. All the measurements were taken twice before and twice after the experimental period. The pre and post anthropometric measurements of waist and hip circumference were measured with the steel tape in cm. The subjects underwent walking schedule two times in a week for 12 weeks. The 45 minute sessions of brisk walking were undertaken at an average intensity of 65% to 85% of maximum HR (HRmax; calculated as 220-age). Results & Discussion: Statistical findings revealed significant changes from pre test to post test in case of both systolic blood pressure and diastolic blood pressure in the walking group. Results also showed significant decrease in their body mass index and anthropometric measurements i.e. (waist & hip circumference). Conclusion: It was concluded that twelve weeks brisk walking is beneficial for lowering of blood pressure, body mass index, and anthropometric circumference of obese males.

Keywords: Anthropometric, Blood pressure, Body mass index

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68 Key Performance Indicators and the Model for Achieving Digital Inclusion for Smart Cities

Authors: Khalid Obaed Mahmod, Mesut Cevik

Abstract:

The term smart city has appeared recently and was accompanied by many definitions and concepts, but as a simplified and clear definition, it can be said that the smart city is a geographical location that has gained efficiency and flexibility in providing public services to citizens through its use of technological and communication technologies, and this is what distinguishes it from other cities. Smart cities connect the various components of the city through the main and sub networks in addition to a set of applications, and thus are able to collect data that is the basis for providing technological solutions to manage resources and provide services. The basis of the work of the smart city is the use of artificial intelligence (AI) and the technology of the Internet of Things (IoT). The work presents the concept of smart cities, the pillars, standards and evaluation indicators on which smart cities depend, and the reasons that prompted the world to move towards its establishment. It also provides a simplified hypothetical way to measure the ideal smart city model by defining some indicators and key pillars, simulating them with logic circuits and testing them to determine if the city can be considered an ideal smart city or not.

Keywords: Evaluation indicators, logic gates, performance factors, pillars, smart city.

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67 Design of an Efficient Retimed CIC Compensation Filter

Authors: Vishal Awasthi, Krishna Raj

Abstract:

Unwanted side effects because of spectral aliasing and spectral imaging during signal processing would be the major concern over the sampling rate alteration. Multirate-multistage implementation of digital filter could come about a large computational saving than single rate filter suitable for sample rate conversion. This implementation can further improve through high-level architectural transformation in circuit level. Reallocating registers and  relocating flip-flops across logic gates through retiming certainly a prominent sequential transformation technology, that optimize hardware circuits to achieve faster clocking speed without affecting the functionality. In this paper, we proposed an efficient compensated cascade Integrator comb (CIC) decimation filter structure that analyze the consequence of filter order variation which has a retimed FIR filter being compensator while using the cutset retiming technique and achieved an improvement in the passband droop by 14% to 39%, in computation time by 38.04%, 25.78%, 12.21%, 6.69% and 4.44% and reduction in path delay by 62.27%, 72%, 86.63%, 91.56% and 94.42% of 3, 6, 8, 12 and 24 order filter respectively than the non-retimed CIC compensation filter.

Keywords: Multirate Filtering, CIC decimation filter, Compensation theory, Retiming, Retiming algorithm, Filter order, Synchronous dataflow graph.

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66 Power Reduction by Automatic Monitoring and Control System in Active Mode

Authors: Somaye Abdollahi Pour, Mohsen Saneei

Abstract:

This paper describes a novel monitoring scheme to minimize total active power in digital circuits depend on the demand frequency, by adjusting automatically both supply voltage and threshold voltages based on circuit operating conditions such as temperature, process variations, and desirable frequency. The delay monitoring results, will be control and apply so as to be maintained at the minimum value at which the chip is able to operate for a given clock frequency. Design details of power monitor are examined using simulation framework in 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 40 μW for 32nm technology; moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop. This design provides up to 40% reduction in power consumption in active mode.

Keywords: active mode, delay monitor, body biasing, VDD scaling, low power.

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65 Quasi Multi-Pulse Back-to-Back Static Synchronous Compensator Employing Line Frequency Switching 2-Level GTO Inverters

Authors: A.M. Vural, K.C. Bayindir

Abstract:

Back-to-back static synchronous compensator (BtBSTATCOM) consists of two back-to-back voltage-source converters (VSC) with a common DC link in a substation. This configuration extends the capabilities of conventional STATCOM that bidirectional active power transfer from one bus to another is possible. In this paper, VSCs are designed in quasi multi-pulse form in which GTOs are triggered only once per cycle in PSCAD/EMTDC. The design details of VSCs as well as gate switching circuits and controllers are fully represented. Regulation modes of BtBSTATCOM are verified and tested on a multi-machine power system through different simulation cases. The results presented in the form of typical time responses show that practical PI controllers are almost robust and stable in case of start-up, set-point change, and line faults.

Keywords: Flexible AC Transmission Systems (FACTS), Backto-Back Static Synchronous Compensator (BtB-STATCOM), quasi multi-pulse voltage source converter, active power transfer; voltage control.

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64 An Examination and Validation of the Theoretical Resistivity-Temperature Relationship for Conductors

Authors: Fred Lacy

Abstract:

Electrical resistivity is a fundamental parameter of metals or electrical conductors. Since resistivity is a function of temperature, in order to completely understand the behavior of metals, a temperature dependent theoretical model is needed. A model based on physics principles has recently been developed to obtain an equation that relates electrical resistivity to temperature. This equation is dependent upon a parameter associated with the electron travel time before being scattered, and a parameter that relates the energy of the atoms and their separation distance. Analysis of the energy parameter reveals that the equation is optimized if the proportionality term in the equation is not constant but varies over the temperature range. Additional analysis reveals that the theoretical equation can be used to determine the mean free path of conduction electrons, the number of defects in the atomic lattice, and the ‘equivalent’ charge associated with the metallic bonding of the atoms. All of this analysis provides validation for the theoretical model and provides insight into the behavior of metals where performance is affected by temperatures (e.g., integrated circuits and temperature sensors).

Keywords: Callendar–van Dusen, conductivity, mean free path, resistance temperature detector, temperature sensor.

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63 Electrical Equivalent Analysis of Micro Cantilever Beams for Sensing Applications

Authors: B. G. Sheeparamatti, J. S. Kadadevarmath

Abstract:

Microcantilevers are the basic MEMS devices, which can be used as sensors, actuators and electronics can be easily built into them. The detection principle of microcantilever sensors is based on the measurement of change in cantilever deflection or change in its resonance frequency. The objective of this work is to explore the analogies between mechanical and electrical equivalent of microcantilever beams. Normally scientists and engineers working in MEMS use expensive software like CoventorWare, IntelliSuite, ANSYS/Multiphysics etc. This paper indicates the need of developing electrical equivalent of the MEMS structure and with that, one can have a better insight on important parameters, and their interrelation of the MEMS structure. In this work, considering the mechanical model of microcantilever, equivalent electrical circuit is drawn and using force-voltage analogy, it is analyzed with circuit simulation software. By doing so, one can gain access to powerful set of intellectual tools that have been developed for understanding electrical circuits Later the analysis is performed using ANSYS/Multiphysics - software based on finite element method (FEM). It is observed that both mechanical and electrical domain results for a rectangular microcantlevers are in agreement with each other.

Keywords: Electrical equivalent circuit analogy, FEM analysis, micro cantilevers, micro sensors.

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62 Improvement of Central Composite Design in Modeling and Optimization of Simulation Experiments

Authors: A. Nuchitprasittichai, N. Lerdritsirikoon, T. Khamsing

Abstract:

Simulation modeling can be used to solve real world problems. It provides an understanding of a complex system. To develop a simplified model of process simulation, a suitable experimental design is required to be able to capture surface characteristics. This paper presents the experimental design and algorithm used to model the process simulation for optimization problem. The CO2 liquefaction based on external refrigeration with two refrigeration circuits was used as a simulation case study. Latin Hypercube Sampling (LHS) was purposed to combine with existing Central Composite Design (CCD) samples to improve the performance of CCD in generating the second order model of the system. The second order model was then used as the objective function of the optimization problem. The results showed that adding LHS samples to CCD samples can help capture surface curvature characteristics. Suitable number of LHS sample points should be considered in order to get an accurate nonlinear model with minimum number of simulation experiments.

Keywords: Central composite design, CO2 liquefaction, Latin Hypercube Sampling, simulation – based optimization.

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61 Modeling and Simulation of Two-Phase Interleaved Boost Converter Using Open-Source Software Scilab/Xcos

Authors: Yin Yin Phyo, Tun Lin Naing

Abstract:

This paper investigated the simulation of two-phase interleaved boost converter (IBC) with free and open-source software Scilab/Xcos. By using interleaved method, it can reduce current stress on components, components size, input current ripple and output voltage ripple. The required mathematical model is obtained from the equivalent circuit of its different four modes of operation for simulation. The equivalent circuits are considered in continuous conduction mode (CCM). The average values of the system variables are derived from the state-space equation to find the equilibrium point. Scilab is now becoming more and more popular among students, engineers and scientists because it is open-source software and free of charge. It gives a great convenience because it has powerful computation and simulation function. The waveforms of output voltage, input current and inductors current are obtained by using Scilab/Xcos.

Keywords: Two-phase boost converter, continuous conduction mode, free and open-source, interleaved method, dynamic simulation.

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60 Study of Two Writing Schemes for a Magnetic Tunnel Junction Based On Spin Orbit Torque

Authors: K. Jabeur, L. D. Buda-Prejbeanu, G. Prenat, G. Di Pendina

Abstract:

MRAM technology provides a combination of fast access time, non-volatility, data retention and endurance. While a growing interest is given to two-terminal Magnetic Tunnel Junctions (MTJ) based on Spin-Transfer Torque (STT) switching as the potential candidate for a universal memory, its reliability is dramatically decreased because of the common writing/reading path. Three-terminal MTJ based on Spin-Orbit Torque (SOT) approach revitalizes the hope of an ideal MRAM. It can overcome the reliability barrier encountered in current two-terminal MTJs by separating the reading and the writing path. In this paper, we study two possible writing schemes for the SOT-MTJ device based on recently fabricated samples. While the first is based on precessional switching, the second requires the presence of permanent magnetic field. Based on an accurate Verilog-A model, we simulate the two writing techniques and we highlight advantages and drawbacks of each one. Using the second technique, pioneering logic circuits based on the three-terminal architecture of the SOT-MTJ described in this work are under development with preliminary attractive results.

Keywords: Spin orbit Torque, Magnetic Tunnel Junction, MRAM, Spintronic, Circuit simulation.

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59 A Nano-Scaled SRAM Guard Band Design with Gaussian Mixtures Model of Complex Long Tail RTN Distributions

Authors: Worawit Somha, Hiroyuki Yamauchi

Abstract:

This paper proposes, for the first time, how the challenges facing the guard-band designs including the margin assist-circuits scheme for the screening-test in the coming process generations should be addressed. The increased screening error impacts are discussed based on the proposed statistical analysis models. It has been shown that the yield-loss caused by the misjudgment on the screening test would become 5-orders of magnitude larger than that for the conventional one when the amplitude of random telegraph noise (RTN) caused variations approaches to that of random dopant fluctuation. Three fitting methods to approximate the RTN caused complex Gamma mixtures distributions by the simple Gaussian mixtures model (GMM) are proposed and compared. It has been verified that the proposed methods can reduce the error of the fail-bit predictions by 4-orders of magnitude.

Keywords: Mixtures of Gaussian, Random telegraph noise, EM algorithm, Long-tail distribution, Fail-bit analysis, Static random access memory, Guard band design.

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58 Experimental Implementation of Model Predictive Control for Permanent Magnet Synchronous Motor

Authors: Abdelsalam A. Ahmed

Abstract:

Fast speed drives for Permanent Magnet Synchronous Motor (PMSM) is a crucial performance for the electric traction systems. In this paper, PMSM is derived with a Model-based Predictive Control (MPC) technique. Fast speed tracking is achieved through optimization of the DC source utilization using MPC. The technique is based on predicting the optimum voltage vector applied to the driver. Control technique is investigated by comparing to the cascaded PI control based on Space Vector Pulse Width Modulation (SVPWM). MPC and SVPWM-based FOC are implemented with the TMS320F2812 DSP and its power driver circuits. The designed MPC for a PMSM drive is experimentally validated on a laboratory test bench. The performances are compared with those obtained by a conventional PI-based system in order to highlight the improvements, especially regarding speed tracking response.

Keywords: Permanent magnet synchronous motor, mode predictive control, optimization of DC source utilization, cascaded PI control, space vector pulse width modulation, TMS320F2812 DSP.

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57 Binary Decision Diagrams: An Improved Variable Ordering using Graph Representation of Boolean Functions

Authors: P.W. C. Prasad, A. Assi, A. Harb, V.C. Prasad

Abstract:

This paper presents an improved variable ordering method to obtain the minimum number of nodes in Reduced Ordered Binary Decision Diagrams (ROBDD). The proposed method uses the graph topology to find the best variable ordering. Therefore the input Boolean function is converted to a unidirectional graph. Three levels of graph parameters are used to increase the probability of having a good variable ordering. The initial level uses the total number of nodes (NN) in all the paths, the total number of paths (NP) and the maximum number of nodes among all paths (MNNAP). The second and third levels use two extra parameters: The shortest path among two variables (SP) and the sum of shortest path from one variable to all the other variables (SSP). A permutation of the graph parameters is performed at each level for each variable order and the number of nodes is recorded. Experimental results are promising; the proposed method is found to be more effective in finding the variable ordering for the majority of benchmark circuits.

Keywords: Binary decision diagrams, graph representation, Boolean functions representation, variable ordering.

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56 Generalized Mathematical Description and Simulation of Grid-Tied Thyristor Converters

Authors: V. S. Klimash, Ye Min Thu

Abstract:

Thyristor rectifiers, inverters grid-tied, and AC voltage regulators are widely used in industry, and on electrified transport, they have a lot in common both in the power circuit and in the control system. They have a common mathematical structure and switching processes. At the same time, the rectifier, but the inverter units and thyristor regulators of alternating voltage are considered separately both theoretically and practically. They are written about in different books as completely different devices. The aim of this work is to combine them into one class based on the unity of the equations describing electromagnetic processes, and then, to show this unity on the mathematical model and experimental setup. Based on research from mathematics to the product, a conclusion is made about the methodology for the rapid conduct of research and experimental design work, preparation for production and serial production of converters with a unified bundle. In recent years, there has been a transition from thyristor circuits and transistor in modular design. Showing the example of thyristor rectifiers and AC voltage regulators, we can conclude that there is a unity of mathematical structures and grid-tied thyristor converters.

Keywords: Direct current, alternating current, rectifier, AC voltage regulator, generalized mathematical model.

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55 A Novel FIFO Design for Data Transfer in Mixed Timing Systems

Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

In the current scenario, with the increasing integration densities, most system-on-chip designs are partitioned into multiple clock domains. In this paper, an asynchronous FIFO (First-in First-out pipeline) design is employed as a data transfer interface between two independent clock domains. Since the clocks on the either sides of the FIFO run at a different speed, the task to ensure the correct data transmission through this FIFO is manually performed. Firstly an existing asynchronous FIFO design is discussed and simulated. Gate-level simulation results depicted the flaw in existing design. In order to solve this problem, a novel modified asynchronous FIFO design is proposed. The results obtained from proposed design are in perfect accordance with theoretical expectations. The proposed asynchronous FIFO design outperforms the existing design in terms of accuracy and speed. In order to evaluate the performance of the FIFO designs presented in this paper, the circuits were implemented in 0.24µ TSMC CMOS technology and simulated at 2.5V using HSpice (© Avant! Corporation). The layout design of the proposed FIFO is also presented.

Keywords: Asynchronous, Clock, CMOS, C-element, FIFO, Globally Asynchronous Locally Synchronous (GALS), HSpice.

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54 An Enhanced Distributed System to improve theTime Complexity of Binary Indexed Trees

Authors: Ahmed M. Elhabashy, A. Baes Mohamed, Abou El Nasr Mohamad

Abstract:

Distributed Computing Systems are usually considered the most suitable model for practical solutions of many parallel algorithms. In this paper an enhanced distributed system is presented to improve the time complexity of Binary Indexed Trees (BIT). The proposed system uses multi-uniform processors with identical architectures and a specially designed distributed memory system. The analysis of this system has shown that it has reduced the time complexity of the read query to O(Log(Log(N))), and the update query to constant complexity, while the naive solution has a time complexity of O(Log(N)) for both queries. The system was implemented and simulated using VHDL and Verilog Hardware Description Languages, with xilinx ISE 10.1, as the development environment and ModelSim 6.1c, similarly as the simulation tool. The simulation has shown that the overhead resulting by the wiring and communication between the system fragments could be fairly neglected, which makes it applicable to practically reach the maximum speed up offered by the proposed model.

Keywords: Binary Index Tree (BIT), Least Significant Bit (LSB), Parallel Adder (PA), Very High Speed Integrated Circuits HardwareDescription Language (VHDL), Distributed Parallel Computing System(DPCS).

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53 A Review of Pharmacological Prevention of Peri-and Post-Procedural Myocardial Injury after Percutaneous Coronary Intervention

Authors: Syed Dawood Md. Taimur, Md. Hasanur Rahman, Syeda Fahmida Afrin, Farzana Islam

Abstract:

The concept of myocardial injury, although first recognized from animal studies, is now recognized as a clinical phenomenon that may result in microvascular damage, no-reflow phenomenon, myocardial stunning, myocardial hibernation and ischemic preconditioning. The final consequence of this event is left ventricular (LV) systolic dysfunction leading to increased morbidity and mortality. The typical clinical case of reperfusion injury occurs in acute myocardial infarction (MI) with ST segment elevation in which an occlusion of a major epicardial coronary artery is followed by recanalization of the artery. This may occur spontaneously or by means of thrombolysis and/or by primary percutaneous coronary intervention (PCI) with efficient platelet inhibition by aspirin (acetylsalicylic acid), clopidogrel and glycoprotein IIb/IIIa inhibitors. In recent years, percutaneous coronary intervention (PCI) has become a well-established technique for the treatment of coronary artery disease. PCI improves symptoms in patients with coronary artery disease and it has been increasing safety of procedures. However, peri- and post-procedural myocardial injury, including angiographical slow coronary flow, microvascular embolization, and elevated levels of cardiac enzyme, such as creatine kinase and troponin-T and -I, has also been reported even in elective cases. Furthermore, myocardial reperfusion injury at the beginning of myocardial reperfusion, which causes tissue damage and cardiac dysfunction, may occur in cases of acute coronary syndrome. Because patients with myocardial injury is related to larger myocardial infarction and have a worse long-term prognosis than those without myocardial injury, it is important to prevent myocardial injury during and/or after PCI in patients with coronary artery disease. To date, many studies have demonstrated that adjunctive pharmacological treatment suppresses myocardial injury and increases coronary blood flow during PCI procedures. In this review, we highlight the usefulness of pharmacological treatment in combination with PCI in attenuating myocardial injury in patients with coronary artery disease.

Keywords: Coronary artery disease, Percutaneous coronary intervention, Myocardial injury, Pharmacology.

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52 Dynamic Power Reduction in Sequential Circuits Using Look Ahead Clock Gating Technique

Authors: R. Manjith, C. Muthukumari

Abstract:

In this paper, a novel Linear Feedback Shift Register (LFSR) with Look Ahead Clock Gating (LACG) technique is presented to reduce the power consumption in modern processors and System-on-Chip. Clock gating is a predominant technique used to reduce unwanted switching of clock signals. Several clock gating techniques to reduce the dynamic power have been developed, of which LACG is predominant. LACG computes the clock enabling signals of each flip-flop (FF) one cycle ahead of time, based on the present cycle data of the flip-flops on which it depends. It overcomes the timing problems in the existing clock gating methods like datadriven clock gating and Auto-Gated flip-flops (AGFF) by allotting a full clock cycle for the determination of the clock enabling signals. Further to reduce the power consumption in LACG technique, FFs can be grouped so that they share a common clock enabling signal. Simulation results show that the novel grouped LFSR with LACG achieves 15.03% power savings than conventional LFSR with LACG and 44.87% than data-driven clock gating.

Keywords: AGFF, data-driven, LACG, LFSR.

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