Search results for: programmable resistor.

Authors: Rishabh Garg

Abstract:

Blockchain technology can allow remote, untrusted parties in the banking and financial sector to reach consensus on the state of databases without the involvement of gatekeepers. Like a bookkeeper, it can manage all financial transactions including payments, settlements, fundraising, securities management, loans, credits and trade finance. It can outperform existing systems in terms of identity verification, asset transfers, peer-to-peer transfers, hedge funds, security and auditability. Blockchain-based decentralized finance (DeFi) is a new financial protocol. Being open and programmable, it enables various DeFi use-cases, including asset management, tokenization, tokenized derivatives, decentralized autonomous organizations, data analysis and valuation, payments, lending and borrowing, insurance, margin trading, prediction market, gambling and yield-farming, etc. In addition, it can ease financial transactions, cash-flow, use of programmable currency, no-loss lotteries, etc. This paper aims to assess the potential of decentralized finance by leveraging the blockchain-enabled Ethereum platform as an alternative to traditional finance. The study also aims to find out the impact of decentralized finance on prediction markets, quadratic funding and crowd-funding, together with the potential challenges and solutions associated with its implementation.

Keywords: Advance trading, crowd funding, exchange tokens, fund aggregation, margin trading, quadratic funding, smart contracts, streaming money, token derivatives.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 269

Authors: Ioannis P. Panagopoulos, Christos C. Pavlatos, George K. Papakonstantinou

Abstract:

Conventional approaches in the implementation of logic programming applications on embedded systems are solely of software nature. As a consequence, a compiler is needed that transforms the initial declarative logic program to its equivalent procedural one, to be programmed to the microprocessor. This approach increases the complexity of the final implementation and reduces the overall system's performance. On the contrary, presenting hardware implementations which are only capable of supporting logic programs prevents their use in applications where logic programs need to be intertwined with traditional procedural ones, for a specific application. We exploit HW/SW codesign methods to present a microprocessor, capable of supporting hybrid applications using both programming approaches. We take advantage of the close relationship between attribute grammar (AG) evaluation and knowledge engineering methods to present a programmable hardware parser that performs logic derivations and combine it with an extension of a conventional RISC microprocessor that performs the unification process to report the success or failure of those derivations. The extended RISC microprocessor is still capable of executing conventional procedural programs, thus hybrid applications can be implemented. The presented implementation is programmable, supports the execution of hybrid applications, increases the performance of logic derivations (experimental analysis yields an approximate 1000% increase in performance) and reduces the complexity of the final implemented code. The proposed hardware design is supported by a proposed extended C-language called C-AG.

Keywords: Attribute Grammars, Logic Programming, RISC microprocessor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5039

Authors: S. Summart, C. Saetiaw, T. Thosdeekoraphat, C. Thongsopa

Abstract:

This article presents new current-mode oscillator circuits using CDTAs which is designed from block diagram. The proposed circuits consist of two CDTAs and two grounded capacitors. The condition of oscillation and the frequency of oscillation can be adjusted by electronic method. The circuits have high output impedance and use only grounded capacitors without any external resistor which is very appropriate to future development into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.

Keywords: Current-mode, Quadrature Oscillator, Block Diagram, CDTA.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1567

Authors: Talib Hashim Hasan

Abstract:

This paper describes simple implementation of homotopy (also called continuation) algorithm for determining the proper resistance of the resistor to dissipate energy at a specified rate of an electric circuit. Homotopy algorithm can be considered as a developing of the classical methods in numerical computing such as Newton-Raphson and fixed point methods. In homoptopy methods, an embedding parameter is used to control the convergence. The method purposed in this work utilizes a special homotopy called Newton homotopy. Numerical example solved in MATLAB is given to show the effectiveness of the purposed method

Keywords: electrical circuit homotopy, methods, MATLAB, Newton homotopy

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2980

Authors: Porag Jyoti Ligira, Gargi Khanna

Abstract:

The paper presents a simulation study of the electrical characteristic of Bulk Planar Junctionless Transistor (BPJLT) using spacer. The BPJLT is a transistor without any PN junctions in the vertical direction. It is a gate controlled variable resistor. The characteristics of BPJLT are analyzed by varying the oxide material under the gate. It can be shown from the simulation that an ideal subthreshold slope of ~60 mV/decade can be achieved by using highk dielectric. The effects of variation of spacer length and material on the electrical characteristic of BPJLT are also investigated in the paper. The ION / IOFF ratio improvement is of the order of 107 and the OFF current reduction of 10-4 is obtained by using gate dielectric of HfO2 instead of SiO2.

Keywords: BPJLT, double gate, high-k, spacer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1741

Authors: Hasan Çiçekli, Ahmet Gökçen, Uğur Çam

Abstract:

In this paper, a comparative performance analysis of mostly used four nonlinearity cancellation techniques used to realize the passive resistor by MOS transistors, is presented. The comparison is done by using an integrator circuit which is employing sequentially Op-amp, OTRA and ICCII as active element. All of the circuits are implemented by MOS-C realization and simulated by PSPICE program using 0.35μm process TSMC MOSIS model parameters. With MOS-C realization, the circuits became electronically tunable and fully integrable which is very important in IC design. The output waveforms, frequency responses, THD analysis results and features of the nonlinearity cancellation techniques are also given.

Keywords: Integrator circuits, MOS-C realization, nonlinearity cancellation, tunable resistors.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2067

Authors: A. Kamath, Z. X. Chen, C. J. Gu, F. Zheng, X. P. Wang, N. Singh, G-Q. Lo

Abstract:

In this paper we use low frequency noise analysis to understand and map the current conduction path in a multi gate junctionless FinFET.  The device used in this study behaves as a gated resistor and shows excellent short channel effect suppression due to its multi gate structure. Generally for a bulk conduction device like the junctionless device studied in this work, the low frequency noise can be modelled using the mobility fluctuation model; however for this device we can also see the effect of carrier fluctuations on the LFN characteristic. The noise characteristic at different gate bias and also the possible location of the traps is explained.

Keywords: LFN analysis, junctionless, Current conduction path, FinFET.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2064

Authors: Ibrahim A. Khorwat, Nabil Naas

Abstract:

In this paper, we present a simple circuit for Manchester decoding and without using any complicated or programmable devices. This circuit can decode 90kbps of transmitted encoded data; however, greater than this transmission rate can be decoded if high speed devices were used. We also present a new method for extracting the embedded clock from Manchester data in order to use it for serial-to-parallel conversion. All of our experimental measurements have been done using simulation.

Keywords: High threshold level, level segregation, lowthreshold level, smoothing circuit synchronization..

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3720

Authors: Moe Moe Htun, Khin Htar Nwe

Abstract:

In this paper, parallel interface for microprocessor trainer was implemented. A programmable parallel–port device such as the IC 8255A is initialized for simple input or output and for handshake input or output by choosing kinds of modes. The hardware connections and the programs can be used to interface microprocessor trainer and a personal computer by using IC 8255A. The assembly programs edited on PC-s editor can be downloaded to the trainer.

Keywords: Parallel I/O ports, parallel interface, trainer, two 8255 ICs.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3117

Authors: Prungsak Uttaphut

Abstract:

An implementation of current-mode multiphase sinusoidal oscillators is presented. Using CFTA-based lossy integrators, odd and odd/even phase systems can be realized with following advantages. The condition of oscillation and frequency of oscillation can be orthogonally tuned. The high output impedances facilitate easy driving an external load without additional current buffers. The proposed MSOs provide odd or even phase signals that are equally spaced in phase and equal amplitude. The circuit requires one CFTA, one resistor and one grounded capacitor per phase without additional current amplifier. The results of PSPICE simulations using CMOS CFTA are included to verify theory.

Keywords: multiphase sinusoidal oscillator, current-mode, CFTA, lossy integrator

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1564

Authors: D. P. Clayton, E. A. Ball

Abstract:

This paper describes an investigation into the isolation characteristics and bandwidth performance of radio frequency (RF) combiners that are used as part of Chireix power amplifier (PA) architectures, designed for use in the X-Band range of frequencies. Combiner designs investigated are the typical Chireix and Wilkinson configurations which also include simulation of the Wilkinson using manufacturer’s data for the isolation resistor. Another simulation was the less common approach of using a Branchline coupler to form the combiner, as well as simulation results from adding an additional stage. This paper presents the findings of this investigation and compares the bandwidth performance and isolation characteristics to determine suitability.

Keywords: Bandwidth, Chireix, couplers, outphasing, power amplifiers, Wilkinson, X-Band.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 124

Authors: P. Warnicke

Abstract:

Simulations of magnetic microstructure in elliptical Permalloy elements used for controlled motion of magnetic particles are discussed. The saturating field of the elliptical elements was studied with respect to lateral dimensions for one-vortex, cross-tie, diamond and double-diamond states as initial zero-field domain configurations. With aspect ratio of 1:3 the short axis was varied from 125 nm to 1000 nm, whereas the thickness was kept constant at 50 nm.

Keywords: Domain structure, magnetization, micromagnetics, Permalloy.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1344

Authors: Qingjiang Li, Hui Xu, Haijun Liu, Xiaobo Tian

Abstract:

To judge whether the memristor can be interpreted as the fourth fundamental circuit element, we propose a variable-relation criterion of fundamental circuit elements. According to the criterion, we investigate the nature of three fundamental circuit elements and the memristor. From the perspective of variables relation, the memristor builds a direct relation between the voltage across it and the current through it, instead of a direct relation between the magnetic flux and the charge. Thus, it is better to characterize the memristor and the resistor as two special cases of the same fundamental circuit element, which is the memristive system in Chua-s new framework. Finally, the definition of memristor is refined according to the difference between the magnetic flux and the flux linkage.

Keywords: Memristor, Fundamental, Variable-Relation Criterion, Memristive system

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1638

Authors: Shaharin A. Sulaiman, Mizuan Minhat

Abstract:

This paper presents development of an ignition system using spark electrodes for application in a research explosion vessel. A single spark is aimed to be discharged with quantifiable ignition energy. The spark electrode system would enable study of flame propagation, ignitability of fuel-air mixtures and other fundamental characteristics of flames. The principle of the capacitive spark circuit of ASTM is studied to charge an appropriate capacitance connected across the spark gap through a large resistor by a high voltage from the source of power supply until the initiation of spark. Different spark energies could be obtained mainly by varying the value of the capacitance and the supply current. The spark sizes produced are found to be affected by the spark gap, electrode size, input voltage and capacitance value.

Keywords: Ignition, Spark Electrode, Flame

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2051

Authors: Y. J. Huang, J. D. Yu, B. W. Hong, C. H. Tai, T. C. Kuo

Abstract:

In this paper, a multi-agent robot system is presented. The system consists of four robots. The developed robots are able to automatically enter and patrol a harmful environment, such as the building infected with virus or the factory with leaking hazardous gas. Further, every robot is able to perform obstacle avoidance and search for the victims. Several operation modes are designed: remote control, obstacle avoidance, automatic searching, and so on.

Keywords: autonomous robot, field programmable gate array, obstacle avoidance, ultrasonic sensor, wireless communication.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1735

Authors: Nishant Singh, Christian Huyck, Vaibhav Gandhi, Alexander Jones

Abstract:

A robotic arm and hand controlled by simulated neurons is presented. The robot makes use of a biological neuron simulator using a point neural model. The neurons and synapses are organised to create a finite state automaton including neural inputs from sensors, and outputs to effectors. The robot performs a simple pick-and-place task. This work is a proof of concept study for a longer term approach. It is hoped that further work will lead to more effective and flexible robots. As another benefit, it is hoped that further work will also lead to a better understanding of human and other animal neural processing, particularly for physical motion. This is a multidisciplinary approach combining cognitive neuroscience, robotics, and psychology.

Keywords: Robot, neuron, cell assembly, spiking neuron, force sensitive resistor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1914

Authors: Darwin Gouwanda, S. M. N. Arosha Senanayake, M. M. Danushka Ranjana Marasinghe, Mervin Chandrapal, Jeya Mithra Kumar, Tung Mun Hon, Yulius

Abstract:

This paper presents a real time force sensing instrument that is designed for human gait analysis purposes. This instrument mainly consists of three main elements: the force sensing mat, signal conditioning and switching circuit and data acquisition device. In order to control and to process the incoming signals from the force sensing mat, Force-Logger and Force-Reloader program are developed using Labview 8.0. This paper describes the architecture of the force sensing mat, signal conditioning and switching circuit and the real time streaming of the incoming data from the force sensing mat.

Keywords: Force platform, Force sensing resistor, human gait analysis

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2428

Authors: S. S. Deswal, Ratna Dahiya, D. K. Jain

Abstract:

Process control and energy conservation are the two primary reasons for using an adjustable speed drive. However, voltage sags are the most important power quality problems facing many commercial and industrial customers. The development of boost converters has raised much excitement and speculation throughout the electric industry. Now utilities are looking to these devices for performance improvement and reliability in a variety of areas. Examples of these include sags, spikes, or transients in supply voltage as well as unbalanced voltages, poor electrical system grounding, and harmonics. In this paper, simulations results are presented for the verification of the proposed boost converter topology. Boost converter provides ride through capability during sag and swell. Further, input currents are near sinusoidal. This eliminates the need of braking resistor also.

Keywords: Adjustable speed drive, power quality, boost converter, ride through capabilities.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1652

Authors: M. Aslam, Farrukh, A. R. Gardezi, Nasir Hayat

Abstract:

Automated material handling is given prime importance in the semi automated and automated facilities since it provides solution to the gigantic problems related to inventory and also support the latest philosophies like just in time production JIT and lean production. Automated storage and retrieval system is an antidote (if designed properly) to the facility sufferings like getting the right material , materials getting perished, long cycle times or many other similar kind of problems. A working model of automated storage and retrieval system (AS/RS) is designed and developed under the design parameters specified by Material Handling Industry of America (MHIA). Later on analysis was carried out to calculate the throughput and size of the machine. The possible implementation of this technology in local scenario is also discussed in this paper.

Keywords: Automated storage and retrieval system (AS/RS), Material handling, Computer integrated manufacturing (CIM), Lightdependent resistor (LDR)

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3371

Authors: Sašo Pečnik, Borut Žalik

Abstract:

This paper presents a real-time visualization technique and filtering of classified LiDAR point clouds. The visualization is capable of displaying filtered information organized in layers by the classification attribute saved within LiDAR datasets. We explain the used data structure and data management, which enables real-time presentation of layered LiDAR data. Real-time visualization is achieved with LOD optimization based on the distance from the observer without loss of quality. The filtering process is done in two steps and is entirely executed on the GPU and implemented using programmable shaders.

Keywords: Filtering, graphics, level-of-details, LiDAR, realtime visualization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2500

Authors: Sheroz Khan, Mustafa Zeki, Shihab Abdel Hameed, AHM Zahirul Alam, Aisha Hassan Abdalla, A. F. Salami, W. A. Lawal

Abstract:

A novel circuit for generating a signal embedded with features about data from three sensors is presented. This suggested circuit is making use of a resistance-to-time converter employing a bridge amplifier, an integrator and a comparator. The second resistive sensor (Rz) is transformed into duty cycle. Another bridge with varying resistor, (Ry) in the feedback of an OP AMP is added in series to change the amplitude of the resulting signal in a proportional relationship while keeping the same frequency and duty cycle representing proportional changes in resistors Rx and Rz already mentioned. The resultant output signal carries three types of information embedded as variations of its frequency, duty cycle and amplitude.

Keywords: Integrator, Comparator, Bridge Circuit, Resistanceto-Time Converter, Conditioning Circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1336

Authors: Jong-Bae Lee, Seongsoo Lee

Abstract:

Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.

Keywords: Local interconnect network, controller, transceiver, processor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1520

Authors: D. Gouwanda, S. M. N. A. Senanayake

Abstract:

This paper presents a real time force sensing instrument that is designed for human gait analysis purposes. It is capable of recording and monitoring ground reaction forces exerted by human foot during various activities such as walking, running and jumping in real time. In overall, force sensing mat mainly consists of three elements: the force sensing mat, signal conditioning circuit and data acquisition device. Force sensing mat is the mat that contains an array of force sensing elements. To control and process the incoming signal from the force sensing mat, Force-Logger and Force-Reloader are developed using National Instrument Labview. This paper describes the architecture of the force sensing mat, signal conditioning circuit and the real time streaming of the incoming data from the force sensing mat. Additionally, a preliminary experiment dataset is presented in this paper.

Keywords: Force platform, force sensing resistor, human gait analysis.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2266

Authors: Jaouadi Ikram, Machhout Mohsen

Abstract:

The development of a quantum key distribution (QKD) system on a field-programmable gate array (FPGA) platform is the subject of this paper. A quantum cryptographic protocol is designed based on the properties of quantum information and the characteristics of FPGAs. The proposed protocol performs key extraction, reconciliation, error correction, and privacy amplification tasks to generate a perfectly secret final key. We modeled the presence of the spy in our system with a strategy to reveal some of the exchanged information without being noticed. Using an FPGA card with a 100 MHz clock frequency, we have demonstrated the evolution of the error rate as well as the amounts of mutual information (between the two interlocutors and that of the spy) passing from one step to another in the key generation process.

Keywords: QKD, BB84, protocol, cryptography, FPGA, key, security, communication.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 809

Authors: Kar Foo Chong, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.

Keywords: CIC filter, decimation filter, half-band filter, lowpower.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2348

Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

Abstract:

This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3045

Authors: C. Ketviriyakit, W. Kongnun, C. Chanapromma, P. Silapan

Abstract:

This article proposes a voltage-mode multifunction filter using differential voltage current controllable current conveyor transconductance amplifier (DV-CCCCTA). The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the values of capacitors: the circuit description is very simple, consisting of merely 1 DV-CCCCTA, and 2 capacitors. Without any component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. Additionally, each function response can be selected by suitably selecting input signals with digital method. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation.

Keywords: DV-CCCCTA, Voltage-mode, Multifunction filter

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1313

Authors: Kritphon Phanruttanachai, Winai Jaikla

Abstract:

This article presents a current-mode quadrature oscillator using differential different current conveyor (DDCC) and voltage differencing transconductance amplifier (VDTA) as active elements. The proposed circuit is realized fro m a non-inverting lossless integrator and an inverting second order low-pass filter. The oscillation condition and oscillation frequency can be electronically/orthogonally controlled via input bias currents. The circuit description is very simple, consisting of merely 1 DDCC, 1 VDTA, 1 grounded resistor and 3 grounded capacitors. Using only grounded elements, the proposed circuit is then suitable for IC architecture. The proposed oscillator has high output impedance which is easy to cascade or dive the external load without the buffer devices. The PSPICE simulation results are depicted, and the given results agree well with the theoretical anticipation. The power consumption is approximately 1.76mW at ±1.25V supply voltages.

Keywords: Current-mode, oscillator, integrated circuit, DDCC, VDTA

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2347

Authors: Y. Bentoutou

Abstract:

Memory Errors Detection and Correction aim to secure the transaction of data between the central processing unit of a satellite onboard computer and its local memory. In this paper, the application of a double-bit error detection and correction method is described and implemented in Field Programmable Gate Array (FPGA) technology. The performance of the proposed EDAC method is measured and compared with two different EDAC devices, using the same FPGA technology. Statistical analysis of single-event upset (SEU) and multiple-bit upset (MBU) activity in commercial memories onboard the first Algerian microsatellite Alsat-1 is given.

Keywords: Error Detection and Correction, On-board computer, small satellite missions.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2176

Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

Abstract:

In this paper, the design of wide-swing constant transconductance (g_m) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (G_m) generated by the constant g_m bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in G_m with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the g_m variation is eventually concluded at between -3 % to 7 %. With the slight variation in the g_m value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S₂₁) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant g_m circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4081