Search results for: multi-sector array

Authors: Chien-Chun Hung, Chun-Fong Wu

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It is important for a commander to have real-time information to aware situations and to make decision in the battlefield. Results of modern technique developments have brought in this kind of information for military purposes. Unmanned aerial vehicle (UAV) is one of the means to gather intelligence owing to its widespread applications. It is still not clear whether or not the mini UAV with short-range wireless transmission system is used as a reconnaissance system in Taiwanese. In this paper, previous experience on the research of the sort of aerial vehicles has been applied with a data-relay system using the ZigBee modulus. The mini UAV developed is expected to be able to collect certain data in some appropriate theaters. The omni-directional antenna with high gain is also integrated into mini UAV to fit the size-reducing trend of airborne sensors. Two advantages are so far obvious. First, mini UAV can fly higher than usual to avoid being attacked from ground fires. Second, the data will be almost gathered during all maneuvering attitudes.

Keywords: Mini UAV, reconnaissance, wireless transmission, ZigBee modulus.

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Authors: Rohaya Abdul Wahab, Raja Mohd Fuad Tengku Aziz, Nazaliza Othman, Sharifah Saleh, Nabihah Razali, Rozaimah Baharim, Md Hanif Md Nasir

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This paper will discuss flip chip methodology, in which I/O pads, standard cells, macros and bump cells array are placed in the floorplan, then routed using Astro place and route tool. Final DRC and LVS checking is done using Calibre verification tool. The design vehicle to run this methodology is an OpenRISC design targeted to Silterra 0.18 micrometer technology with 6 metal layers for routing. Astro has extensive support for flip chip placement and routing. Astro tool commands for flip chip are straightforward approach like the conventional standard wire bond packaging. However since we do not have flip chip commands in our Astro tool, no LEF file for bump cell and no LEF file for flip chip I/O pad, we create our own methodology to prepare for future flip chip tapeout. 

Keywords: Astro, bump cell, Calibre, flip chip, LEF, methodology, SCHEME, TCL.

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Authors: Jessada Monthasuwan, Charinsak Saetiaw, Chanchai Thongsopa

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This paper presents the development and design of the curved rectangular patch arrays antenna for small missile application. This design uses a 0.1mm flexible copper sheet on the front layer and back layer, and a 1.8mm PVC substrate on a middle layer. The study used a small missile model with 122mm diameter size with speed 1.1 Mach and frequency range on ISM 2.4 GHz. The design of curved antenna can be installation on a cylindrical object like a missile. So, our proposed antenna design will have a small size, lightweight, low cost and simple structure. The antenna was design and analysis by a simulation result from CST microwave studio and confirmed with a measurement result from a prototype antenna. The proposed antenna has a bandwidth covering the frequency range 2.35-2.48 GHz, the return loss below -10 dB and antenna gain 6.5 dB. The proposed antenna can be applied with a small guided missile effectively.

Keywords: Rectangular path arrays, small missile antenna.

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Authors: Ferinar Moaidi, Mahdi Moaidi

Abstract:

Environmental issues and the ever-increasing in demand of electrical energy make it necessary to have distributed generation (DG) resources in the power system. In this research, in order to realize the goals of reducing losses and improving the voltage profile in a microgrid, the allocation and sizing of DGs have been used. The proposed Genetic Algorithm (GA) is described from the array of artificial intelligence methods for solving the problem. The algorithm is implemented on the IEEE 33 buses network. This study is presented in two scenarios, primarily to illustrate the effect of location and determination of DGs has been done to reduce losses and improve the voltage profile. On the other hand, decisions made with the one-level assumptions of load are not universally accepted for all levels of load. Therefore, in this study, load modelling is performed and the results are presented for multi-levels load state.

Keywords: Distributed generation, genetic algorithm, microgrid, load modelling, loss reduction, voltage improvement.

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Authors: B. Nasri, M. Bensaada

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We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

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Authors: Naveen Beri, S. Maheshwari, C. Sharma, Anil Kumar

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In this paper an attempt has been made to correlate the usefulness of electrodes made through powder metallurgy (PM) in comparison with conventional copper electrode during electric discharge machining. Experimental results are presented on electric discharge machining of AISI D2 steel in kerosene with copper tungsten (30% Cu and 70% W) tool electrode made through powder metallurgy (PM) technique and Cu electrode. An L18 (21 37) orthogonal array of Taguchi methodology was used to identify the effect of process input factors (viz. current, duty cycle and flushing pressure) on the output factors {viz. material removal rate (MRR) and surface roughness (SR)}. It was found that CuW electrode (made through PM) gives high surface finish where as the Cu electrode is better for higher material removal rate.

Keywords: Electrical discharge machining (EDM), Powder Metallurgy (PM), Taguchi method, Material Removal Rate (MRR), Surface Roughness (SR).

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Authors: Wei Zha, Jingzeng Zhang, Chen Zhao, Ran Cai, Xueyuan Nie

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Cathodic plasma electrolysis (CPE) is used to create surface textures on cast iron samples for improving the tribological properties. Micro craters with confined size distribution were successfully formed by CPE process. These craters can generate extra hydrodynamic pressure that separates two sliding surfaces, increase the oil film thickness and accelerate the transition from boundary to mixed lubrication. It was found that the optimal crater size was 1.7 μm, at which the maximum lubrication efficiency was achieved. The Taguchi method was used to optimize the process parameters (voltage and roughness) for CPE surface texturing. The orthogonal array and the signal-to-noise ratio were employed to study the effect of each process parameter on the coefficient of friction. The results showed that with higher voltage and lower roughness, the lower friction coefficient can be obtained, and thus the lubrication can be more efficiently used for friction reduction.

Keywords: Cathodic plasma electrolysis, friction, lubrication, plasma surface texturing.

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Authors: Gaysu R. Arvind

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In policy discourse of 1990s, more inclusive spaces have been constructed for realizing full and meaningful participation of common people in education. These participatory spaces provide an alternative possibility for universalizing elementary education against the backdrop of a history of entrenched forms of social and economical exclusion; inequitable education provisions; and shrinking role of the state in today-s neo-liberal times. Drawing on case-studies of bottom-up approaches to school governance, the study examines an array of innovative ways through which poor people gained a sense of identity and agency by evolving indigenous solutions to issues regarding schooling of their children. In the process, state-s institutions and practices became more accountable and responsive to educational concerns of the marginalized people. The deliberative participation emerged as an active way of experiencing deeper forms of empowerment and democracy than its passive realization as mere bearers of citizen rights.

Keywords: Deliberative Forum, Inclusive Spaces, Participatory Governance, People's Agency

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Authors: Gopi Ram, Durbadal Mandal, Rajib Kar, Sakti Prasad Ghoshal

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A design problem of non-uniform circular antenna arrays for maximum reduction of both the side lobe level (SLL) and first null beam width (FNBW) is dealt with. This problem is modeled as a simple optimization problem. The method of Firefly algorithm (FFA) is used to determine an optimal set of current excitation weights and antenna inter-element separations that provide radiation pattern with maximum SLL reduction and much improvement on FNBW as well. Circular array antenna laid on x-y plane is assumed. FFA is applied on circular arrays of 8-, 10-, and 12- elements. Various simulation results are presented and hence performances of side lobe and FNBW are analyzed. Experimental results show considerable reductions of both the SLL and FNBW with respect to those of the uniform case and some standard algorithms GA, PSO and SA applied to the same problem.

Keywords: Circular arrays, First null beam width, Side lobe level, FFA.

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Authors: Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab, Fatma H. Elfouly

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Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the comparison between the Haar and Daubechies wavelets is investigated. The Bit Error Rat (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. It is seen that the BER using Daubechies wavelet techniques is less than Haar wavelet. The design procedure has been explained and designed using the stat-of-art Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: E. E. El-Kholy, Ahamed Kalas, Mahmoud Fauzy, M. El-Shahat Dessouki, Abdou. M. El-Refay, Mohammed El-Zefery

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Direct Torque Control (DTC) is an AC drive control method especially designed to provide fast and robust responses. In this paper a progressive algorithm for direct torque control of threephase induction drive system supplied by photovoltaic arrays using voltage source inverter to control motor torque and flux with maximum power point tracking at different level of insolation is presented. Experimental results of the new DTC method obtained by an experimental rapid prototype system for drives are presented. Simulation and experimental results confirm that the proposed system gives quick, robust torque and speed responses at constant switching frequencies.

Keywords: Photovoltaic (PV) array, direct torque control (DTC), constant switching frequency, induction motor, maximum power point tracking (MPPT).

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Authors: Basit Shahzad, Muhammad Tanvir Afzal

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Many algorithms are available for sorting the unordered elements. Most important of them are Bubble sort, Heap sort, Insertion sort and Shell sort. These algorithms have their own pros and cons. Shell Sort which is an enhanced version of insertion sort, reduces the number of swaps of the elements being sorted to minimize the complexity and time as compared to insertion sort. Shell sort improves the efficiency of insertion sort by quickly shifting values to their destination. Average sort time is O(n1.25), while worst-case time is O(n1.5). It performs certain iterations. In each iteration it swaps some elements of the array in such a way that in last iteration when the value of h is one, the number of swaps will be reduced. Donald L. Shell invented a formula to calculate the value of ?h?. this work focuses to identify some improvement in the conventional Shell sort algorithm. ''Enhanced Shell Sort algorithm'' is an improvement in the algorithm to calculate the value of 'h'. It has been observed that by applying this algorithm, number of swaps can be reduced up to 60 percent as compared to the existing algorithm. In some other cases this enhancement was found faster than the existing algorithms available.

Keywords: Algorithm, Computation, Shell, Sorting.

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Authors: Cyrille Lambert, Tatiana Kalganova, Emanuele Stomeo

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Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware (EHW), a period of intense creativity has followed. It has been actively researched, developed and applied to various problems. Different approaches have been proposed that created three main classifications: extrinsic, mixtrinsic and intrinsic EHW. Each of these solutions has a real interest. Nevertheless, although the extrinsic evolution generates some excellent results, the intrinsic systems are not so advanced. This paper suggests 3 possible solutions to implement the run-time configuration intrinsic EHW system: FPGA-based Run-Time Configuration system, JBits-based Run-Time Configuration system and Multi-board functional-level Run-Time Configuration system. The main characteristic of the proposed architectures is that they are implemented on Field Programmable Gate Array. A comparison of proposed solutions demonstrates that multi-board functional-level run-time configuration is superior in terms of scalability, flexibility and the implementation easiness.

Keywords: Evolvable hardware, evolutionary computation, FPGA systems.

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Authors: Konstantin Movsovic, Emanuele Stomeo, Tatiana Kalganova

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The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits.

Keywords: Evolvable hardware, evolutionary algorithm, digitallogic circuit, mutation rate.

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Authors: Balwinder Singh

Abstract:

The present research is a paper on the characterization of aluminum alloy-6063 hybrid metal matrix composites using three different reinforcement materials (SiC, red mud, and fly ash) through stir casting method. The red mud was used in solid form, and particle size range varies between 103-150 µm. During this investigation, fly ash is received from Guru Nanak Dev Thermal Plant (GNDTP), Bathinda. The study has been done by using Taguchi’s L9 orthogonal array by taking fraction wt.% (SiC 5%, 7.5%, and 10% and Red Mud and Fly Ash 2%, 4%, and 6%) as input parameters with their respective levels. The study of the mechanical properties (tensile strength, impact strength, and microhardness) has been done by using Analysis of Variance (ANOVA) with the help of MINITAB 17 software. It is revealed that silicon carbide is the most significant parameter followed by red mud and fly ash affecting the mechanical properties, respectively. The fractured surface morphology of the composites using Field Emission Scanning Electron Microscope (FESEM) shows that there is a good mixing of reinforcement particles in the matrix. Energy-dispersive X-ray spectroscopy (EDS) was performed to know the presence of the phases of the reinforced material.

Keywords: Reinforcement, silicon carbide, fly ash, red mud.

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Authors: Fatma H. Elfouly, Mohamed I. Mahmoud, Moawad I. M. Dessouky, Salah Deyab

Abstract:

Recently, the Field Programmable Gate Array (FPGA) technology offers the potential of designing high performance systems at low cost. The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementation of the transform falls short of meeting real-time processing requirements of most application. The objectives of this paper are implement the Haar and Daubechies wavelets using FPGA technology. In addition, the Bit Error Rate (BER) between the input audio signal and the reconstructed output signal for each wavelet is calculated. From the BER, it is seen that the implementations execute the operation of the wavelet transform correctly and satisfying the perfect reconstruction conditions. The design procedure has been explained and designed using the stat-ofart Electronic Design Automation (EDA) tools for system design on FPGA. Simulation, synthesis and implementation on the FPGA target technology has been carried out.

Keywords: Daubechies wavelet, discrete wavelet transform, Haar wavelet, Xilinx FPGA.

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Authors: Makoto Nagatomo, Yasuo Uchida, Makoto Sakamoto, Tuo Zhang, Tatsuma Kurogi, Takao Ito, Tsunehiro Yoshinaga, Satoshi Ikeda, Masahiro Yokomichi, Hiroshi Furutani

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This paper presents a four-dimensional computational model, k-neighborhood template A-type three-dimensional bounded cellular acceptor (abbreviated as A-3BCA(k)), and discusses the hierarchical properties. An A-3BCA(k) is a four-dimensional automaton which consists of a pair of a converter and a configuration-reader. The former converts the given four-dimensional tape to the three- and two- dimensional configuration and the latter determines the acceptance or nonacceptance of given four-dimensional tape whether or not the derived two-dimensional configuration is accepted. We mainly investigate the difference of the accepting power based on the difference of the configuration-reader. It is shown that the difference of the accepting power of the configuration-reader tends to affect directly that of the A-3BCA(k) for the case when the converter is deterministic. On the other hand, results are not analogous for the nondeterministic case.

Keywords: Cellular acceptor, configuration-reader, converter, finite automaton, four-dimension, on-line tessellation acceptor, parallel/sequential array acceptor, turing machine.

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Authors: Krishna Mohana Rao, G. Ravi Kumar, P. Sowmya

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This paper presents a study of the Taguchi design application to optimize surface quality in damper inserted end milling operation. Maintaining good surface quality usually involves additional manufacturing cost or loss of productivity. The Taguchi design is an efficient and effective experimental method in which a response variable can be optimized, given various factors, using fewer resources than a factorial design. This Study included spindle speed, feed rate, and depth of cut as control factors, usage of different tools in the same specification, which introduced tool condition and dimensional variability. An orthogonal array of L9(3^4)was used; ANOVA analyses were carried out to identify the significant factors affecting surface roughness, and the optimal cutting combination was determined by seeking the best surface roughness (response) and signal-to-noise ratio. Finally, confirmation tests verified that the Taguchi design was successful in optimizing milling parameters for surface roughness.

Keywords: ANOVA, Damper, End Milling, Optimization, Surface roughness, Taguchi design.

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Authors: Lydia Chan, Islam Shyha, Dale Dreyer, John Hamilton, Phil Hackney

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Nickel-based superalloys are generally known to be difficult to cut due to their strength, low thermal conductivity, and high work hardening tendency. Superalloy such as alloy 625 is often used in the oil and gas industry as a surfacing material to provide wear and corrosion resistance to components. The material is typically applied onto a metallic substrate through weld overlay cladding, an arc welding technique. Cladded surfaces are always rugged and carry a tough skin; this creates further difficulties to the machining process. The present work utilised design of experiment to optimise the internal cylindrical rough turning for weld overlay surfaces. An L27 orthogonal array was used to assess effects of the four selected key process variables: cutting insert, depth of cut, feed rate, and cutting speed. The optimal cutting conditions were determined based on productivity and the level of tool wear.

Keywords: Cylindrical turning, nickel superalloy, turning of overlay, weld overlay.

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Authors: Y. T. Yang, H. S. Peng, H. T. Hsu

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This study presents the numerical simulation of optimum pin-fin heat sink with air impinging cooling by using Taguchi method. 9 L ( 4 3 ) orthogonal array is selected as a plan for the four design-parameters with three levels. The governing equations are discretized by using the control-volume-based-finite-difference method with a power-law scheme on the non-uniform staggered grid. We solved the coupling of the velocity and the pressure terms of momentum equations using SIMPLEC algorithm. We employ the k −ε two-equations turbulence model to describe the turbulent behavior. The parameters studied include fin height H (35mm-45mm), inter-fin spacing a , b , and c (2 mm-6.4 mm), and Reynolds number ( Re = 10000- 25000). The objective of this study is to examine the effects of the fin spacings and fin height on the thermal resistance and to find the optimum group by using the Taguchi method. We found that the fin spacings from the center to the edge of the heat sink gradually extended, and the longer the fin’s height the better the results. The optimum group is 3 1 2 3 H a b c . In addition, the effects of parameters are ranked by importance as a , H , c , and b .

Keywords: Heat sink, Optimum, Electronics cooling, CFD.

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Authors: Tian Kai, Yang Sheng-sheng, Li De-tian, Miao Yu-jun, Xue Yu-xiong Wang Yi, Yan Ze-dong, Ma Ya-li, ZHuang Jian-hong

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The charge-exchange xenon (CEX) ion generated by ion thruster can backflow to the surface of spacecraft and threaten to the safety of spacecraft operation. In order to evaluate the effects of the induced plasma environment in backflow regions on the spacecraft, we designed a spherical single Langmuir probe of 5.8cm in diameter for measuring low-density plasma parameters in backflow region of ion thruster. In practice, the tests are performed in a two-dimensional array (40cm×60cm) composed of 20 sites. The experiment results illustrate that the electron temperature ranges from 3.71eV to 3.96eV, with the mean value of 3.82eV and the standard deviation of 0.064eV. The electron density ranges from 8.30×1012/m3 to 1.66×1013/m3, with the mean value of 1.30×1013/m3 and the standard deviation of 2.15×1012/m3. All data is analyzed according to the “ideal" plasma conditions of Maxwellian distributions.

Keywords: Langmuir Probe, Plasma parameters, Ion thruster, Backflow region.

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Authors: Abbas Al-Refaie

Abstract:

This paper aims at improving the performance of the tableting process using statistical quality control and fuzzy goal programming. The tableting process was studied. Statistical control tools were used to characterize the existing process for three critical responses including the averages of a tablet’s weight, hardness, and thickness. At initial process factor settings, the estimated process capability index values for the tablet’s averages of weight, hardness, and thickness were 0.58, 3.36, and 0.88, respectively. The L₉ array was utilized to provide experimentation design. Fuzzy goal programming was then employed to find the combination of optimal factor settings. Optimization results showed that the process capability index values for a tablet’s averages of weight, hardness, and thickness were improved to 1.03, 4.42, and 1.42, respectively. Such improvements resulted in significant savings in quality and production costs.

Keywords: Fuzzy goal programming, control charts, process capability, tablet optimization.

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Authors: A. Vani, M. N. Mamatha

Abstract:

Visual signal processing in human beings occurs in the occipital lobe of the brain. The signals that are generated in the brain are universal for all the human beings and they are called Visual Evoked Potential (VEP). Generally, the visually impaired people lose sight because of severe damage to only the eyes natural photo sensors, but the occipital lobe will still be functioning. In this paper, a technique of artificially generating VEP is proposed to enhance the visual ability of the subject. The system uses the electrical photoreceptors to capture image, process the image, to detect and recognize the subject or object. This voltage is further processed and can transmit wirelessly to a BIOMEMS implanted into occipital lobe of the patient’s brain. The proposed BIOMEMS consists of array of electrodes that generate the neuron potential which is similar to VEP of normal people. Thus, the neurons get the visual data from the BioMEMS which helps in generating partial vision or sight for the visually challenged patient. 

Keywords: Visual evoked potential, OpenViBe, BioMEMS, Neuro prosthesis.

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Authors: P. V. V. Rama Rao, B. Kali Prasanna, Y. T. R. Palleswari

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Renewable energy is derived from natural processes that are replenished constantly. Included in the definition is electricity and heat generated from solar, wind, ocean, hydropower, biomass, geothermal resources, and bio-fuels and hydrogen derived from renewable resources. Each of these sources has unique characteristics which influence how and where they are used. This paper presents the modeling the simulation of solar and hydro hybrid energy sources in MATLAB/SIMULINK environment. It simulates all quantities of Hybrid Electrical Power system (HEPS) such as AC output current of the inverter that injected to the load/grid, load current, grid current. It also simulates power output from PV and Hydraulic Turbine Generator (HTG), power delivered to or from grid and finally power factor of the inverter for PV, HTG and grid. The proposed circuit uses instantaneous p-q (real-imaginary) power theory.

Keywords: Photovoltaic Array, Hydraulic Turbine Generator, Electrical Utility (EU), Hybrid Electrical Power Supply.

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Authors: Farid Arya, Trevor Hyde, Andrea Trevisi, Paolo Basso, Danilo Bardaro

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Heat transfer through multiple pane windows can be reduced by creating a vacuum pressure less than 0.1 Pa between the glass panes, with low emittance coatings on one or more of the internal surfaces. Fabrication of vacuum glazing (VG) requires the formation of a hermetic seal around the periphery of the glass panes together with an array of support pillars between the panes to prevent them from touching under atmospheric pressure. Atmospheric pressure and temperature differentials induce stress which can affect the integrity of the glazing. Several parameters define the stresses in VG including the glass thickness, pillar specifications, glazing dimensions and edge seal configuration. Inherent stresses in VG can result in fractures in the glass panes and failure of the edge seal. In this study, stress in VG with different glass thicknesses is theoretically studied using Finite Element Modelling (FEM). Based on the finding in this study, suggestions are made to address problems resulting from the use of thinner glass panes in the fabrication of VG. This can lead to the development of high performance, light and thin VG.

Keywords: ABAQUS, glazing, stress, vacuum glazing, vacuum insulation.

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Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

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This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

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Authors: Amoljit S. Gill, Sanjeev Kumar

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In this study, Electrical Discharge Machining (EDM) is used to modify the surface of high carbon steel En31 with the help of tool electrode (Copper-Chromium-Nickel) manufactured by powder metallurgy (PM) process. The effect of EDM on surface roughness during surface alloying is studied. Taguchi’s Design of experiment (DOE) and L18 orthogonal array is used to find the best level of input parameters in order to achieve high surface finish. Six input parameters are considered and their percentage contribution towards surface roughness is investigated by analysis of variances (ANOVA). Experimental results show that an hard alloyed surface (1.21% carbon, 2.14% chromium and 1.38% nickel) with surface roughness of 3.19µm can be generated using EDM with PM tool. Additionally, techniques like Scanning Electron Microscope (SEM) and Energy Dispersive Spectroscopy (EDS) are used to analyze the machined surface and EDMed layer composition, respectively. The increase in machined surface micro-hardness (101%) may be related to the formation of carbides containing chromium.

Keywords: Electrical Discharge Machining, Surface Roughness, Powder metallurgy compact tools, Taguchi DOE technique.

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Authors: W. Koranuntachai, T. Chantrasmi, U. Nontakaew

Abstract:

Medical latex gloves are made from the latex compound in production lines. Latex dipping is considered one of the most important processes that directly affect the final product quality. In a continuous production line, a chain conveyor carries the formers through the process and partially submerges them into an open channel flow in a latex dipping tank. In general, the conveyor speed is determined by the desired production capacity, and the latex-dipping tank can then be designed accordingly. It is important to understand the flow behavior in the dipping tank in order to achieve high quality in the process. In this work, Computational Fluid Dynamics (CFD) was used to simulate the flow past an array of formers in a simplified latex dipping process. The computational results showed both the flow structure and the vortex generation between two formers. The maximum shear stress over the surface of the formers was used as the quality metric of the latex-dipping process when adjusting operation parameters.

Keywords: medical latex gloves, latex dipping, dipping tank, computational fluid dynamics

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Authors: Kavita H. Dhanawade, Hanamant S. Dhanawade

Abstract:

Heat transfer enhancement objects like extended surfaces, fins etc. are chosen for their thermal performance as well as for other design parameters depending on various applications. The present paper is on experimental study to investigate the heat transfer enhancement through wire mesh fin arrays equipped with horizontal base plate. The data used in performance analysis were obtained experimentally for the material (mild steel) for different heat inputs such as 40, 60, 80, 100 and 120 watt, by varying wire mesh diameter, fin height and spacing between two fin arrays. Using the Taguchi experimental design method, optimum design parameters and their levels were investigated. Average heat transfer coefficient was considered as a performance characteristic parameter. An L₉ (3³) orthogonal array was selected as an experimental plan. Optimum results were found by experimenting. It is observed that the wire mesh diameter and fin height have a higher impact on heat transfer coefficient as compared to spacing between two fin arrays.

Keywords: Heat transfer enhancement, finned surface, wire mesh diameter, natural convection.

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Authors: Montree Kumngern, Kobchai Dejhan

Abstract:

Versatile dual-mode class-AB CMOS four-quadrant analog multiplier circuit is presented. The dual translinear loops and current mirrors are the basic building blocks in realization scheme. This technique provides; wide dynamic range, wide-bandwidth response and low power consumption. The major advantages of this approach are; its has single ended inputs; since its input is dual translinear loop operate in class-AB mode which make this multiplier configuration interesting for low-power applications; current multiplying, voltage multiplying, or current and voltage multiplying can be obtainable with balanced input. The simulation results of versatile analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth of about 19MHz, a maximum power consumption of 0.46mW, and temperature compensated. Operation of versatile analog multiplier was also confirmed through an experiment using CMOS transistor array.

Keywords: Class-AB, dual-mode CMOS analog multiplier, CMOS analog integrated circuit, CMOS translinear integrated circuit.

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