Search results for: digitally controlled oscillator (DCO)
714 A Novel Low Power Digitally Controlled Oscillator with Improved linear Operating Range
Authors: Nasser Erfani Majd, Mojtaba Lotfizad
Abstract:In this paper, an ultra low power and low jitter 12bit CMOS digitally controlled oscillator (DCO) design is presented. Based on a ring oscillator implemented with low power Schmitt trigger based inverters. Simulation of the proposed DCO using 32nm CMOS Predictive Transistor Model (PTM) achieves controllable frequency range of 550MHz~830MHz with a wide linearity and high resolution. Monte Carlo simulation demonstrates that the time-period jitter due to random power supply fluctuation is under 31ps and the power consumption is 0.5677mW at 750MHz with 1.2V power supply and 0.53-ps resolution. The proposed DCO has a good robustness to voltage and temperature variations and better linearity comparing to the conventional design.
Keywords: digitally controlled oscillator (DCO), low power, jitter; good linearity, robustProcedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1750
713 Low Jitter ADPLL based Clock Generator for High Speed SoC Applications
Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam
Abstract:An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.
Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2927
712 Design of an Ultra Low Power Low Phase Noise CMOS LC Oscillator
Authors: Mahdi Ebrahimzadeh
Abstract:In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.
Keywords: LC oscillator, Low Power, Low Phase NoiseProcedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3619
711 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction
Authors: Jun Wang, Tingcun Wei
The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.
Keywords: DPWM, PLL megafunction, FPGA, time resolution, digitally-controlled DC-DC switching converter.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1116
710 Current-Mode Resistorless SIMO Universal Filter and Four-Phase Quadrature Oscillator
Authors: Jie Jin
In this paper, a new CMOS current-mode single input and multi-outputs (SIMO) universal filter and quadrature oscillator with a similar circuit are proposed. The circuits only consist of three Current differencing transconductance amplifiers (CDTA) and two grounded capacitors, which are resistorless, and they are suitable for monolithic integration. The universal filter uses minimum CDTAs and passive elements to realize SIMO type low-pass (LP), high-pass (HP), band-pass (BP) band-stop (BS) and all-pass (AP) filter functions simultaneously without any component matching conditions. The angular frequency (ω0) and the quality factor (Q) of the proposed filter can be electronically controlled and tuned orthogonal. By some modifications of the filter, a new current-mode four-phase quadrature oscillator (QO) can be obtained easily. The condition of oscillation (CO) and frequency of oscillation (FO) of the QO can be controlled electronically and independently through the bias current of the CDTAs, and it is suitable for variable frequency oscillator. Moreover, all the passive and active sensitivities of the circuits are low. SPICE simulation results are included to confirm the theory.
Keywords: Universal Filter, Quadrature Oscillator, Current mode, Current differencing transconductance amplifiers.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1841
709 Digital Control Algorithm Based on Delta-Operator for High-Frequency DC-DC Switching Converters
Authors: Renkai Wang, Tingcun Wei
In this paper, a digital control algorithm based on delta-operator is presented for high-frequency digitally-controlled DC-DC switching converters. The stability and the controlling accuracy of the DC-DC switching converters are improved by using the digital control algorithm based on delta-operator without increasing the hardware circuit scale. The design method of voltage compensator in delta-domain using PID (Proportion-Integration- Differentiation) control is given in this paper, and the simulation results based on Simulink platform are provided, which have verified the theoretical analysis results very well. It can be concluded that, the presented control algorithm based on delta-operator has better stability and controlling accuracy, and easier hardware implementation than the existed control algorithms based on z-operator, therefore it can be used for the voltage compensator design in high-frequency digitally- controlled DC-DC switching converters.
Keywords: Digitally-controlled DC-DC switching converter, finite word length, control algorithm based on delta-operator, high-frequency, stability.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1010
708 Third Order Current-mode Quadrature Sinusoidal Oscillator with High Output Impedances
Authors: Kritphon Phanruttanachai, Winai Jaikla
Abstract:This article presents a current-mode quadrature oscillator using differential different current conveyor (DDCC) and voltage differencing transconductance amplifier (VDTA) as active elements. The proposed circuit is realized fro m a non-inverting lossless integrator and an inverting second order low-pass filter. The oscillation condition and oscillation frequency can be electronically/orthogonally controlled via input bias currents. The circuit description is very simple, consisting of merely 1 DDCC, 1 VDTA, 1 grounded resistor and 3 grounded capacitors. Using only grounded elements, the proposed circuit is then suitable for IC architecture. The proposed oscillator has high output impedance which is easy to cascade or dive the external load without the buffer devices. The PSPICE simulation results are depicted, and the given results agree well with the theoretical anticipation. The power consumption is approximately 1.76mW at ±1.25V supply voltages.
Keywords: Current-mode, oscillator, integrated circuit, DDCC, VDTAProcedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2228
707 An Approximate Solution of the Classical Van der Pol Oscillator Coupled Gyroscopically to a Linear Oscillator Using Parameter-Expansion Method
Authors: Mohammad Taghi Darvishi, Samad Kheybari
In this article, we are dealing with a model consisting of a classical Van der Pol oscillator coupled gyroscopically to a linear oscillator. The major problem is analyzed. The regular dynamics of the system is considered using analytical methods. In this case, we provide an approximate solution for this system using parameter-expansion method. Also, we find approximate values for frequencies of the system. In parameter-expansion method the solution and unknown frequency of oscillation are expanded in a series by a bookkeeping parameter. By imposing the non-secularity condition at each order in the expansion the method provides different approximations to both the solution and the frequency of oscillation. One iteration step provides an approximate solution which is valid for the whole solution domain.
Keywords: Parameter-expansion method, classical Van der Pol oscillator.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1737
706 Implementation of Second Order Current- Mode Quadrature Sinusoidal Oscillator with Current Controllability
Authors: Koson Pitaksuttayaprot, Winai Jaikla
Abstract:The realization of current-mode quadrature oscillators using current controlled current conveyor transconductance amplifiers (CCCCTAs) and grounded capacitors is presented. The proposed oscillators can provide 2 sinusoidal output currents with 90º phase difference. It is enabled non-interactive dual-current control for both the condition of oscillation and the frequency of oscillation. High output impedances of the configurations enable the circuit to be cascaded without additional current buffers. The use of only grounded capacitors is ideal for integration. The circuit performances are depicted through PSpice simulations, they show good agreement to theoretical anticipation.
Keywords: Current-mode, Oscillator, Integrated circuit, CCCCTA.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1798
705 Analysis of Injection-Lock in Oscillators versus Phase Variation of Injected Signal
Authors: M. Yousefi, N. Nasirzadeh
Abstract:In this paper, behavior of an oscillator under injection of another signal has been investigated. Also, variation of output signal amplitude versus injected signal phase variation, the effect of varying the amplitude of injected signal and quality factor of the oscillator has been investigated. The results show that the locking time depends on phase and the best locking time happens at 180-degrees phase. Also, the effect of injected lock has been discussed. Simulations show that the locking time decreases with signal injection to bulk. Locking time has been investigated versus various phase differences. The effect of phase and amplitude changes on locking time of a typical LC oscillator in 180 nm technology has been investigated.
Keywords: Injection-lock oscillator, oscillator, analysis, phase modulation.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 960
704 Approximate Solution to Non-Linear Schrödinger Equation with Harmonic Oscillator by Elzaki Decomposition Method
Authors: Emad K. Jaradat, Ala’a Al-Faqih
Nonlinear Schrödinger equations are regularly experienced in numerous parts of science and designing. Varieties of analytical methods have been proposed for solving these equations. In this work, we construct an approximate solution for the nonlinear Schrodinger equations, with harmonic oscillator potential, by Elzaki Decomposition Method (EDM). To illustrate the effects of harmonic oscillator on the behavior wave function, nonlinear Schrodinger equation in one and two dimensions is provided. The results show that, it is more perfectly convenient and easy to apply the EDM in one- and two-dimensional Schrodinger equation.
Keywords: Non-linear Schrodinger equation, Elzaki decomposition method, harmonic oscillator, one and two- dimensional Schrodinger equation.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 751
703 Application of He-s Amplitude Frequency Formulation for a Nonlinear Oscillator with Fractional Potential
In this paper, He-s amplitude frequency formulation is used to obtain a periodic solution for a nonlinear oscillator with fractional potential. By calculation and computer simulations, compared with the exact solution shows that the result obtained is of high accuracy.
Keywords: He's amplitude frequency formulation, Periodic solution, Nonlinear oscillator, Fractional potential.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1251
702 130 nm CMOS Mixer and VCO for 2.4 GHz Low-power Wireless Personal Area Networks
Authors: Gianluca Cornetta, David J. Santos
Abstract:This paper describes a 2.4 GHz passive switch mixer and a 5/2.5 GHz voltage-controlled negative Gm oscillator (VCO) with an inversion-mode MOS varactor. Both circuits are implemented using a 1P8M 0.13 μm process. The switch mixer has an input referred 1 dB compression point of -3.89 dBm and a conversion gain of -0.96 dB when the local oscillator power is +2.5 dBm. The VCO consumes only 1.75 mW, while drawing 1.45 mA from a 1.2 V supply voltage. In order to reduce the passives size, the VCO natural oscillation frequency is 5 GHz. A clocked CMOS divideby- two circuit is used for frequency division and quadrature phase generation. The VCO has a -109 dBc/Hz phase noise at 1 MHz frequency offset and a 2.35-2.5 GHz tuning range (after the frequency division), thus complying with ZigBee requirements.
Keywords: Switch Mixers, Varactors, IEEE 802.15.4 (ZigBee), Direct Conversion Receiver, Wireless Sensor Networks.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2083
701 Symbolic Analysis of Power Spectrum of CMOS Cross Couple Oscillator
Authors: Kittipong Tripetch
Abstract:This paper proposes for the first time symbolic formula of the power spectrum of CMOS Cross Couple Oscillator and its modified circuit. Many principles existed to derived power spectrum in microwave textbook such as impedance, admittance parameters, ABCD, H parameters, etc. It can be compared by graph of power spectrum which methodology is the best from the point of view of practical measurement setup such as condition of impedance parameter which used superposition of current to derived (its current injection at the other port of the circuit is zero, which is impossible in reality). Four graphs of impedance parameters of cross couple oscillator are proposed. After that four graphs of scattering parameters of CMOS cross coupled oscillator will be shown.
Keywords: Optimization, power spectrum, impedance parameter, scattering parameter.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1434
700 Artificial Voltage-Controlled Capacitance and Inductance using Voltage-Controlled Transconductance
Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat
Abstract:In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.
Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4604
699 Analytical Based Truncation Principle of Higher-Order Solution for a x1/3 Force Nonlinear Oscillator
Authors: Md. Alal Hosen
In this paper, a modified harmonic balance method based an analytical technique has been developed to determine higher-order approximate periodic solutions of a conservative nonlinear oscillator for which the elastic force term is proportional to x1/3. Usually, a set of nonlinear algebraic equations is solved in this method. However, analytical solutions of these algebraic equations are not always possible, especially in the case of a large oscillation. In this article, different parameters of the same nonlinear problems are found, for which the power series produces desired results even for the large oscillation. We find a modified harmonic balance method works very well for the whole range of initial amplitudes, and the excellent agreement of the approximate frequencies and periodic solutions with the exact ones has been demonstrated and discussed. Besides these, a suitable truncation formula is found in which the solution measures better results than existing solutions. The method is mainly illustrated by the x1/3 force nonlinear oscillator but it is also useful for many other nonlinear problems.
Keywords: Approximate solutions, Harmonic balance method, Nonlinear oscillator, Perturbation.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1313
698 Realization of Electronically Tunable Currentmode First-order Allpass Filter and Its Application
Authors: Supayotin Na Songkla, Winai Jaikla
This article presents a resistorless current-mode firstorder allpass filter based on second generation current controlled current conveyors (CCCIIs). The features of the circuit are that: the pole frequency can be electronically controlled via the input bias current: the circuit description is very simple, consisting of 2 CCCIIs and single grounded capacitor, without any external resistors and component matching requirements. Consequently, the proposed circuit is very appropriate to further develop into an integrated circuit. Low input and high output impedances of the proposed configuration enable the circuit to be cascaded in current-mode without additional current buffers. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation. The application example as a current-mode quadrature oscillator is included.
Keywords: First-order all pass filter, current-mode, CCCII.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1663
697 Transformerless AC-DC Converter
Authors: Saisundar. S., I Made Darmayuda, Zhou Jun, Krishna Mainali, Simon Ng Sheung Yan, Eran Ofek
Abstract:This paper compares the recent transformerless ACDC power converter architectures and provides an assessment of each. A prototype of one of the transformerless AC-DC converter architecture is also presented depicting the feasibility of a small form factor, power supply design. In this paper component selection guidelines to achieve high efficiency AC-DC power conversion are also discussed.
Keywords: AC-DC converter, digitally controlled, switched mode power supply, transformerless.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5648
696 A High-Frequency Low-Power Low-Pass-Filter-Based All-Current-Mirror Sinusoidal Quadrature Oscillator
Authors: A. Leelasantitham, B. Srisuchinwong
Abstract:A high-frequency low-power sinusoidal quadrature oscillator is presented through the use of two 2nd-order low-pass current-mirror (CM)-based filters, a 1st-order CM low-pass filter and a CM bilinear transfer function. The technique is relatively simple based on (i) inherent time constants of current mirrors, i.e. the internal capacitances and the transconductance of a diode-connected NMOS, (ii) a simple negative resistance RN formed by a resistor load RL of a current mirror. Neither external capacitances nor inductances are required. As a particular example, a 1.9-GHz, 0.45-mW, 2-V CMOS low-pass-filter-based all-current-mirror sinusoidal quadrature oscillator is demonstrated. The oscillation frequency (f0) is 1.9 GHz and is current-tunable over a range of 370 MHz or 21.6 %. The power consumption is at approximately 0.45 mW. The amplitude matching and the quadrature phase matching are better than 0.05 dB and 0.15°, respectively. Total harmonic distortions (THD) are less than 0.3 %. At 2 MHz offset from the 1.9 GHz, the carrier to noise ratio (CNR) is 90.01 dBc/Hz whilst the figure of merit called a normalized carrier-to-noise ratio (CNRnorm) is 153.03 dBc/Hz. The ratio of the oscillation frequency (f0) to the unity-gain frequency (fT) of a transistor is 0.25. Comparisons to other approaches are also included.
Keywords: Sinusoidal quadrature oscillator, low-pass-filterbased, current-mirror bilinear transfer function, all-current-mirror, negative resistance, low power, high frequency, low distortion.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1913
695 High-performance Second-Generation Controlled Current Conveyor CCCII and High Frequency Applications
Authors: Néjib Hassen, Thouraya Ettaghzouti, Kamel Besbes
In this paper, a modified CCCII is presented. We have used a current mirror with low supply voltage. This circuit is operated at low supply voltage of ±1V. Tspice simulations for TSMC 0.18μm CMOS Technology has shown that the current and voltage bandwidth are respectively 3.34GHz and 4.37GHz, and parasitic resistance at port X has a value of 169.320 for a control current of 120μA. In order to realize this circuit, we have implemented in this first step a universal current mode filter where the frequency can reach the 134.58MHz. In the second step, we have implemented two simulated inductors: one floating and the other grounded. These two inductors are operated in high frequency and variable depending on bias current I0. Finally, we have used the two last inductors respectively to implement two sinusoidal oscillators domains of frequencies respectively: [470MHz, 692MHz], and [358MHz, 572MHz] for bias currents I0 [80μA, 350μA].
Keywords: Current controlled current conveyor CCCII, floating inductor, grounded inductor, oscillator, universal filter.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2649
694 Dynamic Response Analyses for Human-Induced Lateral Vibration on Congested Pedestrian Bridges
Authors: M. Yoneda
In this paper, a lateral walking design force per person is proposed and compared with Imperial College test results. Numerical simulations considering the proposed walking design force which is incorporated into the neural-oscillator model are carried out placing much emphasis on the synchronization (the lock-in phenomenon) for a pedestrian bridge model with the span length of 50 m. Numerical analyses are also conducted for an existing pedestrian suspension bridge. As compared with full scale measurements for this suspension bridge, it is confirmed that the analytical method based on the neural-oscillator model might be one of the useful ways to explain the synchronization (the lock-in phenomenon) of pedestrians being on the bridge.
Keywords: Pedestrian bridge, human-induced lateral vibration, neural-oscillator, full scale measurement, dynamic response analysis.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 668
693 Multi Band Frequency Synthesizer Based on ISPD PLL with Adapted LC Tuned VCO
Authors: Bilel Gassara, Mahmoud Abdellaoui, Nouri Masmoud
Abstract:The 4G front-end transceiver needs a high performance which can be obtained mainly with an optimal architecture and a multi-band Local Oscillator. In this study, we proposed and presented a new architecture of multi-band frequency synthesizer based on an Inverse Sine Phase Detector Phase Locked Loop (ISPD PLL) without any filters and any controlled gain block and associated with adapted multi band LC tuned VCO using a several numeric controlled capacitive branches but not binary weighted. The proposed architecture, based on 0.35μm CMOS process technology, supporting Multi-band GSM/DCS/DECT/ UMTS/WiMax application and gives a good performances: a phase noise @1MHz -127dBc and a Factor Of Merit (FOM) @ 1MHz - 186dB and a wide band frequency range (from 0.83GHz to 3.5GHz), that make the proposed architecture amenable for monolithic integration and 4G multi-band application.
Keywords: GSM/DCS/DECT/UMTS/WiMax, ISPD PLL, keep and capture range, Multi-Band, Synthesizer, Wireless.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1853
692 First Order Filter Based Current-Mode Sinusoidal Oscillators Using Current Differencing Transconductance Amplifiers (CDTAs)
Authors: S. Summart, C. Saetiaw, T. Thosdeekoraphat, C. Thongsopa
This article presents new current-mode oscillator circuits using CDTAs which is designed from block diagram. The proposed circuits consist of two CDTAs and two grounded capacitors. The condition of oscillation and the frequency of oscillation can be adjusted by electronic method. The circuits have high output impedance and use only grounded capacitors without any external resistor which is very appropriate to future development into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.
Keywords: Current-mode, Quadrature Oscillator, Block Diagram, CDTA.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1490
691 Design of Wireless Readout System for Resonant Gas Sensors
Authors: S. Mohamed Rabeek, Mi Kyoung Park, M. Annamalai Arasu
This paper presents a design of a wireless read out system for tracking the frequency shift of the polymer coated piezoelectric micro electromechanical resonator due to gas absorption. The measure of this frequency shift indicates the percentage of a particular gas the sensor is exposed to. It is measured using an oscillator and an FPGA based frequency counter by employing the resonator as a frequency determining element in the oscillator. This system consists of a Gas Sensing Wireless Readout (GSWR) and an USB Wireless Transceiver (UWT). GSWR consists of an oscillator based on a trans-impedance sustaining amplifier, an FPGA based frequency readout, a sub 1GHz wireless transceiver and a micro controller. UWT can be plugged into the computer via USB port and function as a wireless module to transfer gas sensor data from GSWR to the computer through its USB port. GUI program running on the computer periodically polls for sensor data through UWT - GSWR wireless link, the response from GSWR is logged in a file for post processing as well as displayed on screen.
Keywords: Gas sensor, GSWR, micro-mechanical system, UWT, volatile emissions.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1379
690 A Direct Down-conversion Receiver for Low-power Wireless Sensor Networks
Authors: Gianluca Cornetta, Abdellah Touhafi, David J. Santos, Jose Manuel Vazquez
A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibits a very low noise figure of only 2.27 dB and dissipates only 14.6 mW with a 1.2 V supply voltage and is hence suitable for low-power applications.
Keywords: LNA, Active Balun, Passive Mixer, VCO, IEEE 802.15.4(ZigBee).Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2209
689 Design of SiC Capacitive Pressure Sensor with LC-Based Oscillator Readout Circuit
Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy
This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.
Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbideProcedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1504
688 High Energy Dual-Wavelength Mid-Infrared Extracavity KTA Optical Parametric Oscillator
Authors: Hongjun Liu, Qibing Sun, Nan Huang, Shaolan Zhu, Wei Zhao
Abstract:A high energy dual-wavelength extracavity KTA optical parametric oscillator (OPO) with excellent stability and beam quality, which is pumped by a Q-switched single-longitudinal-mode Nd:YAG laser, has been demonstrated based on a type II noncritical phase matching (NCPM) KTA crystal. The maximum pulse energy of 10.2 mJ with the output stability of better than 4.1% rms at 3.467 μm is obtained at the repetition rate of 10 Hz and pulse width of 2 ns, and the 11.9 mJ of 1.535 μm radiation is obtained simultaneously. This extracavity NCPM KTA OPO is very useful when high energy, high beam quality and smooth time domain are needed.
Keywords: mid-infrared laser, OPO, dual-wavelength laserProcedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1927
687 A Simple and Efficient Method for Accurate Measurement and Control of Power Frequency Deviation
Authors: S. J. Arif
In the presented technique, a simple method is given for accurate measurement and control of power frequency deviation. The sinusoidal signal for which the frequency deviation measurement is required is transformed to a low voltage level and passed through a zero crossing detector to convert it into a pulse train. Another stable square wave signal of 10 KHz is obtained using a crystal oscillator and decade dividing assemblies (DDA). These signals are combined digitally and then passed through decade counters to give a unique combination of pulses or levels, which are further encoded to make them equally suitable for both control applications and display units. The developed circuit using discrete components has a resolution of 0.5 Hz and completes measurement within 20 ms. The realized circuit is simulated and synthesized using Verilog HDL and subsequently implemented on FPGA. The results of measurement on FPGA are observed on a very high resolution logic analyzer. These results accurately match the simulation results as well as the results of same circuit implemented with discrete components. The proposed system is suitable for accurate measurement and control of power frequency deviation.
Keywords: Digital encoder for frequency measurement, frequency deviation measurement, measurement and control systems, power systems.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1197
686 Implementation of Quantum Rotation Gates Using Controlled Non-Adiabatic Evolutions
Authors: Abdelrahman A. H. Abdelrahim, Gharib Subhi Mahmoud, Sherzod Turaev, Azeddine Messikh
Abstract:Quantum gates are the basic building blocks in the quantum circuits model. These gates can be implemented using adiabatic or non adiabatic processes. Adiabatic models can be controlled using auxiliary qubits, whereas non adiabatic models can be simplified by using one single-shot implementation. In this paper, the controlled adiabatic evolutions is combined with the single-shot implementation to obtain quantum gates with controlled non adiabatic evolutions. This is an important improvement which can speed the implementation of quantum gates and reduce the errors due to the long run in the adiabatic model. The robustness of our scheme to different types of errors is also investigated.
Keywords: Adiabatic evolutions, non adiabatic evolutions, controlled adiabatic evolutions, quantum rotation gates, dephasing rates, master equation.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 850
685 Resonant-Based Capacitive Pressure Sensor Read-Out Oscillating at 1.67 GHz in 0.18
Authors: Yong Wang, Wang Ling Goh, Jung Hyup Lee, Kevin T. C. Chai, Minkyu Je
This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.
Keywords: Capacitance-to-frequency converter, Capacitive pressure sensor, Digital counter, LC oscillator.Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2841