Search results for: closed circuit television

Authors: J. Mohan, S. Maheshwari

Abstract:

A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.

Keywords: active filter, all-pass filter, current-mode, current conveyor.

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Authors: Lochan Basyal

Abstract:

Global Automation is an emerging technology of today’s era and is based on Internet of Things (IoT). Global automation deals with the controlling of electrical appliances throughout the world. The fabrication of this system has been carried out with interfacing an electrical control system module to Raspberry Pi. An electrical control system module includes a relay driver mechanism through which appliances are controlled automatically in respective condition. In this research project, one email ID has been assigned to Raspberry Pi, and the users from different location having different email ID can mail to Raspberry Pi on assigned email address “[email protected]” with subject heading “Device Control” with predefined command on compose email line. Also, a notification regarding current working condition of this system has been updated on respective user email ID. This approach is an innovative way of implementing smart automation system through which a user can control their electrical appliances like light, fan, television, refrigerator, etc. in their home with the use of email facility. The development of this project helps to enhance the concept of smart home application as well as industrial automation.

Keywords: Control circuit, email, global automation, internet of things, Raspberry Pi.

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Authors: Chenguang Guo, Lei Chen, Yanlong Zhang

Abstract:

This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.

Keywords: Boundary scan, JTAG interface, Test frequency, Reduced pin

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Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra

Abstract:

A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.

Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.

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Authors: Sevil Yıldız

Abstract:

In this study, we will touch upon the legal arrangements issued in Turkey for prevention of condensation and for ensuring pluralism in the media. We will mention the legal arrangements concerning the regulatory and supervisory authority, namely the Radio and Television Supreme Council, for the visual and auditory media. In this context; the legal arrangements, which have been introduced by the Law No 6112 on the Establishment of Radio and Television Enterprises and Their Media Services in relation to the media ownership, will be reviewed through comparison with the Article 29 of the repealed Law No 3984.

Keywords: Media ownership, legal arrangements, the case for Turkey.

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

Abstract:

This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.

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Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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Authors: Gyu-Jin Shim, Seung-Moon Baek, Choon-Geun Moon, Ho-Saeng Lee, Jung-In Yoon

Abstract:

The experimental thermal performance of two heat exchangers in closed-wet cooling tower (CWCT) was investigated in this study. The test sections are heat exchangers which have multi path that is used as the entrance of cooling water and are consisting of bare-type copper tubes between 15.88mm and 19.05mm. The process fluids are the cooling water that flows from top part of heat exchanger to bottom side in the inner side of tube, and spray water that flows gravitational direction in the outer side of it. Air contacts its outer side of that as it counterflows. Heat and mass transfer coefficients and cooling capacity were calculated with variations of process fluids, multi path and different diameter tubes to figure out the performance of characteristics of CWCT. The main results were summarized as follows: The results show this experiment is reliable with values of heat and mass transfer coefficients comparing to values of correlations. Heat and mass transfer coefficients and cooling capacity of two paths are higher than these with one path using 15.88 and 19.05mm tubes. Cooling capacity per unit volume with 15.88mm tube using one and two paths are higher than 19.05mm tube due to increase of surface area per unit volume.

Keywords: Closed–Wet Cooling Tower, Cooling Capacity, Heatand Mass Transfer Coefficients.

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Authors: A. Kojah, A. Nacaroğlu

Abstract:

Single phase transmission lines are used to transfer data or energy between two users. Transient conditions such as switching operations and short circuit faults cause the generation of the fluctuation on the waveform to be transmitted. Spatial voltage distribution on the single phase transmission line may change owing to the position and duration of the short circuit fault in the system. In this paper, the state space representation of the single phase transmission line for short circuit fault and for various types of terminations is given. Since the transmission line is modeled in time domain using distributed parametric elements, the mathematical representation of the event is given in state space (time domain) differential equation form. It also makes easy to solve the problem because of the time and space dependent characteristics of the voltage variations on the distributed parametrically modeled transmission line.

Keywords: Energy transmission, transient effects, transmission line, transient voltage, RLC short circuit, single phase.

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Authors: Mete Kazaz, Birol Gülnar

Abstract:

Television news has gained a new dimension in terms of ideological approaches as a result of such factors as globalization, cross monopolization, presence of international companies etc. and certain strategies have been developed at the production, presentation and distribution stages of news. In this study, television news about a process called “settlement process” was investigated. In this framework, news about the settlement process on TV channels of TRT 1, ATV, FOX TV, NTV, HABERTÜRK, TRT HABER and STV was investigated using the content analysis method in terms of the strategies the ideology construction, attitude towards the party in power, attitude towards parties in opposition and attitude towards BDP (Peace and Democracy Part) and Imrali (the island where Abdullah Ocalan, head of PKK, is kept). First, the aforementioned TV channels were selected randomly from 3 groups in order to be able to reveal the representational capacity of commercial, news and public channels. The study covers 557 news items broadcast in the main news bulletins between the dates of 15 March 2013 and 15 March 2013. While there was a positive attitude towards the government in a sizable portion of the news about the settlement process (63.6%), the attitude of 25.3% of the news was impartial towards the government and 11.3% had a negative attitude. On the other hand, there was a negative attitude towards the Opposition in a considerable portion of the news about the settlement process (56.1%). The attitude of 35.9% of the news towards the Opposition was impartial whereas 8.0% had a positive attitude. While 34.9% of the news about the settlement process used the legitimization strategy from among the ideology construction strategies, 22.8% used the unification strategy, 15.7% the reification strategy, 15.6% fractional and 11% concealment/mystification strategy.

Keywords: Attitude, Ideological Framing, Television News.

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Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: Bridgeless boost, boost converter, power factor correction, hold-up time.

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Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA

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Authors: El Miloud A.R. Reyouchi, Kamal Ghoumid, Koutaiba Amezian, Otman Mrabet

Abstract:

This paper proposes and analyses the wireless telecommunication system with multiple antennas to the emission and reception MIMO (multiple input multiple output) with space diversity in a OFDM context. In particular it analyses the performance of a DTT (Digital Terrestrial Television) broadcasting system that includes MIMO-OFDM techniques. Different propagation channel models and configurations are considered for each diversity scheme. This study has been carried out in the context of development of the next generation DVB-T/H and WRAN.

Keywords: MIMO, MISO, OFDM, DVB-/H/T2, WRAN.

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Authors: Hossein Ramezani Ali-Akbari

Abstract:

This paper presents an innovative method to control the rotational speed of a satellite solar panel during its deployment phase. A brushed DC motor has been utilized in the passive spring driven deployment mechanism to reduce the deployment speed. In order to use the DC motor as a damper, its connector terminals have been connected with an external resistance in a closed circuit. It means that, in this approach, there is no external power supply in the circuit. The working principle of this method is based on the back electromotive force (or back EMF) of the DC motor when an external torque (here the torque produced by the torsional springs) is coupled to the DC motor’s shaft. In fact, the DC motor converts to an electric generator and the current flows into the circuit and then produces the back EMF. Based on Lenz’s law, the generated current produced a torque which acts opposite to the applied external torque, and as a result, the deployment speed of the solar panel decreases. The main advantage of this method is to set an intended damping coefficient to the system via changing the external resistance. To produce the sufficient current, a gearbox has been assembled to the DC motor which magnifies the number of turns experienced by the DC motor. The coupled electro-mechanical equations of the system have been derived and solved, then, the obtained results have been presented. A full-scale prototype of the deployment mechanism has been built and tested. The potential application of brushed DC motors as a rotational speed damper has been successfully demonstrated.

Keywords: Back electromotive force, brushed DC motor, rotational speed damper, satellite solar panel deployment mechanism.

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Authors: Hossein Sahoolizadeh, Alishir Moradi Kordalivand, Zargham Heidari

Abstract:

In first stage of each microwave receiver there is Low Noise Amplifier (LNA) circuit, and this stage has important rule in quality factor of the receiver. The design of a LNA in Radio Frequency (RF) circuit requires the trade-off many importance characteristics such as gain, Noise Figure (NF), stability, power consumption and complexity. This situation Forces desingners to make choices in the desing of RF circuits. In this paper the aim is to design and simulate a single stage LNA circuit with high gain and low noise using MESFET for frequency range of 5 GHz to 6 GHz. The desing simulation process is down using Advance Design System (ADS). A single stage LNA has successfully designed with 15.83 dB forward gain and 1.26 dB noise figure in frequency of 5.3 GHz. Also the designed LNA should be working stably In a frequency range of 5 GHz to 6 GHz.

Keywords: Advance Design System, Low Noise Amplifier, Radio Frequency, Noise Figure.

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Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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Authors: Katsuyuki Umezawa, Takashi Tashiro, Satoru Tezuka

Abstract:

Recently, various services such as television and the Internet have come to be received through various terminals. However, we could gain greater convenience by receiving these services through cellular phone terminals when we go out and then continuing to receive the same services through a large screen digital television after we have come home. However, it is necessary to go through the same authentication processing again when using TVs after we have come home. In this study, we have developed an authentication method that enables users to switch terminals in environments in which the user receives service from a server through a terminal. Specifically, the method simplifies the authentication of the server side when switching from one terminal to another terminal by using previously authenticated information.

Keywords: Authentication, Cookie, Federation, GBA, IPSec

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Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

Abstract:

In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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Authors: Talib Hashim Hasan

Abstract:

This paper describes simple implementation of homotopy (also called continuation) algorithm for determining the proper resistance of the resistor to dissipate energy at a specified rate of an electric circuit. Homotopy algorithm can be considered as a developing of the classical methods in numerical computing such as Newton-Raphson and fixed point methods. In homoptopy methods, an embedding parameter is used to control the convergence. The method purposed in this work utilizes a special homotopy called Newton homotopy. Numerical example solved in MATLAB is given to show the effectiveness of the purposed method

Keywords: electrical circuit homotopy, methods, MATLAB, Newton homotopy

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Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik

Abstract:

As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.

Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.

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Authors: Naga Brahmendra Yadav Gorla, Dr. Lakshmi Narasamma N

Abstract:

This paper proposes an active soft-switching circuit for bridge converters aiming to improve the power conversion efficiency. The proposed circuit achieves loss-less switching for both main and auxiliary switches without increasing the main switch current/voltage rating. A winding coupled to the primary of power transformer ensures ZCS for the auxiliary switches during their turn-off. A 350 W, 100 kHz phase shifted full bridge (PSFB) converter is built to validate the analysis and design. Theoretical loss calculations for proposed circuit is presented. The proposed circuit is compared with passive soft switched PSFB in terms of efficiency and loss in duty cycle.

Keywords: soft switching, passive soft switching, ZVS, ZCS, PSFB.

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Authors: Seyed Ali Sedigh Zyabari, A. Zarifkar

Abstract:

Single photon detectors have been fabricated NbN nano wire. These detectors are fabricated from high quality, ultra high vacuum sputtered NbN thin films on a sapphire substrate. In this work a typical schematic of the nanowire Single Photon Detector structure and then driving and measurement electronic circuit are shown. The response of superconducting nanowire single photon detectors during a photo detection event, is modeled by a special electrical circuits (two circuit). Finally, current through the wire is calculated by solving equations of models.

Keywords: NbN, nanowire meander, superconducting single photon detector, kinetic inductance.

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Authors: C. Chanapromma, T. Worachak, P. Silapan

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This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.

Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range

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Authors: Koson Pitaksuttayaprot, Winai Jaikla

Abstract:

The realization of current-mode quadrature oscillators using current controlled current conveyor transconductance amplifiers (CCCCTAs) and grounded capacitors is presented. The proposed oscillators can provide 2 sinusoidal output currents with 90º phase difference. It is enabled non-interactive dual-current control for both the condition of oscillation and the frequency of oscillation. High output impedances of the configurations enable the circuit to be cascaded without additional current buffers. The use of only grounded capacitors is ideal for integration. The circuit performances are depicted through PSpice simulations, they show good agreement to theoretical anticipation.

Keywords: Current-mode, Oscillator, Integrated circuit, CCCCTA.

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Authors: Arnaud Nougues

Abstract:

This paper describes a two-stage methodology derived from IMC (Internal Model Control) for tuning a PID (Proportional-Integral-Derivative) controller for levels or other integrating processes in an industrial environment. Focus is ease of use and implementation speed which are critical for an industrial application. Tuning can be done with minimum effort and without the need of time-consuming open-loop step tests on the plant. The first stage of the method applies to levels only: the vessel residence time is calculated from equipment dimensions and used to derive a set of preliminary PI (Proportional-Integral) settings with IMC. The second stage, re-tuning in closed-loop, applies to levels as well as other integrating processes: a tuning correction mechanism has been developed based on a series of closed-loop simulations with model errors. The tuning correction is done from a simple closed-loop step test and application of a generic correlation between observed overshoot and integral time correction. A spin-off of the method is that an estimate of the vessel residence time (levels) or open-loop process gain (other integrating process) is obtained from the closed-loop data.

Keywords: closed-loop model identification, IMC-PID tuning method, integrating process control, on-line PID tuning adaptation

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Authors: Alvaro J. P. Ramos, Wellington S. Mota, Yendys S. Dantas

Abstract:

This paper analyses the torsional efforts in gas turbine-generator shafts caused by high speed automatic reclosing of transmission lines. This issue is especially important for cases of three phase short circuit and unsuccessful reclosure of lines in the vicinity of the thermal plant. The analysis was carried out for the thermal plant TERMOPERNAMBUCO located on Northeast region of Brazil. It is shown that stress level caused by lines unsuccessful reclosing can be several times higher than terminal three-phase short circuit. Simulations were carried out with detailed shaft torsional model provided by machine manufacturer and with the “Alternative Transient Program – ATP" program [1]. Unsuccessful three phase reclosing for selected lines in the area closed to the plant indicated most critical cases. Also, reclosing first the terminal next to the gas turbine gererator will lead also to the most critical condition. Considering that the values of transient torques are very sensible to the instant of reclosing, simulation of unsuccessful reclosing with statistics ATP switch were carried out for determination of most critical transient torques for each section of the generator turbine shaft.

Keywords: Torsional Efforts, Thermal Machine, GasTurbine, Automatic Reclosing.

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Authors: Wirat Sonchan, Pratoom Moungmee, Anek Sootmongkol

Abstract:

This study aimed to examine the effects of a circuit training program on muscle strength, agility, anaerobic performance and cardiovascular endurance. The study involved 24 freshmen (age 18.87+0.68 yr.) male students of the Faculty of Sport Science, Burapha University. They sample study were randomly divided into two groups: Circuit Training group (CT; n=12) and a Control group (C; n=12). Baseline data on height, weight, muscle strength (hand grip dynamometer and leg strength dynamometer), agility (agility T-Test), and anaerobic performance (Running-based Anaerobic Sprint Test) and cardiovascular endurance (20 m Endurance Shuttle Run Test) were collected. The circuit training program included one circuit of eight stations of 30/60 seconds of work/rest interval with two cycles in Week 1-4, and 60/90 seconds of work/rest interval with three cycles in Week 5-8, performed three times per week. Data were analyzed using paired t-tests and independent sample t-test. Statistically significance level was set at 0.05. The results show that after 8 weeks of a training program, muscle strength, agility, anaerobic capacity and cardiovascular endurance increased significantly in the CT Group (p < 0.05), while significant increase was not observed in the C Group (p < 0.05). The results of this study suggest that the circuit training program improved muscle strength, agility, anaerobic capacity and cardiovascular endurance of the study subjects. This program may be used as a guideline for selecting a set of exercise to improve physical fitness.

Keywords: Cardiovascular endurance, circuit training, physical fitness, anaerobic performance.

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Authors: Chia-Chen Wei, Pack Hsieh, Jeffrey Chen

Abstract:

Surface Mount Technology (SMT) is widely used in the area of the electronic assembly in which the electronic components are mounted to the surface of the printed circuit board (PCB). Most of the defects in the SMT process are mainly related to the quality of solder paste printing. These defects lead to considerable manufacturing costs in the electronics assembly industry. Therefore, the solder paste inspection (SPI) machine for controlling and monitoring the amount of solder paste printing has become an important part of the production process. So far, the setting of the SPI threshold is based on statistical analysis and experts’ experiences to determine the appropriate threshold settings. Because the production data are not normal distribution and there are various variations in the production processes, defects related to solder paste printing still occur. In order to solve this problem, this paper proposes an online machine learning algorithm, called the automatic threshold adjustment (ATA) algorithm, and closed-loop architecture in the SMT process to determine the best threshold settings. Simulation experiments prove that our proposed threshold settings improve the accuracy from 99.85% to 100%.

Keywords: Big data analytics, Industry 4.0, SPI threshold setting, surface mount technology.

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