Search results for: clock synchronization.

Authors: R. M. López-Gutiérrez, L. Cardoza-Avendaño, H. Cervantes-De Ávila, J. A. Michel-Macarty, C. Cruz-Hernández, A. Arellano-Delgado, R. Carmona-Rodríguez

Abstract:

In this paper, synchronization of multiple chaotic semiconductor lasers is achieved by appealing to complex system theory. In particular, we consider dynamical networks composed by semiconductor laser, as interconnected nodes, where the interaction in the networks are defined by coupling the first state of each node. An interest case is synchronized with master-slave configuration in star topology. Nodes of these networks are modeled for the laser and simulate by Matlab. These results are applicable to private communication.

Keywords: Synchronization, chaotic laser, network.

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Authors: Thang Manh Hoang

Abstract:

Recent research result has shown that two multidelay feedback systems can synchronize each other under different schemes, i.e. lag, projective-lag, anticipating, or projectiveanticipating synchronization. There, the driving signal is significantly complex due that it is constituted by multiple nonlinear transformations of delayed state variable. In this paper, a secure communication model is proposed based on synchronization of coupled multidelay feedback systems, in which the plain signal is mixed with a complex signal at the transmitter side and it is precisely retrieved at the receiver side. The effectiveness of the proposed model is demonstrated and verified in the specific example, where the message signal is masked directly by the complex signal and security is examined under the breaking method of power spectrum analysis.

Keywords: chaos synchronization, time-delayed system, chaosbasedsecure communications

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Authors: Moussa Yahia, Pascal Acco, Malek Benslama

Abstract:

Polynomial maps offer analytical properties used to obtain better performances in the scope of chaos synchronization under noisy channels. This paper presents a new method to simplify equations of the Exact Polynomial Kalman Filter (ExPKF) given in [1]. This faster algorithm is compared to other estimators showing that performances of all considered observers vanish rapidly with the channel noise making application of chaos synchronization intractable. Simulation of ExPKF shows that saturation drawn on the emitter to keep it stable impacts badly performances for low channel noise. Then we propose a particle filter that outperforms all other Kalman structured observers in the case of noisy channels.

Keywords: Chaos synchronization, Saturation, Fast ExPKF, Particlefilter, Polynomial maps.

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Authors: Zixin Liu, Huawei Yang, Fangwei Chen

Abstract:

This paper studies the mean square exponential synchronization problem of a class of stochastic neutral type chaotic neural networks with mixed delay. On the Basis of Lyapunov stability theory, some sufficient conditions ensuring the mean square exponential synchronization of two identical chaotic neural networks are obtained by using stochastic analysis and inequality technique. These conditions are expressed in the form of linear matrix inequalities (LMIs), whose feasibility can be easily checked by using Matlab LMI Toolbox. The feedback controller used in this paper is more general than those used in previous literatures. One simulation example is presented to demonstrate the effectiveness of the derived results.

Keywords: Exponential synchronization, stochastic analysis, chaotic neural networks, neutral type system.

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Authors: Olga I. Moskalenko, Maksim O. Zhuravlev, Alexey A. Koronovskii, Alexander E. Hramov

Abstract:

Intermittent behavior near the boundary of phase synchronization in the presence of noise is studied. In certain range of the coupling parameter and noise intensity the intermittency of eyelet and ring intermittencies is shown to take place. Main results are illustrated using the example of two unidirectional coupled Rössler systems. Similar behavior is shown to take place in two hydrodynamical models of Pierce diode coupled unidirectional.

Keywords: Chaotic oscillators, phase synchronization, noise, intermittency of intermittencies, control.

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Authors: Salah Salmi, Karim Kemih, Malek Benslama

Abstract:

Synchronization is a difficult problem in CDMA satellite communications. Due to the influence of additive noise and fading in the mobile channel, it is not easy to keep up with the attenuation and offset. This paper considers a recently proposed approach to solve the problem of synchronization chaotic Chen system in CDMA satellite communication in the presence of constant attenuation and offset. An analytic algorithm that provides closed form channel and carrier offset estimates is presented. The principle of this approach is based on adding a compensation block before the receiver to compensate the distortion of the imperfect channel by using genetic algorithm. The resultants presented, show that the receiver is able to recover rapidly the synchronization with the transmitter.

Keywords: Chaotic Chen system, genetic algorithm, Synchronization, CDMA

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Authors: Dangjun Zhao, Yongji Wang, Lei Liu

Abstract:

Based on general proportional integral (GPI) observers and sliding mode control technique, a robust control method is proposed for the master-slave synchronization of chaotic systems in the presence of parameter uncertainty and with partially measurable output signal. By using GPI observer, the master dynamics are reconstructed by the observations from a measurable output under the differential algebraic framework. Driven by the signals provided by GPI observer, a sliding mode control technique is used for the tracking control and synchronization of the master-slave dynamics. The convincing numerical results reveal the proposed method is effective, and successfully accommodate the system uncertainties, disturbances, and noisy corruptions.

Keywords: GPI observer, sliding mode control, master-slave synchronization, chaotic systems.

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Authors: Agata M. Kołodziejczyk, Mateusz Harasymczuk, Pierre-Yves Girardin, Lucie Davidová

Abstract:

Subjective time perception implies connection to cognitive functions, attention, memory and awareness, but a little is known about connections with homeostatic states of the body coordinated by circadian clock. In this paper, we present results from experimental study of subjective time perception in volunteers performing physical activity on treadmill in various phases of their circadian rhythms. Subjects were exposed to several time illusions simulated by programmed timing systems. This study brings better understanding for further improvement of of work quality in isolated areas. 

Keywords: Biological clock, light, time illusions, treadmill.

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Authors: Zixin Liu, Shu Lü, Shouming Zhong, Mao Ye

Abstract:

This paper studies the pth moment exponential synchronization of a class of stochastic neural networks with mixed delays. Based on Lyapunov stability theory, by establishing a new integrodifferential inequality with mixed delays, several sufficient conditions have been derived to ensure the pth moment exponential stability for the error system. The criteria extend and improve some earlier results. One numerical example is presented to illustrate the validity of the main results.

Keywords: pth Moment Exponential synchronization, Stochastic, Neural networks, Mixed time delays

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Authors: Rihab Gam, Anis Sakly, Faouzi M'sahli

Abstract:

A new strategy of control is formulated for chaos synchronization of non-identical chaotic systems with different orders using the Borne and Gentina practical criterion associated with the Benrejeb canonical arrow form matrix, to drift the stability property of dynamic complex systems. The designed controller ensures that the state variables of controlled chaotic slave systems globally synchronize with the state variables of the master systems, respectively. Numerical simulations are performed to illustrate the efficiency of the proposed method.

Keywords: Synchronization, Non-identical chaotic systems, Different orders, Arrow form matrix.

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Authors: Abdelghani Dendouga, Nour-Eddine Bouguechal, Souhil Kouda, Samir Barra

Abstract:

A behavioral model of a second order switchedcapacitor Sigma-Delta modulator is presented. The purpose of this work is the presentation of a behavioral model of a second order switched capacitor ΣΔ modulator considering (Error due to Clock Jitter, Thermal noise Amplifier Noise, Amplifier Slew-Rate, Non linearity of amplifiers, Gain error, Charge Injection, Clock Feedthrough, and Nonlinear on-resistance). A comparison between the use of MOS switches and the use transmission gate switches use is analyzed.

Keywords: Charge injection, clock feed through, Sigma Deltamodulators, Sigma Delta non-idealities, switched capacitor.

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Authors: Parvinder S. Sandhu, Vijay K. Banga, Prateek Gupta, Amit Verma

Abstract:

The current paper conceptualizes the technique of release consistency indispensable with the concept of synchronization that is user-defined. Programming model concreted with object and class is illustrated and demonstrated. The essence of the paper is phases, events and parallel computing execution .The technique by which the values are visible on shared variables is implemented. The second part of the paper consist of user defined high level synchronization primitives implementation and system architecture with memory protocols. There is a proposition of techniques which are core in deciding the validating and invalidating a stall page .

Keywords: synchronization objects, barrier, phases and events, shared memory

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Authors: Ali Beydoun, Hamzé H. Alaeddine

Abstract:

MIMO-OFDM communication system presents a key solution for the next generation of mobile communication due to its high spectral efficiency, high data rate and robustness against multi-path fading channels. However, MIMO-OFDM system requires a perfect knowledge of the channel state information and a good synchronization between the transmitter and the receiver to achieve the expected performances. Recently, we have proposed two algorithms for channel estimation and timing synchronization with good performances and very low implementation complexity compared to those proposed in the literature. In order to validate and evaluate the efficiency of these algorithms in real environments, this paper presents in detail the implementation of 2 × 2 MIMO-OFDM system based on LabVIEW and USRP 2920. Implementation results show a good agreement with the simulation results under different configuration parameters.

Keywords: MIMO-OFDM system, timing synchronization, channel estimation, STBC, USRP 2920.

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Authors: Changzhao Li, Juan Zhang

Abstract:

In this paper, we investigate a class of fuzzy Cohen- Grossberg neural networks with time delays and impulsive effects. By virtue of stochastic analysis, Halanay inequality for stochastic differential equations, we find sufficient conditions for the global exponential square-mean synchronization of the FCGNNs under noise perturbation. In particular, the traditional assumption on the differentiability of the time-varying delays is no longer needed. Finally, a numerical example is given to show the effectiveness of the results in this paper.

Keywords: Fuzzy Cohen-Grossberg neural networks (FCGNNs), complete synchronization, time delays, impulsive, noise perturbation.

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Authors: Tsunwai Gary Yip

Abstract:

Phase locked loops for data links operating at 10 Gb/s or faster are low phase noise devices designed to operate with a low jitter reference clock. Characterization of their jitter transfer function is difficult because the intrinsic noise of the device is comparable to the random noise level in the reference clock signal. A linear model is proposed to account for the intrinsic noise of a PLL. The intrinsic noise data of a PLL for 10 Gb/s links is presented. The jitter transfer function of a PLL in a test chip for 12.8 Gb/s data links was determined in experiments using the 400 MHz reference clock as the source of simultaneous excitations over a wide range of frequency. The result shows that the PLL jitter transfer function can be approximated by a second order linear model.

Keywords: Intrinsic phase noise, jitter in data link, PLL jitter transfer function, high speed clocking in electronic circuit

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Authors: Tsunwai Gary Yip

Abstract:

Phase locked loops in 10 Gb/s and faster data links are low phase noise devices. Characterization of their phase jitter transfer functions is difficult because the intrinsic noise of the PLLs is comparable to the phase noise of the reference clock signal. The problem is solved by using a linear model to account for the intrinsic noise. This study also introduces a novel technique for measuring the transfer function. It involves the use of the reference clock as a source of wideband excitation, in contrast to the commonly used sinusoidal excitations at discrete frequencies. The data reported here include the intrinsic noise of a PLL for 10 Gb/s links and the jitter transfer function of a PLL for 12.8 Gb/s links. The measured transfer function suggests that the PLL responded like a second order linear system to a low noise reference clock.

Keywords: Intrinsic phase noise, jitter in data link, PLL jitter transfer function, high speed clocking in electronic circuit

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Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a synchronized random switching frequency pulse width modulation (SRSFPWM). In this technique, the clock signal is used to control the random noise frequency which is produced by the feedback voltage of a hysteresis circuit. These make the triangular carrier frequency equaling to the random noise frequency in each switching period with the symmetrical positive and negative slopes of triangular carrier. Therefore, there is no error voltage in PWM signal. The PSpice simulated results shown the proposed technique improved the performance in case of low frequency harmonics of PWM signal comparing with conventional random switching frequency PWM.

Keywords: Random switching frequency pulse - width modulation.

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Authors: Hongji Tang, Yanbo Gao, Yue Yu

Abstract:

This paper presents a new nonlinear integral-type sliding surface for synchronizing two different chaotic systems with parametric uncertainty. On the basis of Lyapunov theorem and average dwelling time method, we obtain the control gains of controllers which are derived to achieve chaos synchronization. In order to reduce the gains, the error system is modeled as a switching system. We obtain the sufficient condition drawn for the robust stability of the error dynamics by stability analysis. Then we apply it to guide the design of the controllers. Finally, numerical examples are used to show the robustness and effectiveness of the proposed control strategy.

Keywords: Chaos synchronization, Nonlinear sliding surface, Control gains, Sliding mode control.

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Authors: Shiuh-Jer Huang, Shin-Ham Lee, Sheam-Chyun Lin

Abstract:

A two wheel inverted pendulum (TWIP) vehicle is built with two hub DC motors for motion control evaluation. Arduino Nano micro-processor is chosen as the control kernel for this electric test plant. Accelerometer and gyroscope sensors are built in to measure the tilt angle and angular velocity of the inverted pendulum vehicle. Since the TWIP has significantly hub motor dead zone and nonlinear system dynamics characteristics, the vehicle system is difficult to control by traditional model based controller. The intelligent model-free fuzzy sliding mode controller (FSMC) was employed as the main control algorithm. Then, intelligent controllers are designed for TWIP balance control, and two wheels synchronization control purposes.

Keywords: Balance control, synchronization control, two wheel inverted pendulum, TWIP.

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Authors: Ákos Dudás, Sándor Juhász

Abstract:

Various mechanisms providing mutual exclusion and thread synchronization can be used to support parallel processing within a single computer. Instead of using locks, semaphores, barriers or other traditional approaches in this paper we focus on alternative ways for making better use of modern multithreaded architectures and preparing hash tables for concurrent accesses. Hash structures will be used to demonstrate and compare two entirely different approaches (rule based cooperation and hardware synchronization support) to an efficient parallel implementation using traditional locks. Comparison includes implementation details, performance ranking and scalability issues. We aim at understanding the effects the parallelization schemes have on the execution environment with special focus on the memory system and memory access characteristics.

Keywords: Lock-free synchronization, mutual exclusion, parallel hash tables, parallel performance

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Authors: Diah Tri Widayati, Aris Junaidi, Kresno Suharto, Amelia Oktaviani, Wahyuningsih

Abstract:

The estrus female Etawah cross bred goats were synchronized estrus by controlled internal drug release (CIDR) implants for 10 days combined with PGF2α injection, and continued by artificial insemination (AI) within the hours of 24 period. Vaginal epithelium was taken to determine estrus cycle of the goats without estrus synchronization. The estrus responds (the puffy of vulva and vaginal pH) and percentage of pregnancy were investigated. The data were analyzed descriptively and Independent Sample T-Test. The results showed that the puffy of vulva and vaginal pH were significantly different in synchronized estrus goats and control goats (2.18 ± 0.33 cm vs. 1.20 ± 0.16 cm and 8.55 ± 0.63 vs. 8.22 ± 0.22). Percentage of pregnancy was higher in synchronized estrus goats (73.33%) than in control (53.3%). Estrus synchronization by using CIDR implants and PGF2, continued by AI was effective to improve reproduction performance of Etawah cross bred goats.

Keywords: Artificial insemination, Estrus synchronization, Etawah cross bred goat, Reproduction performance.

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Authors: K. Kemih, M. Benslama

Abstract:

This paper investigates the problem of spreading sequence and receiver code synchronization techniques for satellite based CDMA communications systems. The performance of CDMA system depends on the autocorrelation and cross-correlation properties of the used spreading sequences. In this paper we propose the uses of chaotic Lu system to generate binary sequences for spreading codes in a direct sequence spread CDMA system. To minimize multiple access interference (MAI) we propose the use of genetic algorithm for optimum selection of chaotic spreading sequences. To solve the problem of transmitter-receiver synchronization, we use the passivity controls. The concept of semipassivity is defined to find simple conditions which ensure boundedness of the solutions of coupled Lu systems. Numerical results are presented to show the effectiveness of the proposed approach.

Keywords: About Chaotic Lu system, synchronization, Spreading sequence, Genetic Algorithm. Passive System

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Authors: C. Cruz-Hernández, E. Inzunza-González, R.M. López-Gutiérrez H. Serrano-Guerrero, E.E.García-Guerrero

Abstract:

In this paper, encrypted audio communications based on synchronization of coupled unified chaotic systems in master-slave configuration is numerically studied. We transmit the encrypted audio messages by using two unsecure channels. Encoding, transmission, and decoding audio messages in chaotic communication is presented.

Keywords: Audio encrypted, chaos, synchronization.

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Authors: Long Jye Sheu, Wei Ching Chen, Yen Chu Chen, Wei Tai Weng

Abstract:

In this paper, a two-channel secure communication using fractional chaotic systems is presented. Conditions for chaos synchronization have been investigated theoretically by using Laplace transform. To illustrate the effectiveness of the proposed scheme, a numerical example is presented. The keys, key space, key selection rules and sensitivity to keys are discussed in detail. Results show that the original plaintexts have been well masked in the ciphertexts yet recovered faithfully and efficiently by the present schemes.

Keywords: fractional chaotic systems, synchronization, securecommunication.

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Authors: Ahmed Madian, Muaz Aljarhi

Abstract:

Coordinate Rotation Digital Computer (CORDIC) is a unique digital computing unit intended for the computation of mathematical operations and functions. This paper presents A multi CORDIC processor that integrates different CORDIC architectures on a single FPGA chip and allows the user to select the CORDIC architecture to proceed with based on what he wants to calculate and his needs. Synthesis show that radix 2 CORDIC has the lowest clock delay, radix 8 CORDIC has the highest LUT usage and lowest register usage while Hybrid Radix 4 CORDIC had the highest clock delay.

Keywords: Multi, CORDIC, FPGA, Processor.

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Authors: López-Gutiérrez R.M., Rodríguez-Orozco E., Cruz-Hernández C., Inzunza-González E., Posadas-Castillo C., García-Guerrero E.E., Cardoza-Avendaño L.

Abstract:

In this paper, we use Generalized Hamiltonian systems approach to synchronize a modified sixth-order Chua's circuit, which generates hyperchaotic dynamics. Synchronization is obtained between the master and slave dynamics with the slave being given by an observer. We apply this approach to transmit private information (analog and binary), while the encoding remains potentially secure.

Keywords: Hyperchaos synchronization, sixth-order Chua's circuit, observers, simulation, secure communication.

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Authors: Majid Reza Naseh, Mohammad Haeri

Abstract:

This paper introduces an adaptive control scheme to synchronize two identical Chua's systems. Introductory part of the paper is presented in the first part of the paper and then in the second part, a new theorem is proposed based on which an adaptive control scheme is developed to synchronize two identical modified Chua's circuit. Finally, numerical simulations are included to verify the effectiveness of the proposed control method.

Keywords: Chaos synchronization, adaptive control, Chua's circuits.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

In the current scenario, with the increasing integration densities, most system-on-chip designs are partitioned into multiple clock domains. In this paper, an asynchronous FIFO (First-in First-out pipeline) design is employed as a data transfer interface between two independent clock domains. Since the clocks on the either sides of the FIFO run at a different speed, the task to ensure the correct data transmission through this FIFO is manually performed. Firstly an existing asynchronous FIFO design is discussed and simulated. Gate-level simulation results depicted the flaw in existing design. In order to solve this problem, a novel modified asynchronous FIFO design is proposed. The results obtained from proposed design are in perfect accordance with theoretical expectations. The proposed asynchronous FIFO design outperforms the existing design in terms of accuracy and speed. In order to evaluate the performance of the FIFO designs presented in this paper, the circuits were implemented in 0.24µ TSMC CMOS technology and simulated at 2.5V using HSpice (© Avant! Corporation). The layout design of the proposed FIFO is also presented.

Keywords: Asynchronous, Clock, CMOS, C-element, FIFO, Globally Asynchronous Locally Synchronous (GALS), HSpice.

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Authors: Jianping Hu, Xiaolei Sheng

Abstract:

This paper introduces an adiabatic register file based on two-phase CPAL (Complementary Pass-Transistor Adiabatic Logic circuits) with power-gating scheme, which can operate on a single-phase power clock. A 32×32 single-phase adiabatic register file with power-gating scheme has been implemented with TSMC 0.18μm CMOS technology. All the circuits except for the storage cells employ two-phase CPAL circuits, and the storage cell is based on the conventional memory one. The two-phase non-overlap power-clock generator with power-gating scheme is used to supply the proposed adiabatic register file. Full-custom layouts are drawn. The energy and functional simulations have been performed using the net-list extracted from their layouts. Compared with the traditional static CMOS register file, HSPICE simulations show that the proposed adiabatic register file can work very well, and it attains about 73% energy savings at 100 MHz.

Keywords: Low power, Register file, Complementarypass-transistor logic, Adiabatic logic, Single-phase power clock.

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Authors: Shiang-Hwua Yu, Po-Hsun Wu

Abstract:

This study introduces two types of self-oscillating circuits that are frequently found in power electronics applications. Special effort is made to relate the circuits to the analogous mechanical systems of some important scientific inventions: Galileo’s pendulum clock and Coulomb’s friction model. A little touch of related history and philosophy of science will hopefully encourage curiosity, advance the understanding of self-oscillating systems and satisfy the aspiration of some students for scientific literacy. Finally, the two self-oscillating circuits are applied to design a simple class-D audio amplifier.

Keywords: Self-oscillation, sigma-delta modulator, pendulum clock, Coulomb friction, class-D amplifier.

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