Search results for: chaotic circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 669

Search results for: chaotic circuit

399 Analysis and Performance Evaluation of Noise-Reduction Transformer

Authors: Toshiaki Yanada, Kazumi Ishikawa

Abstract:

The present paper deals with the analysis and development of noise-reduction transformer that has a filter function for conductive noise transmission. Two types of prototype noise-reduction transformers with two different output voltages are proposed. To determine an optimum design for the noise-reduction transformer, noise attenuation characteristics are discussed based on the experiments and the equivalent circuit analysis. The analysis gives a relation between the circuit parameters and the noise attenuation. High performance step-down noise-reduction transformer for direct power supply to electronics equipment is developed. The input voltage of the transformer is 100 V and the output voltage is 5 V. Frequency characteristics of noise attenuation are discussed, and prevention of pulse noise transmission is demonstrated. Normal mode noise attenuation of this transformer is –80 dB, and common mode exceeds –90 dB. The step-down noise-reduction transformer eliminates pulse noise efficiently.

Keywords: conductive noise, EMC, EMI, noise attenuation, transformer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1923
398 Evolving Digital Circuits for Early Stage Breast Cancer Detection Using Cartesian Genetic Programming

Authors: Zahra Khalid, Gul Muhammad Khan, Arbab Masood Ahmad

Abstract:

Cartesian Genetic Programming (CGP) is explored to design an optimal circuit capable of early stage breast cancer detection. CGP is used to evolve simple multiplexer circuits for detection of malignancy in the Fine Needle Aspiration (FNA) samples of breast. The data set used is extracted from Wisconsins Breast Cancer Database (WBCD). A range of experiments were performed, each with different set of network parameters. The best evolved network detected malignancy with an accuracy of 99.14%, which is higher than that produced with most of the contemporary non-linear techniques that are computational expensive than the proposed system. The evolved network comprises of simple multiplexers and can be implemented easily in hardware without any further complications or inaccuracy, being the digital circuit.

Keywords: Breast cancer detection, cartesian genetic programming, evolvable hardware, fine needle aspiration (FNA).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 737
397 Thermodynamic Analysis of R507A-R23 Cascade Refrigeration System

Authors: A. D. Parekh, P. R. Tailor

Abstract:

The present work deals with thermodynamic analysis of cascade refrigeration system using ozone friendly refrigerants pair R507A and R23. R507A is azeotropic mixture composed of HFC refrigerants R125/R143a (50%/50% wt.). R23 is a single component HFC refrigerant used as replacement to CFC refrigerant R13 in low temperature applications. These refrigerants have zero ozone depletion potential and are non-flammable and as R507A an azeotropic mixture there is no problem of temperature glide. This study thermodynamically analyzed R507A-R23 cascade refrigeration system to optimize the design and operating parameters of the system. The design and operating parameters include: Condensing, evaporating, subcooling and superheating temperatures in the high temperature circuit, temperature difference in the cascade heat exchanger, Condensing, evaporating, subcooling and superheating temperatures in the low temperature circuit.

Keywords: COP, R507A, R23, cascade refrigeration system

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2887
396 Interconnect Analysis of a Novel Multiplexer Based Full-Adder Cell for Power and Propagation Delay Optimizations

Authors: G.Ramana Murthy, C.Senthilpari, P.Velrajkumar, Lim Tien Sze

Abstract:

The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other existing six adder circuits in terms of power, propagation delay and PDP. The proposed adder circuit is further analyzed for interconnect analysis, which gives better performance than other adder circuits in terms of layout thickness, width and height.

Keywords: Full Adder, Interconnect Analysis, Low-Power, Multiplexer, Propagation Delay, Parametric Analysis.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1501
395 Extracts of Cola acuminata, Lupinus arboreus and Bougainvillea spectabilis as Natural Photosensitizers for Dye-Sensitized Solar Cells

Authors: M. L. Akinyemi, T. J. Abodurin, A. O. Boyo, J. A. O. Olugbuyiro

Abstract:

Organic dyes from Cola acuminata (C. acuminata), Lupinus arboreus (L. arboreus) and Bougainvillea spectabilis (B. spectabilis) leaves and their mixtures were used as sensitizers to manufacture dye-sensitized solar cells (DSSC). Photoelectric measurements of C. acuminata showed a short circuit current (Jsc) of 0.027 mA/ cm2, 0.026 mA/ cm2 and 0.018 mA/ cm2 with a mixture of mercury chloride and iodine (Hgcl2 + I); potassium bromide and iodine (KBr + I); and potassium chloride and iodine (KCl + I) respectively. The open circuit voltage (Voc) was 24 mV, 25 mV and 20 mV for the three dyes respectively. L. arboreus had Jsc of 0.034 mA/ cm2, 0.021 mA/ cm2 and 0.013 mA/ cm2; and corresponding Voc of 28 mV, 14.2 mV and 15 mV for the three electrolytes respectively. B. spectabilis recorded Jsc 0.023 mA/ cm2, 0.026 mA/ cm2 and 0.015 mA/ cm2; and corresponding Voc values of 6.2 mV, 14.3 mV and 4.0 mV for the three electrolytes respectively. It was observed that the fill factor (FF) was 0.140 for C. acuminata, 0.3198 for L. arboreus and 0.1138 for B. spectabilis. Internal conversions of 0.096%, 0.056% and 0.063% were recorded for three dyes when combined with (KBr + I) electrolyte. The internal efficiency of C. acuminata DSSC was highest in value.

Keywords: Dye-sensitized Solar Cells, Organic dye, C. acuminate, L. arboreus, B. spectabilis, Dye Mixture.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1388
394 Negative Slope Ramp Carrier Control for High Power Factor Boost Converters in CCM Operation

Authors: T. Tanitteerapan, E.Thanpo

Abstract:

This paper, a simple continuous conduction mode (CCM) pulse-width-modulated (PWM) controller for high power factor boost converters is introduced. The duty ratios were obtained by the comparison of a sensed signal from inductor current or switch current and a negative slope ramp carrier waveform in each switching period. Due to the proposed control requires only the inductor current or switch current sensor and the output voltage sensor, its circuit implementation was very simple. To verify the proposed control, the circuit experimentation of a 350 W boost converter with the proposed control was applied. From the results, the input current waveform was shaped to be closely sinusoidal, implying high power factor and low harmonics.

Keywords: High power factor converters, boost converters, low harmonic rectifiers, power factor correction, and current control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1754
393 High-performance Second-Generation Controlled Current Conveyor CCCII and High Frequency Applications

Authors: Néjib Hassen, Thouraya Ettaghzouti, Kamel Besbes

Abstract:

In this paper, a modified CCCII is presented. We have used a current mirror with low supply voltage. This circuit is operated at low supply voltage of ±1V. Tspice simulations for TSMC 0.18μm CMOS Technology has shown that the current and voltage bandwidth are respectively 3.34GHz and 4.37GHz, and parasitic resistance at port X has a value of 169.320 for a control current of 120μA. In order to realize this circuit, we have implemented in this first step a universal current mode filter where the frequency can reach the 134.58MHz. In the second step, we have implemented two simulated inductors: one floating and the other grounded. These two inductors are operated in high frequency and variable depending on bias current I0. Finally, we have used the two last inductors respectively to implement two sinusoidal oscillators domains of frequencies respectively: [470MHz, 692MHz], and [358MHz, 572MHz] for bias currents I0 [80μA, 350μA].

Keywords: Current controlled current conveyor CCCII, floating inductor, grounded inductor, oscillator, universal filter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2742
392 Design of a Satellite Solar Panel Deployment Mechanism Using the Brushed DC Motor as Rotational Speed Damper

Authors: Hossein Ramezani Ali-Akbari

Abstract:

This paper presents an innovative method to control the rotational speed of a satellite solar panel during its deployment phase. A brushed DC motor has been utilized in the passive spring driven deployment mechanism to reduce the deployment speed. In order to use the DC motor as a damper, its connector terminals have been connected with an external resistance in a closed circuit. It means that, in this approach, there is no external power supply in the circuit. The working principle of this method is based on the back electromotive force (or back EMF) of the DC motor when an external torque (here the torque produced by the torsional springs) is coupled to the DC motor’s shaft. In fact, the DC motor converts to an electric generator and the current flows into the circuit and then produces the back EMF. Based on Lenz’s law, the generated current produced a torque which acts opposite to the applied external torque, and as a result, the deployment speed of the solar panel decreases. The main advantage of this method is to set an intended damping coefficient to the system via changing the external resistance. To produce the sufficient current, a gearbox has been assembled to the DC motor which magnifies the number of turns experienced by the DC motor. The coupled electro-mechanical equations of the system have been derived and solved, then, the obtained results have been presented. A full-scale prototype of the deployment mechanism has been built and tested. The potential application of brushed DC motors as a rotational speed damper has been successfully demonstrated.

Keywords: Back electromotive force, brushed DC motor, rotational speed damper, satellite solar panel deployment mechanism.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1567
391 Piezoelectric Transducer Modeling: with System Identification (SI) Method

Authors: Nora Taghavi, Ali Sadr

Abstract:

System identification is the process of creating models of dynamic process from input- output signals. The aim of system identification can be identified as “ to find a model with adjustable parameters and then to adjust them so that the predicted output matches the measured output". This paper presents a method of modeling and simulating with system identification to achieve the maximum fitness for transformation function. First by using optimized KLM equivalent circuit for PVDF piezoelectric transducer and assuming different inputs including: sinuside, step and sum of sinusides, get the outputs, then by using system identification toolbox in MATLAB, we estimate the transformation function from inputs and outputs resulted in last program. Then compare the fitness of transformation function resulted from using ARX,OE(Output- Error) and BJ(Box-Jenkins) models in system identification toolbox and primary transformation function form KLM equivalent circuit.

Keywords: PVDF modeling, ARX, BJ(Box-Jenkins), OE(Output-Error), System Identification.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2690
390 Coupled Electromagnetic and Thermal Field Modeling of a Laboratory Busbar System

Authors: Tatyana R. Radeva, Ivan S. Yatchev, Dimitar N. Karastoyanov, Nikolay I. Stoimenov, Stanislav D. Gyoshev

Abstract:

The paper presents coupled electromagnetic and thermal field analysis of busbar system (of rectangular cross-section geometry) submitted to short circuit conditions. The laboratory model was validated against both analytical solution and experimental observations. The considered problem required the computation of the detailed distribution of the power losses and the heat transfer modes. In this electromagnetic and thermal analysis, different definitions of electric busbar heating were considered and compared. The busbar system is a three phase one and consists of aluminum, painted aluminum and copper busbar. The solution to the coupled field problem is obtained using the finite element method and the QuickField™ program. Experiments have been carried out using two different approaches and compared with computed results.

Keywords: Busbar system, coupled problems, finite element method, short-circuit currents.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2932
389 Design of a CMOS Highly Linear Front-end IC with Auto Gain Controller for a Magnetic Field Transceiver

Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2099
388 Regularization of the Trajectories of Dynamical Systems by Adjusting Parameters

Authors: Helle Hein, Ülo Lepik

Abstract:

A gradient learning method to regulate the trajectories of some nonlinear chaotic systems is proposed. The method is motivated by the gradient descent learning algorithms for neural networks. It is based on two systems: dynamic optimization system and system for finding sensitivities. Numerical results of several examples are presented, which convincingly illustrate the efficiency of the method.

Keywords: Chaos, Dynamical Systems, Learning, Neural Networks

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1325
387 Permanent Magnet Synchronous Generator – Unsymmetrical Point Operation

Authors: P. Pistelok

Abstract:

The article presents the concept of an electromagnetic circuit generator with permanent magnets mounted on the surface rotor core designed for single phase work. Computation field-circuit model was shown. The spectrum of time course of voltages in the idle work was presented. The cross section with graphically presentation of magnetic induction in particular parts of electromagnetic circuits was presented. Distribution of magnetic induction at the rated load point for each phase was shown. The time course of voltages and currents for each phases for rated power were displayed. An analysis of laboratory results and measurement of load characteristics of the generator was discussed. The work deals with three electromagnetic circuits of generators with permanent magnet where output voltage characteristics versus rated power were expressed.

Keywords: Permanent magnet generator, permanent magnets, vibration, course of torque, single phase work, asymmetrical three phase work.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2332
386 Study of Shaft Voltage on Short Circuit Alternator with Static Frequency Converter

Authors: Arun Kumar Datta, Manisha Dubey, Shailendra Jain

Abstract:

Electric machines are driven nowadays by static system popularly known as soft starter. This paper describes a thyristor based static frequency converter (SFC) to run a large synchronous machine installed at a short circuit test laboratory. Normally a synchronous machine requires prime mover or some other driving mechanism to run. This machine doesn’t need a prime mover as it operates in dual mode. In the beginning SFC starts this machine as a motor to achieve the full speed. Thereafter whenever required it can be converted to generator mode. This paper begins with the various starting methodology of synchronous machine. Detailed of SFC with different operational modes have been analyzed. Shaft voltage is a very common phenomenon for the machines with static drives. Various causes of shaft voltages in perspective with this machine are the main attraction of this paper.

Keywords: Capacitive coupling, electric discharge machining, inductive coupling, Shaft voltage, static frequency converter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3213
385 Simulation and Realization of a Battery Charge Regulator

Authors: B. Nasri, M. Bensaada

Abstract:

We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3166
384 A High Accuracy Measurement Circuit for Soil Moisture Detection

Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

Abstract:

The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3980
383 Estimating Shortest Circuit Path Length Complexity

Authors: Azam Beg, P. W. Chandana Prasad, S.M.N.A Senenayake

Abstract:

When binary decision diagrams are formed from uniformly distributed Monte Carlo data for a large number of variables, the complexity of the decision diagrams exhibits a predictable relationship to the number of variables and minterms. In the present work, a neural network model has been used to analyze the pattern of shortest path length for larger number of Monte Carlo data points. The neural model shows a strong descriptive power for the ISCAS benchmark data with an RMS error of 0.102 for the shortest path length complexity. Therefore, the model can be considered as a method of predicting path length complexities; this is expected to lead to minimum time complexity of very large-scale integrated circuitries and related computer-aided design tools that use binary decision diagrams.

Keywords: Monte Carlo circuit simulation data, binary decision diagrams, neural network modeling, shortest path length estimation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1330
382 A Floating Gate MOSFET Based Novel Programmable Current Reference

Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

Abstract:

In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1754
381 Capacitive Air Bubble Detector Operated at Different Frequencies for Application in Hemodialysis

Authors: Mawahib Gafare Abdalrahman Ahmed, Abdallah Belal Adam, John Ojur Dennis

Abstract:

Air bubbles have been detected in human circulation of end-stage renal disease patients who are treated by hemodialysis. The consequence of air embolism, air bubbles, is under recognized and usually overlooked in daily practice. This paper shows results of a capacitor based detection method that capable of detecting the presence of air bubbles in the blood stream in different frequencies. The method is based on a parallel plates capacitor made of platinum with an area of 1.5 cm2 and a distance between the two plates is 1cm. The dielectric material used in this capacitor is Dextran70 solution which mimics blood rheology. Simulations were carried out using RC circuit at two frequencies 30Hz and 3 kHz and results compared with experiments and theory. It is observed that by injecting air bubbles of different diameters into the device, there were significant changes in the capacitance of the capacitor. Furthermore, it is observed that the output voltage from the circuit increased with increasing air bubble diameter. These results demonstrate the feasibility of this approach in improving air bubble detection in Hemodialysis.

Keywords: Air bubbles, Hemodialysis, Capacitor, Dextran70, Air bubbles diameters.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3198
380 Design and Construction of Microcontroller-Based Telephone Exchange System

Authors: Aye Sandar Win

Abstract:

This paper demonstrates design and construction of microcontroller-based telephone exchange system and the aims of this paper is to study telecommunication, connection with PIC16F877A and DTMF MT8870D. In microcontroller system, PIC 16F877 microcontroller is used to control the call processing. Dial tone, busy tone and ring tone are provided during call progress. Instead of using ready made tone generator IC, oscillator based tone generator is used. The results of this telephone exchange system are perfect for homes and small businesses needing the extensions. It requires the phone operation control system, the analog interface circuit and the switching circuit. This exchange design will contain eight channels. It is the best low cost, good quality telephone exchange for today-s telecommunication needs. It offers the features available in much more expensive PBX units without using high-priced phones. It is for long distance telephone services.

Keywords: Control software, DTMF receiver and decoder, hooksensing, microcontroller system, power supply, ring generator andoscillator based tone generator.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 7658
379 An Energy Efficient Digital Baseband for Batteryless Remote Control

Authors: Wei-Da Toh, Yuan Gao, Minkyu Je

Abstract:

In this paper, an energy efficient digital baseband circuit for piezoelectric (PE) harvester powered batteryless remote control system is presented. Pulse mode PE harvester, which provides short duration of energy, is adopted to replace conventional chemical battery in wireless remote controller. The transmitter digital baseband repeats the control command transmission once the digital circuit is initiated by the power-on-reset. A power efficient data frame format is proposed to maximize the transmission repetition time. By using the proposed frame format and receiver clock and data recovery method, the receiver baseband is able to decode the command even when the received data has 20% error. The proposed transmitter and receiver baseband are implemented using FPGA and simulation results are presented.

Keywords: Clock and Data Recovery (CDR), Correlator, Digital Baseband, Gold Code, Power-On-Reset.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1974
378 Two New Low Power High Performance Full Adders with Minimum Gates

Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

Abstract:

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2030
377 Reducing Test Vectors Count Using Fault Based Optimization Schemes in VLSI Testing

Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

Abstract:

Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1356
376 Analysis of Current Mirror in 32nm MOSFET and CNTFET Technologies

Authors: Mohini Polimetla, Rajat Mahapatra

Abstract:

There is need to explore emerging technologies based on carbon nanotube electronics as the MOS technology is approaching its limits. As MOS devices scale to the nano ranges, increased short channel effects and process variations considerably effect device and circuit designs. As a promising new transistor, the Carbon Nanotube Field Effect Transistor(CNTFET) avoids most of the fundamental limitations of the Traditional MOSFET devices. In this paper we present the analysis and comparision of a Carbon Nanotube FET(CNTFET) based 10(A current mirror with MOSFET for 32nm technology node. The comparision shows the superiority of the former in terms of 97% increase in output resistance,24% decrease in power dissipation and 40% decrease in minimum voltage required for constant saturation current. Furthermore the effect on performance of current mirror due to change in chirality vector of CNT has also been investigated. The circuit simulations are carried out using HSPICE model.

Keywords: Carbon Nanotube Field Effect Transistor, Chirality Vector, Current Mirror

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2956
375 Dual-Link Hierarchical Cluster-Based Interconnect Architecture for 3D Network on Chip

Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

Abstract:

Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1474
374 Development of a Smart Liquid Level Controller

Authors: Adamu Mudi, Fawole Wahab Ibrahim, Abubakar Abba Kolo

Abstract:

In this paper, we present a microcontroller-based liquid level controller which identifies the various levels of a liquid, carries out certain actions and is capable of communicating with the human being and other devices through the GSM network. This project is useful in ensuring that a liquid is not wasted. It also contributes to the internet of things paradigm, which is the future of the internet. The method used in this work includes designing the circuit and simulating it. The circuit is then implemented on a solderless breadboard after which it is implemented on a strip board. A C++ computer program is developed and uploaded into the microcontroller. This program instructs the microcontroller on how to carry out its actions. In other to determine levels of the liquid, an ultrasonic wave is sent to the surface of the liquid similar to radar or the method for detecting the level of sea bed. Message is sent to the phone of the user similar to the way computers send messages to phones of GSM users. It is concluded that the routine of observing the levels of a liquid in a tank, refilling the tank when the liquid level is too low can be entirely handled by a programmable device without wastage of the liquid or bothering a human being with such tasks.

Keywords: Arduino Uno, HC-SR04 ultrasonic sensor, Internet of Things, IoT, SIM900 GSM Module.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 410
373 Design and Development of On-Line, On-Site, In-Situ Induction Motor Performance Analyser

Authors: G. S. Ayyappan, Srinivas Kota, Jaffer R. C. Sheriff, C. Prakash Chandra Joshua

Abstract:

In the present scenario of energy crises, energy conservation in the electrical machines is very important in the industries. In order to conserve energy, one needs to monitor the performance of an induction motor on-site and in-situ. The instruments available for this purpose are very meager and very expensive. This paper deals with the design and development of induction motor performance analyser on-line, on-site, and in-situ. The system measures only few electrical input parameters like input voltage, line current, power factor, frequency, powers, and motor shaft speed. These measured data are coupled to name plate details and compute the operating efficiency of induction motor. This system employs the method of computing motor losses with the help of equivalent circuit parameters. The equivalent circuit parameters of the concerned motor are estimated using the developed algorithm at any load conditions and stored in the system memory. The developed instrument is a reliable, accurate, compact, rugged, and cost-effective one. This portable instrument could be used as a handy tool to study the performance of both slip ring and cage induction motors. During the analysis, the data can be stored in SD Memory card and one can perform various analyses like load vs. efficiency, torque vs. speed characteristics, etc. With the help of the developed instrument, one can operate the motor around its Best Operating Point (BOP). Continuous monitoring of the motor efficiency could lead to Life Cycle Assessment (LCA) of motors. LCA helps in taking decisions on motor replacement or retaining or refurbishment.

Keywords: Energy conservation, equivalent circuit parameters, induction motor efficiency, life cycle assessment, motor performance analysis.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 901
372 Mitigation of Electromagnetic Interference Generated by GPIB Control-Network in AC-DC Transfer Measurement System

Authors: M. M. Hlakola, E. Golovins, D. V. Nicolae

Abstract:

The field of instrumentation electronics is undergoing an explosive growth, due to its wide range of applications. The proliferation of electrical devices in a close working proximity can negatively influence each other’s performance. The degradation in the performance is due to electromagnetic interference (EMI). This paper investigates the negative effects of electromagnetic interference originating in the General Purpose Interface Bus (GPIB) control-network of the AC-DC transfer measurement system. Remedial measures of reducing measurement errors and failure of range of industrial devices due to EMI have been explored. The ACDC transfer measurement system was analysed for the commonmode (CM) EMI effects. Further investigation of coupling path as well as much accurate identification of noise propagation mechanism has been outlined. To prevent the occurrence of common-mode (ground loops) which was identified between the GPIB system control circuit and the measurement circuit, a microcontroller-driven GPIB switching isolator device was designed, prototyped, programmed and validated. This mitigation technique has been explored to reduce EMI effectively.

Keywords: CM, EMI, GPIB, ground loops.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1783
371 Investigations into Effect of Neural Network Predictive Control of UPFC for Improving Transient Stability Performance of Multimachine Power System

Authors: Sheela Tiwari, R. Naresh, R. Jha

Abstract:

The paper presents an investigation in to the effect of neural network predictive control of UPFC on the transient stability performance of a multimachine power system. The proposed controller consists of a neural network model of the test system. This model is used to predict the future control inputs using the damped Gauss-Newton method which employs ‘backtracking’ as the line search method for step selection. The benchmark 2 area, 4 machine system that mimics the behavior of large power systems is taken as the test system for the study and is subjected to three phase short circuit faults at different locations over a wide range of operating conditions. The simulation results clearly establish the robustness of the proposed controller to the fault location, an increase in the critical clearing time for the circuit breakers, and an improved damping of the power oscillations as compared to the conventional PI controller.

Keywords: Identification, Neural networks, Predictive control, Transient stability, UPFC.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2027
370 Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit

Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1740