Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 23

Search results for: R. Balasubramanian

23 Effect of Welding Processes on Fatigue Properties of Ti-6Al-4V Alloy Joints

Authors: T.S.Balasubramanian, V.Balasubramanian, M.A.Muthumanikkam

Abstract:

This paper reports the fatigue crack growth behaviour of gas tungsten arc, electron beam and laser beam welded Ti-6Al-4V titanium alloy. Centre cracked tensile specimens were prepared to evaluate the fatigue crack growth behaviour. A 100kN servo hydraulic controlled fatigue testing machine was used under constant amplitude uniaxial tensile load (stress ratio of 0.1 and frequency of 10 Hz). Crack growth curves were plotted and crack growth parameters (exponent and intercept) were evaluated. Critical and threshold stress intensity factor ranges were also evaluated. Fatigue crack growth behaviour of welds was correlated with mechanical properties and microstructural characteristics of welds. Of the three joints, the joint fabricated by laser beam welding exhibited higher fatigue crack growth resistance due to the presence of fine lamellar microstructure in the weld metal.

Keywords: Fatigue, Non ferrous metals and alloys, welding

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22 On λ− Summable of Orlicz Space of Gai Sequences of Fuzzy Numbers

Authors: N.Subramanian, S.Krishnamoorthy, S. Balasubramanian

Abstract:

In this paper the concept of strongly (λM)p - Ces'aro summability of a sequence of fuzzy numbers and strongly λM- statistically convergent sequences of fuzzy numbers is introduced.

Keywords: Fuzzy numbers, statistical convergence, Orlicz space, gai sequence.

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21 On Some Subspaces of Entire Sequence Space of Fuzzy Numbers

Authors: T. Balasubramanian, A. Pandiarani

Abstract:

In this paper we introduce some subspaces of fuzzy entire sequence space. Some general properties of these sequence spaces are discussed. Also some inclusion relation involving the spaces are obtained. Mathematics Subject Classification: 40A05, 40D25.

Keywords: Fuzzy Numbers, Entire sequences, completeness, Fuzzy entire sequences

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20 Quantitative Evaluation of Frameworks for Web Applications

Authors: Thirumalai Selvi, N. V. Balasubramanian, P. Sheik Abdul Khader

Abstract:

An empirical study of web applications that use software frameworks is presented here. The analysis is based on two approaches. In the first, developers using such frameworks are required, based on their experience, to assign weights to parameters such as database connection. In the second approach, a performance testing tool, OpenSTA, is used to compute start time and other such measures. From such an analysis, it is concluded that open source software is superior to proprietary software. The motivation behind this research is to examine ways in which a quantitative assessment can be made of software in general and frameworks in particular. Concepts such as metrics and architectural styles are discussed along with previously published research.

Keywords: Metrics, Frameworks, Performance Testing, WebApplications, Open Source.

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19 An Efficient Gaussian Noise Removal Image Enhancement Technique for Gray Scale Images

Authors: V. Murugan, R. Balasubramanian

Abstract:

Image enhancement is a challenging issue in many applications. In the last two decades, there are various filters developed. This paper proposes a novel method which removes Gaussian noise from the gray scale images. The proposed technique is compared with Enhanced Fuzzy Peer Group Filter (EFPGF) for various noise levels. Experimental results proved that the proposed filter achieves better Peak-Signal-to-Noise-Ratio PSNR than the existing techniques. The proposed technique achieves 1.736dB gain in PSNR than the EFPGF technique.

Keywords: Gaussian noise, adaptive bilateral filter, fuzzy peer group filter, switching bilateral filter, PSNR

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18 Analysis of Effect of Pre-Logic Factoring on Cell Based Combinatorial Logic Synthesis

Authors: Padmanabhan Balasubramanian, Bashetty Raghavendra

Abstract:

In this paper, an analysis is presented, which demonstrates the effect pre-logic factoring could have on an automated combinational logic synthesis process succeeding it. The impact of pre-logic factoring for some arbitrary combinatorial circuits synthesized within a FPGA based logic design environment has been analyzed previously. This paper explores a similar effect, but with the non-regenerative logic synthesized using elements of a commercial standard cell library. On an overall basis, the results obtained pertaining to the analysis on a variety of MCNC/IWLS combinational logic benchmark circuits indicate that pre-logic factoring has the potential to facilitate simultaneous power, delay and area optimized synthesis solutions in many cases.

Keywords: Algebraic factoring, Combinational logic synthesis, Standard cells, Low power, Delay optimization, Area reduction.

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17 Performance Analysis of Proprietary and Non-Proprietary Tools for Regression Testing Using Genetic Algorithm

Authors: K. Hema Shankari, R. Thirumalaiselvi, N. V. Balasubramanian

Abstract:

The present paper addresses to the research in the area of regression testing with emphasis on automated tools as well as prioritization of test cases. The uniqueness of regression testing and its cyclic nature is pointed out. The difference in approach between industry, with business model as basis, and academia, with focus on data mining, is highlighted. Test Metrics are discussed as a prelude to our formula for prioritization; a case study is further discussed to illustrate this methodology. An industrial case study is also described in the paper, where the number of test cases is so large that they have to be grouped as Test Suites. In such situations, a genetic algorithm proposed by us can be used to reconfigure these Test Suites in each cycle of regression testing. The comparison is made between a proprietary tool and an open source tool using the above-mentioned metrics. Our approach is clarified through several tables.

Keywords: APFD metric, genetic algorithm, regression testing, RFT tool, test case prioritization, selenium tool.

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16 Transient Three Dimensional FE Modeling for Thermal Analysis of Pulsed Current Gas Tungsten Arc Welding of Aluminum Alloy

Authors: N. Karunakaran, V. Balasubramanian

Abstract:

This paper presents the results of a study aimed at establishing the temperature distribution during the welding of aluminum alloy plates by Pulsed Current Gas Tungsten Arc Welding (PCGTAW) and Constant Current Gas Tungsten Arc Welding (CCGTAW) processes. Pulsing of the GTA welding current influences the dimensions and solidification rate of the fused zone, it also reduces the weld pool volume hence a narrower bead. In this investigation, the base material considered was aluminum alloy AA 6351 T6, which is finding use in aircraft, automobile and high-speed train components. A finite element analysis was carried out using ANSYS, and the results of the FEA were compared with the experimental results. It is evident from the study that the finite element analysis using ANSYS can be effectively used to model PCGTAW process for finding temperature distribution.

Keywords: Gas tungsten arc welding, pulsed current, finite element analysis, thermal analysis, aluminum alloy.

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15 Power-Efficient AND-EXOR-INV Based Realization of Achilles' heel Logic Functions

Authors: Padmanabhan Balasubramanian, R. Chinnadurai

Abstract:

This paper deals with a power-conscious ANDEXOR- Inverter type logic implementation for a complex class of Boolean functions, namely Achilles- heel functions. Different variants of the above function class have been considered viz. positive, negative and pure horn for analysis and simulation purposes. The proposed realization is compared with the decomposed implementation corresponding to an existing standard AND-EXOR logic minimizer; both result in Boolean networks with good testability attribute. It could be noted that an AND-OR-EXOR type logic network does not exist for the positive phase of this unique class of logic function. Experimental results report significant savings in all the power consumption components for designs based on standard cells pertaining to a 130nm UMC CMOS process The simulations have been extended to validate the savings across all three library corners (typical, best and worst case specifications).

Keywords: Achilles' heel functions, AND-EXOR-Inverter logic, CMOS technology, low power design.

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14 Multipurpose Three Dimensional Finite Element Procedure for Thermal Analysis in Pulsed Current Gas Tungsten Arc Welding of AZ 31B Magnesium Alloy Sheets

Authors: N.Karunakaran, V.Balasubramanian

Abstract:

This paper presents the results of a study aimed at establishing the temperature distribution during the welding of magnesium alloy sheets by Pulsed Current Gas Tungsten Arc Welding (PCGTAW) and Constant Current Gas Tungsten Arc Welding (CCGTAW) processes. Pulsing of the GTAW welding current influences the dimensions and solidification rate of the fused zone, it also reduces the weld pool volume hence a narrower bead. In this investigation, the base material considered was 2mm thin AZ 31 B magnesium alloy, which is finding use in aircraft, automobile and high-speed train components. A finite element analysis was carried out using ANSYS, and the results of the FEA were compared with the experimental results. It is evident from this study that the finite element analysis using ANSYS can be effectively used to model PCGTAW process for finding temperature distribution.

Keywords: gas tungsten arc welding, pulsed current, finiteelement analysis, thermal analysis, magnesium alloy.

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13 A Novel Fuzzy Logic Based Controller to Adjust the Brightness of the Television Screen with Respect to Surrounding Light

Authors: A. V. Sai Balasubramanian, N. Ravi Shankar, S. Subbaraman, R. Rengaraj

Abstract:

One of the major cause of eye strain and other problems caused while watching television is the relative illumination between the screen and its surrounding. This can be overcome by adjusting the brightness of the screen with respect to the surrounding light. A controller based on fuzzy logic is proposed in this paper. The fuzzy controller takes in the intensity of light surrounding the screen and the present brightness of the screen as input. The output of the fuzzy controller is the grid voltage corresponding to the required brightness. This voltage is given to CRT and brightness is controller dynamically. For the given test system data, different de-fuzzifier methods have been implemented and the results are compared. In order to validate the effectiveness of the proposed approach, a fuzzy controller has been designed by obtaining a test data from a real time system. The simulations are performed in MATLAB and are verified with standard system data. The proposed approach can be implemented for real time applications.

Keywords: Fuzzy controller, Grid voltage

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12 In Vitro and Experimental Screening of Mangrove Herbal Extract against Vibrio Alginolyticus in Marine Ornamental Fish

Authors: N. B. Dhayanithi, T. T. Ajith Kumar, T. Balasubramanian

Abstract:

Present study summarizes the control of Vibrio alginolyticus infection in hatchery reared Clownfish, Amphiprion sebae with the extract of the mangrove plant, Avicennia marina. Fishes with visible symptoms of hemorrhagic spots were chosen and the genomic DNA of the causative bacterium was isolated and sequenced based on 16S rDNA gene. The in vitro assay revealed that a fraction of A. marina leaf extract elucidated with ethyl acetate: methanol (6:4) showed a high activity (28 mm) at 125 μg/ml concentrations. About 4 % of the fraction fed along with live V. alginolyticus was significantly decreased the cumulative mortality (P<0.05) in the experimental groups than the control group. The responsible fraction was investigated by gas chromatography - mass spectroscopy and found the presence of active compounds. This is the first research in India to control vibriosis infection in marine ornamental fish with mangrove leaf extract.

Keywords: Amphiprion seabe, Avicennia marina, Gas Chromatography - Mass Spectroscopy, Vibrio alginolyticus

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11 Structural and Optical Properties of Pr3+ Doped ZnO and PVA:Zn98Pr2O Nanocomposite Free Standing Film

Authors: Pandiyarajan Thangaraj, Mangalaraja Ramalinga Viswanathan, Karthikeyan Balasubramanian, Héctor D. Mansilla, José Ruiz, David Contreras

Abstract:

In this work, we report, a systematic study on the structural and optical properties of Pr-doped ZnO nanostructures and PVA:Zn98Pr2O polymer matrix nanocomposites free standing films. These particles are synthesized through simple wet chemical route and solution casting technique at room temperature, respectively. Structural studies carried out by X-ray diffraction method confirm that the prepared pure ZnO and Pr doped ZnO nanostructures are in hexagonal wurtzite structure and the microstrain is increased upon doping. TEM analysis reveals that the prepared materials are in sheet like nature. Absorption spectra show free excitonic absorption band at 370 nm and red shift for the Pr doped ZnO nanostructures. The PVA:Zn98Pr2O composite film exhibits both free excitonic and PVA absorption bands at 282 nm. Fourier transform infrared spectral studies confirm the presence of A1 (TO) and E1 (TO) modes of Zn-O bond vibration and the formation of polymer composite materials.

Keywords: Pr doped ZnO, polymer nanocomposites, optical properties.

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10 Performance Analysis of OQSMS and MDDR Scheduling Algorithms for IQ Switches

Authors: K. Navaz, Kannan Balasubramanian

Abstract:

Due to the increasing growth of internet users, the emerging applications of multicast are growing day by day and there is a requisite for the design of high-speed switches/routers. Huge amounts of effort have been done into the research area of multicast switch fabric design and algorithms. Different traffic scenarios are the influencing factor which affect the throughput and delay of the switch. The pointer based multicast scheduling algorithms are not performed well under non-uniform traffic conditions. In this work, performance of the switch has been analyzed by applying the advanced multicast scheduling algorithm OQSMS (Optimal Queue Selection Based Multicast Scheduling Algorithm), MDDR (Multicast Due Date Round-Robin Scheduling Algorithm) and MDRR (Multicast Dual Round-Robin Scheduling Algorithm). The results show that OQSMS achieves better switching performance than other algorithms under the uniform, non-uniform and bursty traffic conditions and it estimates optimal queue in each time slot so that it achieves maximum possible throughput.

Keywords: Multicast, Switch, Delay, Scheduling.

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9 Effect of Chloroform on Aerobic Biodegradation of Organic Solvents in Pharmaceutical Wastewater

Authors: Balasubramanian P, Ligy Philip, S. Murty Bhallamudi

Abstract:

In this study, cometabolic biodegradation of chloroform was experimented with mixed cultures in the presence of various organic solvents like methanol, ethanol, isopropanol, acetone, acetonitrile and toluene as these are predominant discharges in pharmaceutical industries. Toluene and acetone showed higher specific chloroform degradation rate when compared to other compounds. Cometabolic degradation of chloroform was further confirmed by observation of free chloride ions in the medium. An extended Haldane model, incorporating the inhibition due to chloroform and the competitive inhibition between primary substrates, was developed to predict the biodegradation of primary substrates, cometabolic degradation of chloroform and the biomass growth. The proposed model is based on the use of biokinetic parameters obtained from single substrate degradation studies. The model was able to satisfactorily predict the experimental results of ternary and quaternary mixtures. The proposed model can be used for predicting the performance of bioreactors treating discharges from pharmaceutical industries.

Keywords: Chloroform, Cometabolic biodegradation, Competitive inhibition, Extended Haldane model, Pharmaceuticalindustry.

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8 Compact Binary Tree Representation of Logic Function with Enhanced Throughput

Authors: Padmanabhan Balasubramanian, C. Ardil

Abstract:

An effective approach for realizing the binary tree structure, representing a combinational logic functionality with enhanced throughput, is discussed in this paper. The optimization in maximum operating frequency was achieved through delay minimization, which in turn was possible by means of reducing the depth of the binary network. The proposed synthesis methodology has been validated by experimentation with FPGA as the target technology. Though our proposal is technology independent, yet the heuristic enables better optimization in throughput even after technology mapping for such Boolean functionality; whose reduced CNF form is associated with a lesser literal cost than its reduced DNF form at the Boolean equation level. For cases otherwise, our method converges to similar results as that of [12]. The practical results obtained for a variety of case studies demonstrate an improvement in the maximum throughput rate for Spartan IIE (XC2S50E-7FT256) and Spartan 3 (XC3S50-4PQ144) FPGA logic families by 10.49% and 13.68% respectively. With respect to the LUTs and IOBUFs required for physical implementation of the requisite non-regenerative logic functionality, the proposed method enabled savings to the tune of 44.35% and 44.67% respectively, over the existing efficient method available in literature [12].

Keywords: Binary logic tree, FPGA based design, Boolean function, Throughput rate, CNF, DNF.

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7 An Intelligent Cascaded Fuzzy Logic Based Controller for Controlling the Room Temperature in Hydronic Heating System

Authors: Vikram Jeganathan, A. V. Sai Balasubramanian, N. Ravi Shankar, S. Subbaraman, R. Rengaraj

Abstract:

Heating systems are a necessity for regions which brace extreme cold weather throughout the year. To maintain a comfortable temperature inside a given place, heating systems making use of- Hydronic boilers- are used. The principle of a single pipe system serves as a base for their working. It is mandatory for these heating systems to control the room temperature, thus maintaining a warm environment. In this paper, the concept of regulation of the room temperature over a wide range is established by using an Adaptive Fuzzy Controller (AFC). This fuzzy controller automatically detects the changes in the outside temperatures and correspondingly maintains the inside temperature to a palatial value. Two separate AFC's are put to use to carry out this function: one to determine the quantity of heat needed to reach the prospective temperature required and to set the desired temperature; the other to control the position of the valve, which is directly proportional to the error between the present room temperature and the user desired temperature. The fuzzy logic controls the position of the valve as per the requirement of the heat. The amount by which the valve opens or closes is controlled by 5 knob positions, which vary from minimum to maximum, thereby regulating the amount of heat flowing through the valve. For the given test system data, different de-fuzzifier methods have been implemented and the results are compared. In order to validate the effectiveness of the proposed approach, a fuzzy controller has been designed by obtaining a test data from a real time system. The simulations are performed in MATLAB and are verified with standard system data. The proposed approach can be implemented for real time applications.

Keywords: Adaptive fuzzy controller, Hydronic heating system

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6 A Set Theory Based Factoring Technique and Its Use for Low Power Logic Design

Authors: Padmanabhan Balasubramanian, Ryuta Arisaka

Abstract:

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

Keywords: Factorization, Set theory, Logic function, Standardcell based design, Low power.

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5 Multipath Routing Protocol Using Basic Reconstruction Routing (BRR) Algorithm in Wireless Sensor Network

Authors: K. Rajasekaran, Kannan Balasubramanian

Abstract:

A sensory network consists of multiple detection locations called sensor nodes, each of which is tiny, featherweight and portable. A single path routing protocols in wireless sensor network can lead to holes in the network, since only the nodes present in the single path is used for the data transmission. Apart from the advantages like reduced computation, complexity and resource utilization, there are some drawbacks like throughput, increased traffic load and delay in data delivery. Therefore, multipath routing protocols are preferred for WSN. Distributing the traffic among multiple paths increases the network lifetime. We propose a scheme, for the data to be transmitted through a dominant path to save energy. In order to obtain a high delivery ratio, a basic route reconstruction protocol is utilized to reconstruct the path whenever a failure is detected. A basic reconstruction routing (BRR) algorithm is proposed, in which a node can leap over path failure by using the already existing routing information from its neighbourhood while the composed data is transmitted from the source to the sink. In order to save the energy and attain high data delivery ratio, data is transmitted along a multiple path, which is achieved by BRR algorithm whenever a failure is detected. Further, the analysis of how the proposed protocol overcomes the drawback of the existing protocols is presented. The performance of our protocol is compared to AOMDV and energy efficient node-disjoint multipath routing protocol (EENDMRP). The system is implemented using NS-2.34. The simulation results show that the proposed protocol has high delivery ratio with low energy consumption.

Keywords: Multipath routing, WSN, energy efficient routing, alternate route, assured data delivery.

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4 CBIR Using Multi-Resolution Transform for Brain Tumour Detection and Stages Identification

Authors: H. Benjamin Fredrick David, R. Balasubramanian, A. Anbarasa Pandian

Abstract:

Image retrieval is the most interesting technique which is being used today in our digital world. CBIR, commonly expanded as Content Based Image Retrieval is an image processing technique which identifies the relevant images and retrieves them based on the patterns that are extracted from the digital images. In this paper, two research works have been presented using CBIR. The first work provides an automated and interactive approach to the analysis of CBIR techniques. CBIR works on the principle of supervised machine learning which involves feature selection followed by training and testing phase applied on a classifier in order to perform prediction. By using feature extraction, the image transforms such as Contourlet, Ridgelet and Shearlet could be utilized to retrieve the texture features from the images. The features extracted are used to train and build a classifier using the classification algorithms such as Naïve Bayes, K-Nearest Neighbour and Multi-class Support Vector Machine. Further the testing phase involves prediction which predicts the new input image using the trained classifier and label them from one of the four classes namely 1- Normal brain, 2- Benign tumour, 3- Malignant tumour and 4- Severe tumour. The second research work includes developing a tool which is used for tumour stage identification using the best feature extraction and classifier identified from the first work. Finally, the tool will be used to predict tumour stage and provide suggestions based on the stage of tumour identified by the system. This paper presents these two approaches which is a contribution to the medical field for giving better retrieval performance and for tumour stages identification.

Keywords: Brain tumour detection, content based image retrieval, classification of tumours, image retrieval.

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3 Matrix Based Synthesis of EXOR dominated Combinational Logic for Low Power

Authors: Padmanabhan Balasubramanian, C. Hari Narayanan

Abstract:

This paper discusses a new, systematic approach to the synthesis of a NP-hard class of non-regenerative Boolean networks, described by FON[FOFF]={mi}[{Mi}], where for every mj[Mj]∈{mi}[{Mi}], there exists another mk[Mk]∈{mi}[{Mi}], such that their Hamming distance HD(mj, mk)=HD(Mj, Mk)=O(n), (where 'n' represents the number of distinct primary inputs). The method automatically ensures exact minimization for certain important selfdual functions with 2n-1 points in its one-set. The elements meant for grouping are determined from a newly proposed weighted incidence matrix. Then the binary value corresponding to the candidate pair is correlated with the proposed binary value matrix to enable direct synthesis. We recommend algebraic factorization operations as a post processing step to enable reduction in literal count. The algorithm can be implemented in any high level language and achieves best cost optimization for the problem dealt with, irrespective of the number of inputs. For other cases, the method is iterated to subsequently reduce it to a problem of O(n-1), O(n-2),.... and then solved. In addition, it leads to optimal results for problems exhibiting higher degree of adjacency, with a different interpretation of the heuristic, and the results are comparable with other methods. In terms of literal cost, at the technology independent stage, the circuits synthesized using our algorithm enabled net savings over AOI (AND-OR-Invert) logic, AND-EXOR logic (EXOR Sum-of- Products or ESOP forms) and AND-OR-EXOR logic by 45.57%, 41.78% and 41.78% respectively for the various problems. Circuit level simulations were performed for a wide variety of case studies at 3.3V and 2.5V supply to validate the performance of the proposed method and the quality of the resulting synthesized circuits at two different voltage corners. Power estimation was carried out for a 0.35micron TSMC CMOS process technology. In comparison with AOI logic, the proposed method enabled mean savings in power by 42.46%. With respect to AND-EXOR logic, the proposed method yielded power savings to the tune of 31.88%, while in comparison with AND-OR-EXOR level networks; average power savings of 33.23% was obtained.

Keywords: AOI logic, ESOP, AND-OR-EXOR, Incidencematrix, Hamming distance.

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2 Library Aware Power Conscious Realization of Complementary Boolean Functions

Authors: Padmanabhan Balasubramanian, C. Ardil

Abstract:

In this paper, we consider the problem of logic simplification for a special class of logic functions, namely complementary Boolean functions (CBF), targeting low power implementation using static CMOS logic style. The functions are uniquely characterized by the presence of terms, where for a canonical binary 2-tuple, D(mj) ∪ D(mk) = { } and therefore, we have | D(mj) ∪ D(mk) | = 0 [19]. Similarly, D(Mj) ∪ D(Mk) = { } and hence | D(Mj) ∪ D(Mk) | = 0. Here, 'mk' and 'Mk' represent a minterm and maxterm respectively. We compare the circuits minimized with our proposed method with those corresponding to factored Reed-Muller (f-RM) form, factored Pseudo Kronecker Reed-Muller (f-PKRM) form, and factored Generalized Reed-Muller (f-GRM) form. We have opted for algebraic factorization of the Reed-Muller (RM) form and its different variants, using the factorization rules of [1], as it is simple and requires much less CPU execution time compared to Boolean factorization operations. This technique has enabled us to greatly reduce the literal count as well as the gate count needed for such RM realizations, which are generally prone to consuming more cells and subsequently more power consumption. However, this leads to a drawback in terms of the design-for-test attribute associated with the various RM forms. Though we still preserve the definition of those forms viz. realizing such functionality with only select types of logic gates (AND gate and XOR gate), the structural integrity of the logic levels is not preserved. This would consequently alter the testability properties of such circuits i.e. it may increase/decrease/maintain the same number of test input vectors needed for their exhaustive testability, subsequently affecting their generalized test vector computation. We do not consider the issue of design-for-testability here, but, instead focus on the power consumption of the final logic implementation, after realization with a conventional CMOS process technology (0.35 micron TSMC process). The quality of the resulting circuits evaluated on the basis of an established cost metric viz., power consumption, demonstrate average savings by 26.79% for the samples considered in this work, besides reduction in number of gates and input literals by 39.66% and 12.98% respectively, in comparison with other factored RM forms.

Keywords: Reed-Muller forms, Logic function, Hammingdistance, Algebraic factorization, Low power design.

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1 Power and Delay Optimized Graph Representation for Combinational Logic Circuits

Authors: Padmanabhan Balasubramanian, Karthik Anantha

Abstract:

Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.

Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.

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