Search results for: Memory Forensics.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 455

Search results for: Memory Forensics.

335 Virtual Environment Design Guidelines for Elderly People in Early Detection of Dementia

Authors: Syadiah Nor Wan Shamsuddin, Valerie Lesk , Hassan Ugail

Abstract:

Early detection of dementia by testing the spatial memory can be applied using a virtual environment. This paper presents guidelines on how to design a virtual environment specifically for elderly in early detection of dementia. The specific design needs to be considered because the effectiveness of the technology relies on the ability of the end user to use it. The primary goal of these guidelines is to promote accessibility. Based on these guidelines, a virtual simulation was developed and evaluated. The results on usability of acceptance and satisfaction that are tested on young (control group) and elderly participants indicate that these guidelines are reliable and useful for use with elderly people.

Keywords: Virtual Environment, spatial memory, design, guidelines

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334 A PWM Controller with Multiple-Access Table Look-up for DC-DC Buck Conversion

Authors: Steve Hung-Lung Tu, Chu-Tse Lee

Abstract:

A new power regulator controller with multiple-access PID compensator is proposed, which can achieve a minimum memory requirement for fully table look-up. The proposed regulator controller employs hysteresis comparators, an error process unit (EPU) for voltage regulation, a multiple-access PID compensator and a lowpower- consumption digital PWM (DPWM). Based on the multipleaccess mechanism, the proposed controller can alleviate the penalty of large amount of memory employed for fully table look-up based PID compensator in the applications of power regulation. The proposed controller has been validated with simulation results.

Keywords: Multiple access, PID compensator, PWM, Buck conversion.

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333 An Efficient Approach to Mining Frequent Itemsets on Data Streams

Authors: Sara Ansari, Mohammad Hadi Sadreddini

Abstract:

The increasing importance of data stream arising in a wide range of advanced applications has led to the extensive study of mining frequent patterns. Mining data streams poses many new challenges amongst which are the one-scan nature, the unbounded memory requirement and the high arrival rate of data streams. In this paper, we propose a new approach for mining itemsets on data stream. Our approach SFIDS has been developed based on FIDS algorithm. The main attempts were to keep some advantages of the previous approach and resolve some of its drawbacks, and consequently to improve run time and memory consumption. Our approach has the following advantages: using a data structure similar to lattice for keeping frequent itemsets, separating regions from each other with deleting common nodes that results in a decrease in search space, memory consumption and run time; and Finally, considering CPU constraint, with increasing arrival rate of data that result in overloading system, SFIDS automatically detect this situation and discard some of unprocessing data. We guarantee that error of results is bounded to user pre-specified threshold, based on a probability technique. Final results show that SFIDS algorithm could attain about 50% run time improvement than FIDS approach.

Keywords: Data stream, frequent itemset, stream mining.

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332 Multi Switched Split Vector Quantizer

Authors: M. Satya Sai Ram, P. Siddaiah, M. Madhavi Latha

Abstract:

Vector quantization is a powerful tool for speech coding applications. This paper deals with LPC Coding of speech signals which uses a new technique called Multi Switched Split Vector Quantization, This is a hybrid of two product code vector quantization techniques namely the Multi stage vector quantization technique, and Switched split vector quantization technique,. Multi Switched Split Vector Quantization technique quantizes the linear predictive coefficients in terms of line spectral frequencies. From results it is proved that Multi Switched Split Vector Quantization provides better trade off between bitrate and spectral distortion performance, computational complexity and memory requirements when compared to Switched Split Vector Quantization, Multi stage vector quantization, and Split Vector Quantization techniques. By employing the switching technique at each stage of the vector quantizer the spectral distortion, computational complexity and memory requirements were greatly reduced. Spectral distortion was measured in dB, Computational complexity was measured in floating point operations (flops), and memory requirements was measured in (floats).

Keywords: Unconstrained vector quantization, Linear predictiveCoding, Split vector quantization, Multi stage vector quantization, Switched Split vector quantization, Line Spectral Frequencies.

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331 A High-Speed and Low-Energy Ternary Content Addressable Memory Design Using Feedback in Match-Line Sense Amplifier

Authors: Syed Iftekhar Ali, M. S. Islam

Abstract:

In this paper we present an energy efficient match-line (ML) sensing scheme for high-speed ternary content-addressable memory (TCAM). The proposed scheme isolates the sensing unit of the sense amplifier from the large and variable ML capacitance. It employs feedback in the sense amplifier to successfully detect a match while keeping the ML voltage swing low. This reduced voltage swing results in large energy saving. Simulation performed using 130nm 1.2V CMOS logic shows at least 30% total energy saving in our scheme compared to popular current race (CR) scheme for similar search speed. In terms of speed, dynamic energy, peak power consumption and transistor count our scheme also shows better performance than mismatch-dependant (MD) power allocation technique which also employs feedback in the sense amplifier. Additionally, the implementation of our scheme is simpler than CR or MD scheme because of absence of analog control voltage and programmable delay circuit as have been used in those schemes.

Keywords: content-addressable memory, energy consumption, feedback, peak power, sensing scheme, sense amplifier, ternary.

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330 Reduced Dynamic Time Warping for Handwriting Recognition Based on Multidimensional Time Series of a Novel Pen Device

Authors: Muzaffar Bashir, Jürgen Kempf

Abstract:

The purpose of this paper is to present a Dynamic Time Warping technique which reduces significantly the data processing time and memory size of multi-dimensional time series sampled by the biometric smart pen device BiSP. The acquisition device is a novel ballpoint pen equipped with a diversity of sensors for monitoring the kinematics and dynamics of handwriting movement. The DTW algorithm has been applied for time series analysis of five different sensor channels providing pressure, acceleration and tilt data of the pen generated during handwriting on a paper pad. But the standard DTW has processing time and memory space problems which limit its practical use for online handwriting recognition. To face with this problem the DTW has been applied to the sum of the five sensor signals after an adequate down-sampling of the data. Preliminary results have shown that processing time and memory size could significantly be reduced without deterioration of performance in single character and word recognition. Further excellent accuracy in recognition was achieved which is mainly due to the reduced dynamic time warping RDTW technique and a novel pen device BiSP.

Keywords: Biometric character recognition, biometric person authentication, biometric smart pen BiSP, dynamic time warping DTW, online-handwriting recognition, multidimensional time series.

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329 FPGA Implementation of a Vision-Based Blind Spot Warning System

Authors: Yu Ren Lin, Yu Hong Li

Abstract:

Vision-based intelligent vehicle applications often require large amounts of memory to handle video streaming and image processing, which in turn increases complexity of hardware and software. This paper presents an FPGA implement of a vision-based blind spot warning system. Using video frames, the information of the blind spot area turns into one-dimensional information. Analysis of the estimated entropy of image allows the detection of an object in time. This idea has been implemented in the XtremeDSP video starter kit. The blind spot warning system uses only 13% of its logic resources and 95k bits block memory, and its frame rate is over 30 frames per sec (fps).

Keywords: blind-spot area, image, FPGA

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328 A Pairwise-Gaussian-Merging Approach: Towards Genome Segmentation for Copy Number Analysis

Authors: Chih-Hao Chen, Hsing-Chung Lee, Qingdong Ling, Hsiao-Jung Chen, Sun-Chong Wang, Li-Ching Wu, H.C. Lee

Abstract:

Segmentation, filtering out of measurement errors and identification of breakpoints are integral parts of any analysis of microarray data for the detection of copy number variation (CNV). Existing algorithms designed for these tasks have had some successes in the past, but they tend to be O(N2) in either computation time or memory requirement, or both, and the rapid advance of microarray resolution has practically rendered such algorithms useless. Here we propose an algorithm, SAD, that is much faster and much less thirsty for memory – O(N) in both computation time and memory requirement -- and offers higher accuracy. The two key ingredients of SAD are the fundamental assumption in statistics that measurement errors are normally distributed and the mathematical relation that the product of two Gaussians is another Gaussian (function). We have produced a computer program for analyzing CNV based on SAD. In addition to being fast and small it offers two important features: quantitative statistics for predictions and, with only two user-decided parameters, ease of use. Its speed shows little dependence on genomic profile. Running on an average modern computer, it completes CNV analyses for a 262 thousand-probe array in ~1 second and a 1.8 million-probe array in 9 seconds

Keywords: Cancer, pathogenesis, chromosomal aberration, copy number variation, segmentation analysis.

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327 FPGA Implement of a Vision Based Lane Departure Warning System

Authors: Yu Ren Lin, Yi Feng Su

Abstract:

Using vision based solution in intelligent vehicle application often needs large memory to handle video stream and image process which increase complexity of hardware and software. In this paper, we present a FPGA implement of a vision based lane departure warning system. By taking frame of videos, the line gradient of line is estimated and the lane marks are found. By analysis the position of lane mark, departure of vehicle will be detected in time. This idea has been implemented in Xilinx Spartan6 FPGA. The lane departure warning system used 39% logic resources and no memory of the device. The average availability is 92.5%. The frame rate is more than 30 frames per second (fps).

Keywords: Lane departure warning system, image, FPGA.

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326 Sustaining the Social Memory in a Historic Neighborhood: The Case Study of Uch Dukkan Neighborhood in Ardabil City in Azerbaijani Region of Iran

Authors: Yousef Daneshvar Rouyandozagh, Ece. K. Açikgöz

Abstract:

Conservation of historical urban patterns in the traditional neighborhoods is a part of creating integrated urban environments that are socially more sustainable. Urbanization reflects on life conditions and social, physical, economical characteristics of the society. In this regard, historical zones and traditional regions are affected by dramatic interventions on these characteristics. This article focuses on the Uch Dukkan neighborhood located in Ardabil City in Azarbaijani region of Iran, which has been up to such interventions that leaded its transformation from the past to the present. After introducing a brief inventory of the main elements of the historical zone and the neighborhood; this study explores the changes and transformations in different periods; and their impacts on the quality of the environment and its social sustainability. The survey conducted in the neighborhood as part of this research study revealed that the Uch Dukkan neighborhood and the unique architectural heritage that it possesses have become more inactive physically and functionally in a decade. This condition requires an exploration and comparison of the present and the expected transformations of the meaning of social space from the most private unit to the urban scale. From this token, it is argued that an architectural point of view that is based on space order; use and meaning of space as a social and cultural image, should not be ignored. Based on the interplay between social sustainability, collective memory, and the urban environment, study aims to make the invisible portion of ignorance clear, that ends up with a weakness in defining the collective meaning of the neighborhood as a historic urban district. It reveals that the spatial possessions of the neighborhood are valuable not only for their historical and physical characteristics, but also for their social memory that is to be remembered and constructed further.

Keywords: Urban integrity, social sustainability, collective memory, social decay.

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325 Integration of Resistive Switching Memory Cell with Vertical Nanowire Transistor

Authors: Xiang Li, Zhixian Chen, Zheng Fang, Aashit Kamath, Xinpeng Wang, Navab Singh, Guo-Qiang Lo, Dim-Lee Kwong

Abstract:

We integrate TiN/Ni/HfO2/Si RRAM cell with a vertical gate-all-around (GAA) nanowire transistor to achieve compact 4F2 footprint in a 1T1R configuration. The tip of the Si nanowire (source of the transistor) serves as bottom electrode of the memory cell. Fabricated devices with nanowire diameter ~ 50nm demonstrate ultra-low current/power switching; unipolar switching with 10μA/30μW SET and 20μA/30μW RESET and bipolar switching with 20nA/85nW SET and 0.2nA/0.7nW RESET. Further, the switching current is found to scale with nanowire diameter making the architecture promising for future scaling.

Keywords: RRAM, 1T1R, gate-all-around FET, nanowire FET, vertical MOSFETs

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324 Modeling Corporate Memories using the ReCaRo Model, Some Experiments

Authors: Lotfi Admane

Abstract:

This paper presents a model of case based corporate memory named ReCaRo (REsource, CAse, ROle). The approach suggested in ReCaRo decomposes the domain to model through a set of components. These components represent the objects developed by the company during its activity. They are reused, and sometimes, while bringing adaptations. These components are enriched by knowledge after each reuse. ReCaRo builds the corporate memory on the basis of these components. It models two types of knowledge: 1) Business Knowledge, which constitutes the main knowledge capital of the company, refers to its basic skill, thus, directly to the components and 2) the Experience Knowledge which is a specialised knowledge and represents the experience gained during the handling of business knowledge. ReCaRo builds corporate memories which are made up of five communicating ones.

Keywords: Corporate memories, meta-model, reuse, ReCaRo.

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323 Implementation of Security Algorithms for u-Health Monitoring System

Authors: Jiho Park, Yong-Gyu Lee, Gilwon Yoon

Abstract:

Data security in u-Health system can be an important issue because wireless network is vulnerable to hacking. However, it is not easy to implement a proper security algorithm in an embedded u-health monitoring because of hardware constraints such as low performance, power consumption and limited memory size and etc. To secure data that contain personal and biosignal information, we implemented several security algorithms such as Blowfish, data encryption standard (DES), advanced encryption standard (AES) and Rivest Cipher 4 (RC4) for our u-Health monitoring system and the results were successful. Under the same experimental conditions, we compared these algorithms. RC4 had the fastest execution time. Memory usage was the most efficient for DES. However, considering performance and safety capability, however, we concluded that AES was the most appropriate algorithm for a personal u-Health monitoring system.

Keywords: biosignal, data encryption, security measures, u-health

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322 Border Limited Adaptive Subdivision Based On Triangle Meshes

Authors: Pichayut Peerasathien, Hiroshi Nagahashi

Abstract:

Subdivision is a method to create a smooth surface from a coarse mesh by subdividing the entire mesh. The conventional ways to compute and render surfaces are inconvenient both in terms of memory and computational time as the number of meshes will increase exponentially. An adaptive subdivision is the way to reduce the computational time and memory by subdividing only certain selected areas. In this paper, a new adaptive subdivision method for triangle meshes is introduced. This method defines a new adaptive subdivision rules by considering the properties of each triangle's neighbors and is embedded in a traditional Loop's subdivision. It prevents some undesirable side effects that appear in the conventional adaptive ways. Models that were subdivided by our method are compared with other adaptive subdivision methods

Keywords: Subdivision, loop subdivision, handle cracks, smooth surface.

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321 Existence and Globally Exponential Stability of Equilibrium for BAM Neural Networks with Mixed Delays and Impulses

Authors: Xiaomei Wang, Shouming Zhong

Abstract:

In this paper, a class of generalized bi-directional associative memory (BAM) neural networks with mixed delays is investigated. On the basis of Lyapunov stability theory and contraction mapping theorem, some new sufficient conditions are established for the existence and uniqueness and globally exponential stability of equilibrium, which generalize and improve the previously known results. One example is given to show the feasibility and effectiveness of our results.

Keywords: Bi-directional associative memory (BAM) neural networks, mixed delays, Lyapunov stability theory, contraction mapping theorem, existence, equilibrium, globally exponential stability.

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320 Reducing Cognitive Load in Learning Computer Programming

Authors: Muhammed Yousoof, Mohd Sapiyan, Khaja Kamaluddin

Abstract:

Many difficulties are faced in the process of learning computer programming. This paper will propose a system framework intended to reduce cognitive load in learning programming. In first section focus is given on the process of learning and the shortcomings of the current approaches to learning programming. Finally the proposed prototype is suggested along with the justification of the prototype. In the proposed prototype the concept map is used as visualization metaphor. Concept maps are similar to the mental schema in long term memory and hence it can reduce cognitive load well. In addition other method such as part code method is also proposed in this framework to can reduce cognitive load.

Keywords: Cognitive load, concept maps, working memory, split attention effect, partial code programs.

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319 The Links between Brain Insulin Resistance and Alzheimer’s Disease

Authors: Negar Khezri, Golnaz Yaghoubnezhadzanganeh, Amirreza Attarzadeh

Abstract:

Type 2 Diabetes (T2DM) and Alzheimer's disease (AD) are two main health problems influencing millions of people in the world. Neuron loss and synaptic impairment that interfere with cognition and memory cause for the behavioral indications of AD. While it is now accepted that insulin has central neuromodulatory purpose, it was contemplated for many years that brain is insusceptible to insulin, involving its function in memory and learning, which are impaired in AD. The common characteristics of both AD and T2D are impaired insulin signaling, oxidative stress, the excitation of inflammatory pathways and unqualified glucose metabolism. This review summarizes how the recognition of these mechanisms may lead to the development of alternative therapeutic approaches. Here we summarize how the recognition of these mechanisms may lead to the development of alternative therapeutic approaches.

Keywords: Alzheimer’s disease, diabetes, insulin resistance, neurodegenerative.

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318 Normalizing Logarithms of Realized Volatility in an ARFIMA Model

Authors: G. L. C. Yap

Abstract:

Modelling realized volatility with high-frequency returns is popular as it is an unbiased and efficient estimator of return volatility. A computationally simple model is fitting the logarithms of the realized volatilities with a fractionally integrated long-memory Gaussian process. The Gaussianity assumption simplifies the parameter estimation using the Whittle approximation. Nonetheless, this assumption may not be met in the finite samples and there may be a need to normalize the financial series. Based on the empirical indices S&P500 and DAX, this paper examines the performance of the linear volatility model pre-treated with normalization compared to its existing counterpart. The empirical results show that by including normalization as a pre-treatment procedure, the forecast performance outperforms the existing model in terms of statistical and economic evaluations.

Keywords: Long-memory, Gaussian process, Whittle estimator, normalization, volatility, value-at-risk.

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317 Research on Hybrid Neural Network in Intrusion Detection System

Authors: Jianhua Wang, Yan Yu

Abstract:

This paper presents an intrusion detection system of hybrid neural network model based on RBF and Elman. It is used for anomaly detection and misuse detection. This model has the memory function .It can detect discrete and related aggressive behavior effectively. RBF network is a real-time pattern classifier, and Elman network achieves the memory ability for former event. Based on the hybrid model intrusion detection system uses DARPA data set to do test evaluation. It uses ROC curve to display the test result intuitively. After the experiment it proves this hybrid model intrusion detection system can effectively improve the detection rate, and reduce the rate of false alarm and fail.

Keywords: RBF, Elman, anomaly detection, misuse detection, hybrid neural network.

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316 Concurrency without Locking in Parallel Hash Structures used for Data Processing

Authors: Ákos Dudás, Sándor Juhász

Abstract:

Various mechanisms providing mutual exclusion and thread synchronization can be used to support parallel processing within a single computer. Instead of using locks, semaphores, barriers or other traditional approaches in this paper we focus on alternative ways for making better use of modern multithreaded architectures and preparing hash tables for concurrent accesses. Hash structures will be used to demonstrate and compare two entirely different approaches (rule based cooperation and hardware synchronization support) to an efficient parallel implementation using traditional locks. Comparison includes implementation details, performance ranking and scalability issues. We aim at understanding the effects the parallelization schemes have on the execution environment with special focus on the memory system and memory access characteristics.

Keywords: Lock-free synchronization, mutual exclusion, parallel hash tables, parallel performance

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315 Augmented Reality and Storytelling in Cities: An Application to Lisbon Street Art

Authors: Francisco Guimarães, Mauro Figueiredo, José Rodrigues

Abstract:

Cities are spaces of memory with several zones (parts of cities) with their own history and cultural events. Today, cities are also marked by a form of intangible cultural heritage like street art, which creates a visual culture based on the process of reflection about the city and the world. To link these realities and create a personal user interaction with this cultural heritage it is important to capture the story and aesthetics, and find alternatives to immerse the user in these spaces of memory. To that end, this article presents a project which combines Augmented Reality technologies and concepts of Transmedia Storytelling applied to Lisbon City, using Street Art artifacts as markers in a framework of digital media-art.

Keywords: Cultural heritage, urban art, street art, augmented reality, transmedia storytelling, digital media-art, socio-museology.

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314 Systematic Unit-Memory Binary Convolutional Codes from Linear Block Codes over F2r + vF2r

Authors: John Mark Lampos, Virgilio Sison

Abstract:

Two constructions of unit-memory binary convolutional codes from linear block codes over the finite semi-local ring F2r +vF2r , where v2 = v, are presented. In both cases, if the linear block code is systematic, then the resulting convolutional encoder is systematic, minimal, basic and non-catastrophic. The Hamming free distance of the convolutional code is bounded below by the minimum Hamming distance of the block code. New examples of binary convolutional codes that meet the Heller upper bound for systematic codes are given.

Keywords: Convolutional codes, semi-local ring, free distance, Heller bound.

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313 Memory Effects in Randomly Perturbed Nematic Liquid Crystals

Authors: Amid Ranjkesh, Milan Ambrožič, Samo Kralj

Abstract:

We study the typical domain size and configuration character of a randomly perturbed system exhibiting continuous symmetry breaking. As a model system we use rod-like objects within a cubic lattice interacting via a Lebwohl–Lasher-type interaction. We describe their local direction with a headless unit director field. An example of such systems represents nematic LC or nanotubes. We further introduce impurities of concentration p, which impose the random anisotropy field-type disorder to directors. We study the domain-type pattern of molecules as a function of p, anchoring strength w between a neighboring director and impurity, temperature, history of samples. In simulations we quenched the directors either from the random or homogeneous initial configuration. Our results show that a history of system strongly influences: i) the average domain coherence length; and ii) the range of ordering in the system. In the random case the obtained order is always short ranged (SR). On the contrary, in the homogeneous case, SR is obtained only for strong enough anchoring and large enough concentration p. In other cases, the ordering is either of quasi long range (QLR) or of long range (LR). We further studied memory effects for the random initial configuration. With increasing external ordering field B either QLR or LR is realized.

Keywords: Lebwohl-Lasher model, liquid crystals, disorder, memory effect, orientational order.

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312 Analytical Prediction of Seismic Response of Steel Frames with Superelastic Shape Memory Alloy

Authors: Mohamed Omar

Abstract:

Superelastic Shape Memory Alloy (SMA) is accepted when it used as connection in steel structures. The seismic behaviour of steel frames with SMA is being assessed in this study. Three eightstorey steel frames with different SMA systems are suggested, the first one of which is braced with diagonal bracing system, the second one is braced with nee bracing system while the last one is which the SMA is used as connection at the plastic hinge regions of beams. Nonlinear time history analyses of steel frames with SMA subjected to two different ground motion records have been performed using Seismostruct software. To evaluate the efficiency of suggested systems, the dynamic responses of the frames were compared. From the comparison results, it can be concluded that using SMA element is an effective way to improve the dynamic response of structures subjected to earthquake excitations. Implementing the SMA braces can lead to a reduction in residual roof displacement. The shape memory alloy is effective in reducing the maximum displacement at the frame top and it provides a large elastic deformation range. SMA connections are very effective in dissipating energy and reducing the total input energy of the whole frame under severe seismic ground motion. Using of the SMA connection system is more effective in controlling the reaction forces at the base frame than other bracing systems. Using SMA as bracing is more effective in reducing the displacements. The efficiency of SMA is dependant on the input wave motions and the construction system as well.

Keywords: Finite element analysis, seismic response, shapesmemory alloy, steel frame, superelasticity

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311 Quantum Enhanced Correlation Matrix Memories via States Orthogonalisation

Authors: Mario Mastriani, Marcelo Naiouf

Abstract:

This paper introduces a Quantum Correlation Matrix Memory (QCMM) and Enhanced QCMM (EQCMM), which are useful to work with quantum memories. A version of classical Gram-Schmidt orthogonalisation process in Dirac notation (called Quantum Orthogonalisation Process: QOP) is presented to convert a non-orthonormal quantum basis, i.e., a set of non-orthonormal quantum vectors (called qudits) to an orthonormal quantum basis, i.e., a set of orthonormal quantum qudits. This work shows that it is possible to improve the performance of QCMM thanks QOP algorithm. Besides, the EQCMM algorithm has a lot of additional fields of applications, e.g.: Steganography, as a replacement Hopfield Networks, Bilevel image processing, etc. Finally, it is important to mention that the EQCMM is an extremely easy to implement in any firmware.

Keywords: Quantum Algebra, correlation matrix memory, Dirac notation, orthogonalisation.

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310 High Performance Computing Using Out-of- Core Sparse Direct Solvers

Authors: Mandhapati P. Raju, Siddhartha Khaitan

Abstract:

In-core memory requirement is a bottleneck in solving large three dimensional Navier-Stokes finite element problem formulations using sparse direct solvers. Out-of-core solution strategy is a viable alternative to reduce the in-core memory requirements while solving large scale problems. This study evaluates the performance of various out-of-core sequential solvers based on multifrontal or supernodal techniques in the context of finite element formulations for three dimensional problems on a Windows platform. Here three different solvers, HSL_MA78, MUMPS and PARDISO are compared. The performance of these solvers is evaluated on a 64-bit machine with 16GB RAM for finite element formulation of flow through a rectangular channel. It is observed that using out-of-core PARDISO solver, relatively large problems can be solved. The implementation of Newton and modified Newton's iteration is also discussed.

Keywords: Out-of-core, PARDISO, MUMPS, Newton.

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309 Are Asia-Pacific Stock Markets Predictable? Evidence from Wavelet-based Fractional Integration Estimator

Authors: Pei. P. Tan, Don. U.A. Galagedera, Elizabeth A.Maharaj

Abstract:

This paper examines predictability in stock return in developed and emergingmarkets by testing long memory in stock returns using wavelet approach. Wavelet-based maximum likelihood estimator of the fractional integration estimator is superior to the conventional Hurst exponent and Geweke and Porter-Hudak estimator in terms of asymptotic properties and mean squared error. We use 4-year moving windows to estimate the fractional integration parameter. Evidence suggests that stock return may not be predictable indeveloped countries of the Asia-Pacificregion. However, predictability of stock return insome developing countries in this region such as Indonesia, Malaysia and Philippines may not be ruled out. Stock return in the Thailand stock market appears to be not predictable after the political crisis in 2008.

Keywords: Asia-Pacific stock market, long-memory, return predictability, wavelet

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308 Effect of Preheating Temperature and Chamber Pressure on the Properties of Porous NiTi Alloy Prepared by SHS Technique

Authors: Wisutmethangoon S., Denmud N., Sikong L.

Abstract:

The fabrication of porous NiTi shape memory alloys (SMAs) from elemental powder compacts was conducted by selfpropagating high temperature synthesis (SHS). Effects of the preheating temperature and the chamber pressure on the combustion characteristics as well as the final morphology and the composition of products were studied. The samples with porosity between 56.4 and 59.0% under preheating temperature in the range of 200-300°C and Ar-gas chamber pressure of 138 and 201 kPa were obtained. The pore structures were found to be dissimilar only in the samples processed with different preheating temperature. The major phase in the porous product is NiTi with small amounts of secondary phases, NiTi2 and Ni4Ti3. The preheating temperature and the chamber pressure have very little effect on the phase constituent. While the combustion temperature of the sample was notably increased by increasing the preheating temperature, they were slightly changed by varying the chamber pressure.

Keywords: Combustion synthesis, porous materials, self propagating high temperature synthesis, shape memory alloy.

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307 Hardware Implementation of Stack-Based Replacement Algorithms

Authors: Hassan Ghasemzadeh, Sepideh Mazrouee, Hassan Goldani Moghaddam, Hamid Shojaei, Mohammad Reza Kakoee

Abstract:

Block replacement algorithms to increase hit ratio have been extensively used in cache memory management. Among basic replacement schemes, LRU and FIFO have been shown to be effective replacement algorithms in terms of hit rates. In this paper, we introduce a flexible stack-based circuit which can be employed in hardware implementation of both LRU and FIFO policies. We propose a simple and efficient architecture such that stack-based replacement algorithms can be implemented without the drawbacks of the traditional architectures. The stack is modular and hence, a set of stack rows can be cascaded depending on the number of blocks in each cache set. Our circuit can be implemented in conjunction with the cache controller and static/dynamic memories to form a cache system. Experimental results exhibit that our proposed circuit provides an average value of 26% improvement in storage bits and its maximum operating frequency is increased by a factor of two

Keywords: Cache Memory, Replacement Algorithms, LeastRecently Used Algorithm, First In First Out Algorithm.

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306 Avoiding Catastrophic Forgetting by a Dual-Network Memory Model Using a Chaotic Neural Network

Authors: Motonobu Hattori

Abstract:

In neural networks, when new patterns are learned by a network, the new information radically interferes with previously stored patterns. This drawback is called catastrophic forgetting or catastrophic interference. In this paper, we propose a biologically inspired neural network model which overcomes this problem. The proposed model consists of two distinct networks: one is a Hopfield type of chaotic associative memory and the other is a multilayer neural network. We consider that these networks correspond to the hippocampus and the neocortex of the brain, respectively. Information given is firstly stored in the hippocampal network with fast learning algorithm. Then the stored information is recalled by chaotic behavior of each neuron in the hippocampal network. Finally, it is consolidated in the neocortical network by using pseudopatterns. Computer simulation results show that the proposed model has much better ability to avoid catastrophic forgetting in comparison with conventional models.

Keywords: catastrophic forgetting, chaotic neural network, complementary learning systems, dual-network

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