Search results for: Inverter configuration

Authors: Alpana Agarwal, Akhil Sharma

Abstract:

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7^o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.

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Authors: Najiya Omar, Hamed Aly, Timothy Little

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The optimal size of a photovoltaic (PV) array is considered a critical factor in designing an efficient PV system due to the dependence of the PV cell performance on temperature. A high temperature can lead to voltage losses of solar panels, whereas a low temperature can cause voltage overproduction. There are two possible scenarios of the inverter’s operation in which they are associated with the erroneous calculations of the number of PV panels: 1) If the number of the panels is scant and the temperature is high, the minimum voltage required to operate the inverter will not be reached. As a result, the inverter will shut down. 2) Comparably, if the number of panels is excessive and the temperature is low, the produced voltage will be more than the maximum limit of the inverter which can cause the inverter to get disconnected or even damaged. This article aims to assess theoretical and practical methodologies to calculate size and determine the topology of a PV array. The results are validated by applying an experimental evaluation for a 100 kW Grid-connected PV system for a location in Halifax, Nova Scotia and achieving a satisfactory system performance compared to the previous work done.

Keywords: Sizing PV panels, grid-connected PV, topology of PV array, theoretical and practical methodologies.

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Authors: R. Gunabalan, S. Immanuel Prabakaran, J. Reegan, S. Ganesh

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This paper describes a software approach for modeling inverter fed induction motor drive using Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The reason behind the selection of LabVIEW software is because of its strong graphical interface, flexibility of its programming language combined with built-in tools designed specifically for test, measurement and control. LabVIEW is generally used in most of the applications for data acquisition, test and control. In this paper, inverter and induction motor are modeled using LabVIEW toolkits. Simulation results are presented and are validated.

Keywords: Induction motor, LabVIEW, State model.

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Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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Authors: A. Elnady

Abstract:

This paper presents an improved Direct Power Control (DPC) scheme applied to the multilevel inverter that forms a Distributed Generation Unit (DGU). This paper demonstrates the performance of active and reactive power injected by the DGU to the smart grid. The DPC is traditionally operated by the hysteresis controller with the Space Vector Modulation (SVM) which is applied on the 2-level inverters or 3-level inverters. In this paper, the DPC is operated by the PI controller with the Phase-Disposition Pulse Width Modulation (PD-PWM) applied to the 5-level diode clamped inverter. The new combination of the DPC, PI controller, PD-PWM and multilevel inverter proves that its performance is much better than the conventional hysteresis-SVM based DPC. Simulations results have been presented to validate the performance of the suggested control scheme in the grid-connected mode.

Keywords: Direct power control, PI controller, PD-PWM, and power control.

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Authors: A. Bennassar, A. Abbou, M. Akherraz, M. Barara

Abstract:

In this paper, we propose a sensorless backstepping control of induction motor (IM) associated with three levels neutral clamped (NPC) inverter. First, the backstepping approach is designed to steer the flux and speed variables to theirs references and to compensate the uncertainties. A Lyapunov theory is used and it demonstrates that the dynamic trajectories tracking are asymptotically stable. Second, we estimate the rotor flux and speed by using the adaptive Luenberger observer (ALO). Simulation results are provided to illustrate the performance of the proposed approach in high and low speeds and load torque disturbance.

Keywords: Sensorless backstepping, IM, Three levels NPC inverter, Lyapunov theory, ALO.

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Authors: Rui. Zhang, Yiming. Pi

Abstract:

In this paper we present a novel approach for human Body configuration based on the Silhouette. We propose to address this problem under the Bayesian framework. We use an effective Model based MCMC (Markov Chain Monte Carlo) method to solve the configuration problem, in which the best configuration could be defined as MAP (maximize a posteriori probability) in Bayesian model. This model based MCMC utilizes the human body model to drive the MCMC sampling from the solution space. It converses the original high dimension space into a restricted sub-space constructed by the human model and uses a hybrid sampling algorithm. We choose an explicit human model and carefully select the likelihood functions to represent the best configuration solution. The experiments show that this method could get an accurate configuration and timesaving for different human from multi-views.

Keywords: Bayesian framework, MCMC, model based, human body configuration.

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Authors: Irtaza M. Syed, Kaamran Raahemifar

Abstract:

In this paper, we present a comparative assessment of Space Vector Pulse Width Modulation (SVPWM) and Model Predictive Control (MPC) for two-level three phase (2L-3P) Voltage Source Inverter (VSI). VSI with associated system is subjected to both control techniques and the results are compared. Matlab/Simulink was used to model, simulate and validate the control schemes. Findings of this study show that MPC is superior to SVPWM in terms of total harmonic distortion (THD) and implementation.

Keywords: Model Predictive Control, Space Vector Pulse Width Modulation, Voltage Source Inverter.

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Authors: S.Srinivas

Abstract:

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped phase-disposition space vector modulation (CO-PDSVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive.

Keywords: Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM.

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Authors: Shiang-Hwua Yu, Han-Sheng Tseng

Abstract:

This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.

Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.

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Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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Authors: Ali Z a'fari

Abstract:

Voltage flicker is a disturbance in electrical power systems. The reason for this disturbance is mainly the large nonlinear loads such as electric arc furnaces. Synchronous static compensator (STATCOM) is considered as a proper technique to mitigate the voltage flicker. Application of more suitable and precise power electronic converter leads to a more precise performance of the compensator. In this paper a three-level 12-pulse voltage source inverter (VSI) with a 12-terminal transformer connected to the ac system is studied and the obtained results are compared with the performance of a STATCOM using a simple two-level VSI and an optimal and more precise performance of the proposed scheme is achieved.

Keywords: Flicker mitigation, STATCOM, Inverter, 12-pulse, 3- level

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Authors: A.Muthuramalingam, S.Himavathi

Abstract:

Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.

Keywords: NN based SVM, FPGA Implementation, LayerMultiplexing, NN structure and Resource Reduction, PerformanceEvaluation

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Authors: K. Benamrane, T. Abdelkrim, T. Benslimane, Aeh. Benkhelifa, B. Bezza

Abstract:

This paper presents a comparison between two Pulse Width Modulation (PWM) algorithms applied to a three-level Neutral Point Clamped (NPC) Voltage Source Inverter (VSI). The first algorithm applied is the triangular-sinusoidal strategy; the second is the Space Vector Pulse Width Modulation (SVPWM) strategy. In the first part, we present a topology of three-level NCP VSI. After that, we develop the two PWM strategies to control this converter. At the end the experimental results are presented.

Keywords: Multilevel inverter, Space vector pulse width modulation (SVPWM), triangular-sinusoidal strategy.

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Authors: J. Chelladurai, G. Saravana Ilango, C. Nagamani, S. Senthil Kumar

Abstract:

Pulse width modulation (PWM) techniques have been the subject of intensive research for different industrial and power sector applications. A large variety of methods, different in concept and performance, have been newly developed and described. This paper analyzes the comparative merits of Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM) techniques and the suitability of these techniques in a Shunt Active Filter (SAF). The objective is to select the scheme that offers effective utilization of DC bus voltage and also harmonic reduction at the input side. The effectiveness of the PWM techniques is tested in the SAF configuration with a non linear load. The performance of the SAF with the SPWM and (SVPWM) techniques are compared with respect to the THD in source current. The study reveals that in the context of closed loop SAF control with the SVPWM technique there is only a minor improvement in THD. The utilization of the DC bus with SVPWM is also not significant compared to that with SPWM because of the non sinusoidal modulating signal from the controller in SAF configuration.

Keywords: Voltage source inverter, Shunt active filter, SPWM, SVPWM, Matlab/SIMULINK.

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Authors: Buket Turan Azizoğlu

Abstract:

In switch mode power inverters, small sized inverters can be obtained by increasing the switching frequency. Switching frequency increment causes high driver losses. Also, high dt di and dt dv produced by the switching action creates high Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI). In this paper, a series half bridge series resonant inverter circuit is simulated and evaluated practically to demonstrate the turn-on and turn-off conditions during zero or close to zero voltage switching. Also, the reverse recovery current effects of the body diode of the MOSFETs were investigated by operating above and below resonant frequency.

Keywords: Driver losses, Half Bridge series resonant inverter, Zero Voltage Switching

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Authors: Marc Diesse, Hochschule Heilbronn

Abstract:

We address the question of identifying the configuration space singularities of linkages, i.e., points where the configuration space is not locally a submanifold of Euclidean space. Because the configuration space cannot be smoothly parameterized at such points, these singularity types have a significantly negative impact on the kinematics of the linkage. It is known that Jacobian methods do not provide sufficient conditions for the existence of CS-singularities. Herein, we present several additional algebraic criteria that provide the sufficient conditions. Further, we use those criteria to analyze certain classes of planar linkages. These examples will also show how the presented criteria can be checked using algorithmic methods.

Keywords: Linkages, configuration space singularities, real algebraic geometry, analytic geometry, computer algebra.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Mohd Tariq

Abstract:

The three phase system drives produce the problem of more torque pulsations and harmonics. This issue prevents the smooth operation of the drives and it also induces the amount of heat generated thus resulting in an increase in power loss. Higher phase system offers smooth operation of the machines with greater power capacity. Five phase variable-speed induction motor drives are commonly used in various industrial and commercial applications like tractions, electrical vehicles, ship propulsions and conveyor belt drive system. In this work, a comparative analysis of the different modulation schemes applied on the five-level five-phase Packed U Cell (PUC) inverter fed induction motor drives is presented. The performance of the inverter is greatly affected with the modulation schemes applied. The system is modeled, designed, and implemented in MATLAB^®/Simulink environment. Experimental validation is done for the prototype of single phase, whereas five phase experimental validation is proposed in the future works.

Keywords: Packed U-Cell inverter, pulse width modulation, five-phase system, induction motor.

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Authors: Nur Aisyah Jalalludin, Arwindra Rizqiawan, Goro Fujita

Abstract:

In this study, we aim to demonstrate a microgrid system experimental simulation for an easy understanding of a large-scale microgrid system. This model is required for industrial training and learning environments. However, in order to create an exact representation of a microgrid system, the laboratory-scale system must fulfill the requirements of a grid-connected inverter, in which power values are assigned to the system to cope with the intermittent output from renewable energy sources. Aside from that, during fluctuations in load capacity, the grid-connected system must be able to supply power from the utility grid side and microgrid side in a balanced manner. Therefore, droop control is installed in the inverter’s control board to maintain a balanced power sharing in both sides. This power control in a stand-alone condition and droop control in a grid-connected condition must be implemented in order to maintain a stabilized system. Based on the experimental results, power control and droop control can both be applied in the system by comparing the experimental and reference values.

Keywords: Droop control, droop characteristic, grid-connected inverter, microgrid, power control.

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Authors: H. Sediki, S. Djennoune

Abstract:

The switching lag-time and the voltage drop across the power devices cause serious waveform distortions and fundamental voltage drop in pulse width-modulated inverter output. These phenomenons are conspicuous when both the output frequency and voltage are low. To estimate the output voltage from the PWM reference signal it is essential to take account of these imperfections and to correct them. In this paper, on-line compensation method is presented. It needs three simple blocs to add at the ideal reference voltages. This method does not require any additional hardware circuit and off- line experimental measurement. The paper includes experimental results to demonstrate the validity of the proposed method. It is applied, finally, in case of indirect vector controlled induction machine and implemented using dSpace card.

Keywords: Dead time, field-oriented control, Induction motor, PWM inverter, voltage drop.

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Authors: M. Nayeemuddin, T. Bramhananda Reddy, M. Vijaya Kumar

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Acoustic noise becoming ever more obnoxious radiated by voltage source inverter fed induction motor drive in modern and industrial applications. The drive utilized for industrial and modern applications should use “spread spectrum” innovation known as Random pulse width modulation (PWM) algorithms where acoustic noise emanates through the machine should be critically concerned. This paper illustrates three types of random PWM control algorithms with fixed switching frequency namely 1) Random modulating PWM 2) Random carrier PWM and 3) Random modulating-carrier PWM. The spectrum plots of the motor stator current demonstrate the strength and robustness of the proposed PWM algorithms. To affirm the proposed algorithms, experimental tests have been conducted using dSPACE rt1104 control board on a v/f control three phase induction motor drive fed by DC link cascaded multilevel inverter.

Keywords: Multilevel inverter, acoustic noise, CSVPWM, total harmonic distortion, random PWM algorithm.

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Authors: M. Suresh Kumar, K. Ramani

Abstract:

This paper proposed the comparison made between Multi-Carrier Pulse Width Modulation, Sinusoidal Pulse Width Modulation and Selective Harmonic Elimination Pulse Width Modulation technique for minimization of Total Harmonic Distortion in Cascaded H-Bridge Multi-Level Inverter. In Multicarrier Pulse Width Modulation method by using Alternate Position of Disposition scheme for switching pulse generation to Multi-Level Inverter. Another carrier based approach; Sinusoidal Pulse Width Modulation method is also implemented to define the switching pulse generation system in the multi-level inverter. In Selective Harmonic Elimination method using Genetic Algorithm and Particle Swarm Optimization algorithm for define the required switching angles to eliminate low order harmonics from the inverter output voltage waveform and reduce the total harmonic distortion value. So, the results validate that the Selective Harmonic Elimination Pulse Width Modulation method does capably eliminate a great number of precise harmonics and minimize the Total Harmonic Distortion value in output voltage waveform in compared with Multi-Carrier Pulse Width Modulation method, Sinusoidal Pulse Width Modulation method. In this paper, comparison of simulation results shows that the Selective Harmonic Elimination method can attain optimal harmonic minimization solution better than Multi-Carrier Pulse Width Modulation method, Sinusoidal Pulse Width Modulation method.

Keywords: Multi-level inverter, Selective Harmonic Elimination Pulse Width Modulation, Multi-Carrier Pulse Width Modulation, Total Harmonic Distortion, Genetic Algorithm.

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Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya

Abstract:

Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.

Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.

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Authors: Jeong Hyun Kim, Gyo Woo Lee

Abstract:

In this study, heat release performances of the three extruded-type heat sinks can be used in inverter for solar power generation were evaluated. Numbers of fins in the heat sinks (namely E-38, E-47 and E-76) were 38, 47 and 76, respectively. Heat transfer areas of them were 1.8, 1.9 and 2.8m². The heat release performances of E-38, E-47 and E-76 heat sinks were measured as 79.6, 81.6 and 83.2%, respectively. The results of heat release performance show that the larger amount of heat transfer area the higher heat release rate. While on the other, in this experiment, variations of mass flow rates caused by different cross sectional areas of the three heat sinks may not be the major parameter of the heat release. Despite the 47.4% increment of heat transfer area of E-76 heat sink than that of E-47 one, its heat release rate was higher by only 2.0%; this suggests that its heat transfer area need to be optimized.

Keywords: Solar Inverter, Heat Sink, Forced Convection, Heat Transfer, Performance Evaluation.

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Authors: Makoto Nagatomo, Yasuo Uchida, Makoto Sakamoto, Tuo Zhang, Tatsuma Kurogi, Takao Ito, Tsunehiro Yoshinaga, Satoshi Ikeda, Masahiro Yokomichi, Hiroshi Furutani

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This paper presents a four-dimensional computational model, k-neighborhood template A-type three-dimensional bounded cellular acceptor (abbreviated as A-3BCA(k)), and discusses the hierarchical properties. An A-3BCA(k) is a four-dimensional automaton which consists of a pair of a converter and a configuration-reader. The former converts the given four-dimensional tape to the three- and two- dimensional configuration and the latter determines the acceptance or nonacceptance of given four-dimensional tape whether or not the derived two-dimensional configuration is accepted. We mainly investigate the difference of the accepting power based on the difference of the configuration-reader. It is shown that the difference of the accepting power of the configuration-reader tends to affect directly that of the A-3BCA(k) for the case when the converter is deterministic. On the other hand, results are not analogous for the nondeterministic case.

Keywords: Cellular acceptor, configuration-reader, converter, finite automaton, four-dimension, on-line tessellation acceptor, parallel/sequential array acceptor, turing machine.

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Authors: Mostafa.A. Fellani, Dawo.E. Abaid

Abstract:

This paper presents a controller design technique for Synchronous Reluctance Motor to improve its dynamic performance with fast response and high accuracy. The sliding mode control is the most attractive and suitable method to use for this purpose, since it is simple in design and for its insensitivity to parameter variations or external disturbances. When this method implemented it yields fast dynamic response without overshoot and a zero steady-state error. The current loop control with decentralized sliding mode is presented in this paper. The mathematical model for the synchronous machine, the inverter and the controller is developed. The stability of the sliding mode controller is analyzed. Simulation of synchronous reluctance motor and the controller with PWM-inverter has been curried out, using the SIMULINK software package of MATLAB. Simulation results are presented to show the effectiveness of the approach.

Keywords: Dynamic Simulation, MATLAB, PWM-inverter, Reluctance Machine, Sliding-mode.

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Authors: A.K. Baliarsingh, S. Panda, A.K. Mohanty, C. Ardil

Abstract:

This paper presents a systematic approach for designing Unified Power Flow Controller (UPFC) based supplementary damping controllers for damping low frequency oscillations in a single-machine infinite-bus power system. Detailed investigations have been carried out considering the four alternatives UPFC based damping controller namely modulating index of series inverter (mB), modulating index of shunt inverter (mE), phase angle of series inverter (δB ) and phase angle of the shunt inverter (δE ). The design problem of the proposed controllers is formulated as an optimization problem and Real- Coded Genetic Algorithm (RCGA) is employed to optimize damping controller parameters. Simulation results are presented and compared with a conventional method of tuning the damping controller parameters to show the effectiveness and robustness of the proposed design approach.

Keywords: Power System Oscillations, Real-Coded Genetic Algorithm (RCGA), Flexible AC Transmission Systems (FACTS), Unified Power Flow Controller (UPFC), Damping Controller.

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Authors: Jung Hyun Kim, Min Ye Ku, Gyo Woo Lee

Abstract:

In this experiment, we investigated the performance of two types of heat sink, swaged- and extruded-type, used in the inverter of industrial electricity generator. The swaged-type heat sink has 62 fins, and the extruded-type has 38 fins having the same dimension as that of the swaged-type. But the extruded-type heat sink maintains the same heat transfer area by the laterally waved surface which has 1 mm in radius. As a result, the swaged- and extruded-type heat sinks released 71% and 64% of the heat incoming to the heat sink, respectively. The other incoming heat were naturally convected and radiated to the ambient. In spite of 40% decrease in number of fins, the heat release performance of the extruded-type heat sink was lowered only 7% than that of the swaged-type. We believe that, this shows the increment of effective heat transfer area by the laterally waved surface of fins and the better heat transfer property of the extruded-type heat sink.

Keywords: Solar Inverter, Heat Sink, Forced Convection, Heat Transfer, Performance Evaluation.

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Authors: Ehsan Hassankhan, Davood A. Khaburi

Abstract:

Direct Torque Control is a control technique in AC drive systems to obtain high performance torque control. The conventional DTC drive contains a pair of hysteresis comparators. DTC drives utilizing hysteresis comparators suffer from high torque ripple and variable switching frequency. The most common solution to those problems is to use the space vector depends on the reference torque and flux. In this Paper The space vector modulation technique (SVPWM) is applied to 2 level inverter control in the proposed DTC-based induction motor drive system, thereby dramatically reducing the torque ripple. Then the controller based on space vector modulation is designed to be applied in the control of Induction Motor (IM) with a three-level Inverter. This type of Inverter has several advantages over the standard two-level VSI, such as a greater number of levels in the output voltage waveforms, Lower dV/dt, less harmonic distortion in voltage and current waveforms and lower switching frequencies. This paper proposes a general SVPWM algorithm for three-level based on standard two-level SVPWM. The proposed scheme is described clearly and simulation results are reported to demonstrate its effectiveness. The entire control scheme is implemented with Matlab/Simulink.

Keywords: Direct torque control, space vector Pulsewidthmodulation(SVPWM), neutral point clamped(NPC), two-levelinverter.

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