Search results for: H. Haddadian

Authors: Raheleh Hedayati, Sanaz Haddadian, Hooman Nabovati

Abstract:

A 2.4GHz (RF) down conversion Gilbert Cell mixer, implemented in a 0.18-μm CMOS technology with a 1.8V supply, is presented. Current bleeding (charge injection) technique has been used to increase the conversion gain and the linearity of the mixer. The proposed mixer provides 10.75 dB conversion gain ( C G ) with 14.3mw total power consumption. The IIP3 and 1-dB compression point of the mixer are 8dbm and -4.6dbm respectively, at 300 MHz IF frequencies. Comparing the current design against the conventional mixer design, demonstrates better performance in the conversion gain, linearity, noise figure and port-to-port isolation.

Keywords: Mixer, Gilbert Cell, Charge Injection, RFIC, CMOSTechnology.

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Authors: Sanaz Haddadian, Rahele Hedayati

Abstract:

A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).

Keywords: Analog Integrated Circuit Design, Sample & Hold Amplifier and CMOS Technology.

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Authors: H. Shayeghi, M. Mahdavi, H. Haddadian

Abstract:

Transmission network expansion planning (TNEP) is an important component of power system planning that its task is to minimize the network construction and operational cost while satisfying the demand increasing, imposed technical and economic conditions. Up till now, various methods have been presented to solve the static transmission network expansion planning (STNEP) problem. But in all of these methods, the lines adequacy rate has not been studied after the planning horizon, i.e. when the expanded network misses its adequacy and needs to be expanded again. In this paper, in order to take transmission lines condition after expansion in to account from the line loading view point, the adequacy of transmission network is considered for solution of STNEP problem. To obtain optimal network arrangement, a decimal codification genetic algorithm (DCGA) is being used for minimizing the network construction and operational cost. The effectiveness of the proposed idea is tested on the Garver's six-bus network. The results evaluation reveals that the annual worth of network adequacy has a considerable effect on the network arrangement. In addition, the obtained network, based on the DCGA, has lower investment cost and higher adequacy rate. Thus, the network satisfies the requirements of delivering electric power more safely and reliably to load centers.

Keywords: STNEP Problem, Network Adequacy, DCGA.

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