Search results for: Flip Chip Ball Grid Array.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1107

Search results for: Flip Chip Ball Grid Array.

1107 The Methodology of Flip Chip Using Astro Place and Route Tool

Authors: Rohaya Abdul Wahab, Raja Mohd Fuad Tengku Aziz, Nazaliza Othman, Sharifah Saleh, Nabihah Razali, Rozaimah Baharim, Md Hanif Md Nasir

Abstract:

This paper will discuss flip chip methodology, in which I/O pads, standard cells, macros and bump cells array are placed in the floorplan, then routed using Astro place and route tool. Final DRC and LVS checking is done using Calibre verification tool. The design vehicle to run this methodology is an OpenRISC design targeted to Silterra 0.18 micrometer technology with 6 metal layers for routing. Astro has extensive support for flip chip placement and routing. Astro tool commands for flip chip are straightforward approach like the conventional standard wire bond packaging. However since we do not have flip chip commands in our Astro tool, no LEF file for bump cell and no LEF file for flip chip I/O pad, we create our own methodology to prepare for future flip chip tapeout. 

Keywords: Astro, bump cell, Calibre, flip chip, LEF, methodology, SCHEME, TCL.

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1106 Effect of Curing Profile to Eliminate the Voids / Black Dots Formation in Underfill Epoxy for Hi-CTE Flip Chip Packaging

Authors: Zainudin Kornain, Azman Jalar, Rozaidi Rasid, Fong Chee Seng

Abstract:

Void formation in underfill is considered as failure in flip chip manufacturing process. Void formation possibly caused by several factors such as poor soldering and flux residue during die attach process, void entrapment due moisture contamination, dispense pattern process and setting up the curing process. This paper presents the comparison of single step and two steps curing profile towards the void and black dots formation in underfill for Hi-CTE Flip Chip Ceramic Ball Grid Array Package (FC-CBGA). Statistic analysis was conducted to analyze how different factors such as wafer lot, sawing technique, underfill fillet height and curing profile recipe were affected the formation of voids and black dots. A C-Mode Scanning Aqoustic Microscopy (C-SAM) was used to scan the total count of voids and black dots. It was shown that the 2 steps curing profile provided solution for void elimination and black dots in underfill after curing process.

Keywords: black dots formation, curing profile, FC-CBGA, underfill, void formation,

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1105 Utilization of Agro-Industrial Waste in Metal Matrix Composites: Towards Sustainability

Authors: L. Lancaster, M. H. Lung, D. Sujan

Abstract:

The application of agro-industrial waste in Aluminum Metal Matrix Composites has been getting more attention as they can reinforce particles in metal matrix which enhance the strength properties of the composites. In addition, by applying these agroindustrial wastes in useful way not only save the manufacturing cost of products but also reduce the pollutions on environment. This paper represents a literature review on a range of industrial wastes and their utilization in metal matrix composites. The paper describes the synthesis methods of agro-industrial waste filled metal matrix composite materials and their mechanical, wear, corrosion, and physical properties. It also highlights the current application and future potential of agro-industrial waste reinforced composites in aerospace, automotive and other construction industries.

Keywords: Bond layer, Interfacial shear stress, Bi-layered assembly, Thermal mismatch, Flip Chip Ball Grid Array.

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1104 Chip Formation during Turning Multiphase Microalloyed Steel

Authors: V.Sivaraman, S. Sankaran, L. Vijayaraghavan

Abstract:

Machining through turning was carried out in a lathe to study the chip formation of Multiphase Ferrite (F-B-M) microalloyed steel. Taguchi orthogonal array was employed to perform the machining. Continuous and discontinuous chips were formed for different cutting parameters like speed, feed and depth of cut. Optical and scanning electron microscope was employed to identify the chip morphology.

Keywords: Multiphase microalloyed steel, chip formation, Taguchi technique, turning, cutting parameters

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1103 A Study of Recent Contribution on Simulation Tools for Network-on-Chip

Authors: Muthana Saleh Alalaki, Michael Opoku Agyeman

Abstract:

The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.

Keywords: Network-on-Chip, System-on-Chip, embedded systems, computer architecture.

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1102 A Grid Current-controlled Inverter with Particle Swarm Optimization MPPT for PV Generators

Authors: Hanny H. Tumbelaka, Masafumi Miyatake

Abstract:

This paper proposes a three-phase four-wire currentcontrolled Voltage Source Inverter (CC-VSI) for both power quality improvement and PV energy extraction. For power quality improvement, the CC-VSI works as a grid current-controlling shunt active power filter to compensate for harmonic and reactive power of loads. Then, the PV array is coupled to the DC bus of the CC-VSI and supplies active power to the grid. The MPPT controller employs the particle swarm optimization technique. The output of the MPPT controller is a DC voltage that determines the DC-bus voltage according to PV maximum power. The PSO method is simple and effective especially for a partially shaded PV array. From computer simulation results, it proves that grid currents are sinusoidal and inphase with grid voltages, while the PV maximum active power is delivered to loads.

Keywords: Active Power Filter, MPPT, PV Energy Conversion.

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1101 XPM Response of Multiple Quantum Well chirped DFB-SOA All Optical Flip-Flop Switching

Authors: Masoud Jabbari, Mohammad Kazem Moravvej-Farshi, Rahim Ghayour, Abbas Zarifkar

Abstract:

In this paper, based on the coupled-mode and carrier rate equations, derivation of a dynamic model and numerically analysis of a MQW chirped DFB-SOA all-optical flip-flop is done precisely. We have analyzed the effects of strains of QW and MQW and cross phase modulation (XPM) on the dynamic response, and rise and fall times of the DFB-SOA all optical flip flop. We have shown that strained MQW active region in under an optimized condition into a DFB-SOA with chirped grating can improve the switching ON speed limitation in such a of the device, significantly while the fall time is increased. The values of the rise times for such an all optical flip-flop, are obtained in an optimized condition, areas tr=255ps.

Keywords: All-Optical Flip-Flop (AO-FF), Distributed feedback semiconductor optical amplifier (DFB-SOA), Optical Bistability, Multi quantum well (MQW)

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1100 Low Cost Chip Set Selection Algorithm for Multi-way Partitioning of Digital System

Authors: Jae Young Park, Soongyu Kwon, Kyu Han Kim, Hyeong Geon Lee, Jong Tae Kim

Abstract:

This paper considers the problem of finding low cost chip set for a minimum cost partitioning of a large logic circuits. Chip sets are selected from a given library. Each chip in the library has a different price, area, and I/O pin. We propose a low cost chip set selection algorithm. Inputs to the algorithm are a netlist and a chip information in the library. Output is a list of chip sets satisfied with area and maximum partitioning number and it is sorted by cost. The algorithm finds the sorted list of chip sets from minimum cost to maximum cost. We used MCNC benchmark circuits for experiments. The experimental results show that all of chip sets found satisfy the multiple partitioning constraints.

Keywords: lowest cost chip set, MCNC benchmark, multi-way partitioning.

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1099 Dynamic Power Reduction in Sequential Circuits Using Look Ahead Clock Gating Technique

Authors: R. Manjith, C. Muthukumari

Abstract:

In this paper, a novel Linear Feedback Shift Register (LFSR) with Look Ahead Clock Gating (LACG) technique is presented to reduce the power consumption in modern processors and System-on-Chip. Clock gating is a predominant technique used to reduce unwanted switching of clock signals. Several clock gating techniques to reduce the dynamic power have been developed, of which LACG is predominant. LACG computes the clock enabling signals of each flip-flop (FF) one cycle ahead of time, based on the present cycle data of the flip-flops on which it depends. It overcomes the timing problems in the existing clock gating methods like datadriven clock gating and Auto-Gated flip-flops (AGFF) by allotting a full clock cycle for the determination of the clock enabling signals. Further to reduce the power consumption in LACG technique, FFs can be grouped so that they share a common clock enabling signal. Simulation results show that the novel grouped LFSR with LACG achieves 15.03% power savings than conventional LFSR with LACG and 44.87% than data-driven clock gating.

Keywords: AGFF, data-driven, LACG, LFSR.

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1098 Simulation of Effect of Current Stressing on Reliability of Solder Joints with Cu-Pillar Bumps

Authors: Y. Li, Q. S. Zhang, H. Z. Huang, B. Y. Wu

Abstract:

The mechanism behind the electromigration and thermomigration failure in flip-chip solder joints with Cu-pillar bumps was investigated in this paper through using finite element method. Hot spot and the current crowding occurrs in the upper corner of copper column instead of solders of the common solder ball. The simulation results show that the change in thermal gradient is noticeable, which might greatly affect the reliability of solder joints with Cu-pillar bumps under current stressing. When the average applied current density is increased from 1×104 A/cm2 to 3×104 A/cm2 in solders, the thermal gradient would increase from 74 K/cm to 901 K/cm at an ambient temperature of 25°C. The force from thermal gradient of 901 K/cm can nearly induce thermomigration by itself. With the increase in applied current, the thermal gradient is growing. It is proposed that thermomigration likely causes a serious reliability issue for Cu column based interconnects.

Keywords: Simulation, Cu-pillar bumps, Electromigration, Thermomigration.

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1097 Performance Evaluation of a Millimeter-Wave Phased Array Antenna Using Circularly Polarized Elements

Authors: Rawad Asfour, Salam Khamas, Edward A. Ball

Abstract:

This paper is focused on the design of an mm-wave phased array. To date, linear polarization is adapted in the reported designs of phased arrays. However, linear polarization faces several well-known challenges. As such, an advanced design for phased array antennas is required that offers circularly polarized (CP) radiation. A feasible solution for achieving CP phased array antennas is proposed using open-circular loop antennas. To this end, a 3-element circular loop phased array antenna is designed to operate at 28 GHz. In addition, the array ability to control the direction of the main lobe is investigated. The results show that the highest achievable field of view (FOV) is 100°, i.e. 50° to the left and 50° to the right-hand side directions. The results are achieved with a CP bandwidth of 15%. Furthermore, the results demonstrate that a high broadside gain of circa 11 dBi can be achieved for the steered beam. Besides, radiation efficiency of 97% can also be achieved based on the proposed design.

Keywords: loop antenna, phased array, beam steering, wide bandwidth, circular polarization, CST

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1096 3D Network-on-Chip with on-Chip DRAM: An Empirical Analysis for Future Chip Multiprocessor

Authors: Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen

Abstract:

With the increasing number of on-chip components and the critical requirement for processing power, Chip Multiprocessor (CMP) has gained wide acceptance in both academia and industry during the last decade. However, the conventional bus-based onchip communication schemes suffer from very high communication delay and low scalability in large scale systems. Network-on-Chip (NoC) has been proposed to solve the bottleneck of parallel onchip communications by applying different network topologies which separate the communication phase from the computation phase. Observing that the memory bandwidth of the communication between on-chip components and off-chip memory has become a critical problem even in NoC based systems, in this paper, we propose a novel 3D NoC with on-chip Dynamic Random Access Memory (DRAM) in which different layers are dedicated to different functionalities such as processors, cache or memory. Results show that, by using our proposed architecture, average link utilization has reduced by 10.25% for SPLASH-2 workloads. Our proposed design costs 1.12% less execution cycles than the traditional design on average.

Keywords: 3D integration, network-on-chip, memory-on-chip, DRAM, chip multiprocessor.

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1095 Dynamics and Control of Bouncing Ball

Authors: A. K. Kamath, N. M. Singh, R. Pasumarthy

Abstract:

This paper investigates the control of a bouncing ball using Model Predictive Control. Bouncing ball is a benchmark problem for various rhythmic tasks such as juggling, walking, hopping and running. Humans develop intentions which may be perceived as our reference trajectory and tries to track it. The human brain optimizes the control effort needed to track its reference; this forms the central theme for control of bouncing ball in our investigations.

Keywords: Bouncing Ball, impact dynamics, intermittent control, model predictive control.

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1094 Grid-Connected Photovoltaic System: System Overview and Sizing Principles

Authors: Najiya Omar, Hamed Aly, Timothy Little

Abstract:

The optimal size of a photovoltaic (PV) array is considered a critical factor in designing an efficient PV system due to the dependence of the PV cell performance on temperature. A high temperature can lead to voltage losses of solar panels, whereas a low temperature can cause voltage overproduction. There are two possible scenarios of the inverter’s operation in which they are associated with the erroneous calculations of the number of PV panels: 1) If the number of the panels is scant and the temperature is high, the minimum voltage required to operate the inverter will not be reached. As a result, the inverter will shut down. 2) Comparably, if the number of panels is excessive and the temperature is low, the produced voltage will be more than the maximum limit of the inverter which can cause the inverter to get disconnected or even damaged. This article aims to assess theoretical and practical methodologies to calculate size and determine the topology of a PV array. The results are validated by applying an experimental evaluation for a 100 kW Grid-connected PV system for a location in Halifax, Nova Scotia and achieving a satisfactory system performance compared to the previous work done.

Keywords: Sizing PV panels, grid-connected PV, topology of PV array, theoretical and practical methodologies.

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1093 Circular Patch Microstrip Array Antenna for KU-band

Authors: T.F.Lai, Wan Nor Liza Mahadi, Norhayati Soin

Abstract:

This paper present a circular patch microstrip array antenna operate in KU-band (10.9GHz – 17.25GHz). The proposed circular patch array antenna will be in light weight, flexible, slim and compact unit compare with current antenna used in KU-band. The paper also presents the detail steps of designing the circular patch microstrip array antenna. An Advance Design System (ADS) software is used to compute the gain, power, radiation pattern, and S11 of the antenna. The proposed Circular patch microstrip array antenna basically is a phased array consisting of 'n' elements (circular patch antennas) arranged in a rectangular grid. The size of each element is determined by the operating frequency. The incident wave from satellite arrives at the plane of the antenna with equal phase across the surface of the array. Each 'n' element receives a small amount of power in phase with the others. There are feed network connects each element to the microstrip lines with an equal length, thus the signals reaching the circular patches are all combined in phase and the voltages add up. The significant difference of the circular patch array antenna is not come in the phase across the surface but in the magnitude distribution.

Keywords: Circular patch microstrip array antenna, gain, radiation pattern, S-Parameter.

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1092 A Novel Single-Wavelength All-Optical Flip-Flop Employing Single SOA-MZI

Authors: H. Kaatuzian, M. Sedghi, S. Khatami

Abstract:

In this paper, by exploiting a single semiconductor optical amplifier-Mach Zehnder Interferometer (SOA-MZI), an integratable all-optical flip-flop (AOFF) is proposed. It is composed of a SOA-MZI with a bidirectional coupler at the output. Output signals of both bar and crossbar of the SOA-MZI is fed back to SOAs located in the arms of the Mach-Zehnder Interferometer (MZI). The injected photon-rates to the SOAs are modulated by feedback signals in order to form optical flip-flop. According to numerical analysis, Gaussian optical pulses with the energy of 15.2 fJ and 20 ps duration with the full width at half-maximum criterion, can switch the states of the SR-AOFF. Also simulation results show that the SR-AOFF has the contrast ratio of 8.5 dB between two states with the transition time of nearly 20 ps.

Keywords: All Optical, Flip-Flop, Mach-Zehnder Interferometer (MZI), Semiconductor Optical Amplifier (SOA).

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1091 A Low Power and High-Speed Conditional-Precharge Sense Amplifier Based Flip-Flop Using Single Ended Latch

Authors: Guo-Ming Sung, Naga Raju Naik R.

Abstract:

Paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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1090 MMSE Based Beamforming for Chip Interleaved CDMA in Aeronautical Mobile Radio Channel

Authors: Sherif K. El Dyasti, Esam A. Hagras, Adel E. El-Hennawy

Abstract:

This paper addresses the performance of antenna array beamforming on Chip-Interleaved Code Division Multiple Access (CI_CDMA) system based on Minimum Mean Square Error (MMSE) detector in aeronautical mobile radio channel. Multipath fading, Doppler shifts caused by the speed of the aircraft, and Multiple Access Interference (MAI) are the most important reasons that affect and reduce the performance of aeronautical system. In this paper we suggested the CI-CDMA with antenna array to combat this fading and improve the bit error rate (BER) performance. We further evaluate the performance of the proposed system in the four standard scenarios in aeronautical mobile radio channel.

Keywords: Aeronautical Channel, CI-CDMA, Beamforming.

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1089 Numerical Simulation and Experimental Validation of the Hydraulic L-Shaped Check Ball Behavior

Authors: Shinji Kajiwara

Abstract:

The spring-driven ball-type check valve is one of the most important components of hydraulic systems: it controls the position of the ball and prevents backward flow. To simplify the structure, the spring must be eliminated, and to accomplish this, the flow pattern and the behavior of the check ball in L-shaped pipe must be determined. In this paper, we present a full-scale model of a check ball made of acrylic resin, and we determine the relationship between the initial position of the ball, the position and diameter of the inflow port. The check flow rate increases in a standard center inflow model, and it is possible to greatly decrease the check-flow rate by shifting the inflow from the center.

Keywords: Hydraulics, Pipe Flow, Numerical Simulation, Flow Visualization, Check ball, L-shaped Pipe.

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1088 Exploiting Silicon-on-Insulator Microring Resonator Bistability Behavior for All Optical Set-Reset Flip-Flop

Authors: P. Nadimi, D. D. Caviglia, E. Di Zitti

Abstract:

We propose an all optical flip-flop circuit composedof two Silicon-on-insulator microring resonators coupled to straightwaveguides by exploiting the optical bistability behavior due to thenonlinear Kerr effect. We used the transfer matrix analysis toinvestigate continuous wave propagation through microrings, as wellwe considered the nonlinear switching characteristics of an opticaldevice using a double-coupler silicon ring resonator in presence ofthe Kerr nonlinearity, thus obtaining the bistability behavior of theoutput port, the drop port and also inside the silicon microringresonator. It is shown that the bistability behavior depends on thecontrol of the input wavelength.KeywordsAll optical flip-flops, Kerr effect, microringresonator, optical bistability.

Keywords: All optical flip-flops, Kerr effect, microring resonator, optical bistability.

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1087 Grid Learning; Computer Grid Joins to e- Learning

Authors: A. Nassiry, A. Kardan

Abstract:

According to development of communications and web-based technologies in recent years, e-Learning has became very important for everyone and is seen as one of most dynamic teaching methods. Grid computing is a pattern for increasing of computing power and storage capacity of a system and is based on hardware and software resources in a network with common purpose. In this article we study grid architecture and describe its different layers. In this way, we will analyze grid layered architecture. Then we will introduce a new suitable architecture for e-Learning which is based on grid network, and for this reason we call it Grid Learning Architecture. Various sections and layers of suggested architecture will be analyzed; especially grid middleware layer that has key role. This layer is heart of grid learning architecture and, in fact, regardless of this layer, e-Learning based on grid architecture will not be feasible.

Keywords: Distributed learning, Grid Learning, Grid network, SCORM standard.

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1086 Internal Loading Distribution in Statically Loaded Ball Bearings Subjected to a Centric Thrust Load: Numerical Aspects

Authors: Mário C. Ricci

Abstract:

A known iterative computational procedure is used for internal normal ball loads calculation in statically loaded single-row, angular-contact ball bearings, subjected to a known thrust load, which is applied in the inner ring at the geometric bearing center line. Numerical aspects of the iterative procedure are discussed. Numerical examples results for a 218 angular-contact ball bearing have been compared with those from the literature. Twenty figures are presented showing the geometrical features, the behavior of the convergence variables and the following parameters as functions of the thrust load: normal ball loads, contact angle, distance between curvature centers, and normal ball and axial deflections between the raceways.

Keywords: Ball, Bearing, Static, Load, Iterative, Numerical, Method.

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1085 Resource Discovery in Web-Services Based Grids

Authors: Damandeep Kaur, Jyotsna Sengupta

Abstract:

A Web-services based grid infrastructure is evolving to be readily available in the near future. In this approach, the Web services are inherited (encapsulated or functioned) into the same existing Grid services class. In practice there is not much difference between the existing Web and grid infrastructure. Grid services emerged as stateful web services. In this paper, we present the key components of web-services based grid and also how the resource discovery is performed on web-services based grid considering resource discovery, as a critical service, to be provided by any type of grid.

Keywords: Web services, resource discovery, grid computing, OGSA.

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1084 Internal Loading Distribution in Statically Loaded Ball Bearings Subjected to a Centric Thrust Load: Alternative Approach

Authors: Mário C. Ricci

Abstract:

An alternative iterative computational procedure is proposed for internal normal ball loads calculation in statically loaded single-row, angular-contact ball bearings, subjected to a known thrust load, which is applied in the inner ring at the geometric bearing center line. An accurate method for curvature radii at contacts with inner and outer raceways in the direction of the motion is used. Numerical aspects of the iterative procedure are discussed. Numerical examples results for a 218 angular-contact ball bearing have been compared with those from the literature. Twenty figures are presented showing the geometrical features, the behavior of the convergence variables and the following parameters as functions of the thrust load: normal ball loads, contact angle, distance between curvature centers, and normal ball and axial deflections.

Keywords: Ball, Bearing, Static, Load, Iterative, Numerical, Method.

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1083 Highly Accurate Tennis Ball Throwing Machine with Intelligent Control

Authors: Ferenc Kovács, Gábor Hosszú

Abstract:

The paper presents an advanced control system for tennis ball throwing machines to improve their accuracy according to the ball impact points. A further advantage of the system is the much easier calibration process involving the intelligent solution of the automatic adjustment of the stroking parameters according to the ball elasticity, the self-calibration, the use of the safety margin at very flat strokes and the possibility to placing the machine to any position of the half court. The system applies mathematical methods to determine the exact ball trajectories and special approximating processes to access all points on the aimed half court.

Keywords: Control system, robot programming, robot control, sports equipment, throwing machine.

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1082 The Design of Broadband 8x2 Phased Array 5G Antenna MIMO 28 GHz for Base Station

Authors: Muhammad Saiful Fadhil Reyhan, Yusnita Rahayu, Fadhel Muhammadsyah

Abstract:

This paper proposed a design of 16 elements, 8x2 linear fed patch antenna array with 16 ports, for 28 GHz, mm-wave band 5G for base station. The phased array covers along the azimuth plane to provide the coverage to the users in omnidirectional. The proposed antenna is designed RT Duroid 5880 substrate with the overall size of 85x35.6x0.787 mm3. The array is operating from 27.43 GHz to 28.34 GHz with a 910 MHz impedance bandwidth. The gain of the array is 18.3 dB, while the suppression of the side lobes is -1.0 dB. The main lobe direction of the array is 15 deg. The array shows a high array gain throughout the impedance bandwidth with overall of VSWR is below 1.12. The design will be proposed in single element and 16 elements antenna.

Keywords: 5G antenna, 28 GHz, MIMO, omnidirectional, phased array, base station, broadband.

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1081 Performance Improvements of DSP Applications on a Generic Reconfigurable Platform

Authors: Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Abstract:

Speedups from mapping four real-life DSP applications on an embedded system-on-chip that couples coarsegrained reconfigurable logic with an instruction-set processor are presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elements. A design flow for improving application-s performance is proposed. Critical software parts, called kernels, are accelerated on the Coarse-Grained Reconfigurable Array. The kernels are detected by profiling the source code. For mapping the detected kernels on the reconfigurable logic a prioritybased mapping algorithm has been developed. Two 4x4 array architectures, which differ in their interconnection structure among the Processing Elements, are considered. The experiments for eight different instances of a generic system show that important overall application speedups have been reported for the four applications. The performance improvements range from 1.86 to 3.67, with an average value of 2.53, compared with an all-software execution. These speedups are quite close to the maximum theoretical speedups imposed by Amdahl-s law.

Keywords: Reconfigurable computing, Coarse-grained reconfigurable array, Embedded systems, DSP, Performance

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1080 Method of Intelligent Fault Diagnosis of Preload Loss for Single Nut Ball Screws through the Sensed Vibration Signals

Authors: Yi-Cheng Huang, Yan-Chen Shin

Abstract:

This paper proposes method of diagnosing ball screw preload loss through the Hilbert-Huang Transform (HHT) and Multiscale entropy (MSE) process. The proposed method can diagnose ball screw preload loss through vibration signals when the machine tool is in operation. Maximum dynamic preload of 2 %, 4 %, and 6 % ball screws were predesigned, manufactured, and tested experimentally. Signal patterns are discussed and revealed using Empirical Mode Decomposition(EMD)with the Hilbert Spectrum. Different preload features are extracted and discriminated using HHT. The irregularity development of a ball screw with preload loss is determined and abstracted using MSE based on complexity perception. Experiment results show that the proposed method can predict the status of ball screw preload loss. Smart sensing for the health of the ball screw is also possible based on a comparative evaluation of MSE by the signal processing and pattern matching of EMD/HHT. This diagnosis method realizes the purposes of prognostic effectiveness on knowing the preload loss and utilizing convenience.

Keywords: Empirical Mode Decomposition, Hilbert-Huang Transform, Multi-scale Entropy, Preload Loss, Single-nut Ball Screw

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1079 The Design and Implementation of Classifying Bird Sounds

Authors: Haiyi Zhang, Jianli Guo, Daqian Yang

Abstract:

This Classifying Bird Sounds (chip notes) project-s purpose is to reduce the unwanted noise from recorded bird sound chip notes, design a scheme to detect differences and similarities between recorded chip notes, and classify bird sound chip notes. The technologies of determining the similarities of sound waves have been used in communication, sound engineering and wireless sound applications for many years. Our research is focused on the similarity of chip notes, which are the sounds from different birds. The program we use is generated by Microsoft Cµ.

Keywords: Classify Bird Sounds, Noise Filter, High-pass, Lowpass, Band-pass, Band-stop Filter, FIR.

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1078 Fractional Order Feedback Control of a Ball and Beam System

Authors: Santosh Kr. Choudhary

Abstract:

In this paper, fractional order feedback control of a ball beam model is investigated. The ball beam model is a particular example of the double Integrator system having strongly nonlinear characteristics and unstable dynamics which make the control of such system a challenging task. Most of the work in fractional order control systems are in theoretical nature and controller design and its implementation in practice is very small. In this work, a successful attempt has been made to design a fractional order PIλDμcontroller for a benchmark laboratory ball and beam model. Better performance can be achieved using a fractional order PID controller and it is demonstrated through simulations results with a comparison to the classic PID controller.

Keywords: Fractional order calculus, fractional order controller, fractional order system, ball and beam system, PIλDμ controller, modelling, simulation.

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