Search results for: Bridge Circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 803

Search results for: Bridge Circuit

743 Experimental Study of Local Scour Depth around Cylindrical Bridge Pier

Authors: Mohammed T. Shukri

Abstract:

The failure of bridges due to excessive local scour during floods poses a challenging problem to hydraulic engineers. The failure of bridges piers is due to many reasons such as localized scour combined with general riverbed degradation. In this paper, we try to estimate the temporal variation of scour depth at nonuniform cylindrical bridge pier, by experimental work conducted in hydraulic laboratories of Gaziantep University Civil Engineering Department on a flume having dimensions of 8.3 m length, 0.8 m width and 0.9 m depth. The experiments will be carried on 20 cm depth of sediment layer having d50=0.4 mm. Three bridge pier shapes having different scaled models will be constructed in a 1.5m of test section in the channel.

Keywords: Scour, local scour, bridge piers, scour depth.

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742 Higher Frequency Modeling of Synchronous Exciter Machines by Equivalent Circuits and Transfer Functions

Authors: Marcus Banda

Abstract:

In this article the influence of higher frequency effects in addition to a special damper design on the electrical behavior of a synchronous generator main exciter machine is investigated. On the one hand these machines are often highly stressed by harmonics from the bridge rectifier thus facing additional eddy current losses. On the other hand the switching may cause the excitation of dangerous voltage peaks in resonant circuits formed by the diodes of the rectifier and the commutation reactance of the machine. Therefore modern rotating exciters are treated like synchronous generators usually modeled with a second order equivalent circuit. Hence the well known Standstill Frequency Response Test (SSFR) method is applied to a test machine in order to determine parameters for the simulation. With these results it is clearly shown that higher frequencies have a strong impact on the conventional equivalent circuit model. Because of increasing field displacement effects in the stranded armature winding the sub-transient reactance is even smaller than the armature leakage at high frequencies. As a matter of fact this prevents the algorithm to find an equivalent scheme. This issue is finally solved using Laplace transfer functions fully describing the transient behavior at the model ports.

Keywords: Synchronous exciter machine, Linear transfer function, SSFR, Equivalent Circuit

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741 Loss Analysis of Half Bridge DC-DC Converters in High-Current and Low-Voltage Applications

Authors: A. Faruk Bakan, İsmail Aksoy, Nihan Altintaş

Abstract:

In this paper, half bridge DC-DC converters with transformer isolation presented in the literature are analyzed for highcurrent and low-voltage applications under the same operation conditions, and compared in terms of losses and efficiency. The conventional and improved half-bridge DC-DC converters are simulated, and current and voltage waveforms are obtained for input voltage Vdc=500V, output current IO=450A, output voltage VO=38V and switching frequency fS=20kHz. IGBTs are used as power semiconductor switches. The power losses of the semiconductor devices are calculated from current and voltage waveforms. From simulation results, it is seen that the capacitor switched half bridge converter has the best efficiency value, and can be preferred at high power and high frequency applications.

Keywords: Isolated half bridge DC-DC converter, high-current low-voltage applications, soft switching, high efficiency.

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740 Investigation of Constant Transconductance Circuit for Low Power Low-Noise Amplifier

Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

Abstract:

In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (Gm) generated by the constant gm bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in Gm with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the gm variation is eventually concluded at between -3 % to 7 %. With the slight variation in the gm value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S21) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant gm circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

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739 PSRR Enhanced LDO Regulator Using Noise Sensing Circuit

Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

Abstract:

In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.

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738 A New Hardware Implementation of Manchester Line Decoder

Authors: Ibrahim A. Khorwat, Nabil Naas

Abstract:

In this paper, we present a simple circuit for Manchester decoding and without using any complicated or programmable devices. This circuit can decode 90kbps of transmitted encoded data; however, greater than this transmission rate can be decoded if high speed devices were used. We also present a new method for extracting the embedded clock from Manchester data in order to use it for serial-to-parallel conversion. All of our experimental measurements have been done using simulation.

Keywords: High threshold level, level segregation, lowthreshold level, smoothing circuit synchronization..

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737 Chua’s Circuit Regulation Using a Nonlinear Adaptive Feedback Technique

Authors: Abolhassan Razminia, Mohammad-Ali Sadrnia

Abstract:

Chua’s circuit is one of the most important electronic devices that are used for Chaos and Bifurcation studies. A central role of secure communication is devoted to it. Since the adaptive control is used vastly in the linear systems control, here we introduce a new trend of application of adaptive method in the chaos controlling field. In this paper, we try to derive a new adaptive control scheme for Chua’s circuit controlling because control of chaos is often very important in practical operations. The novelty of this approach is for sake of its robustness against the external perturbations which is simulated as an additive noise in all measured states and can be generalized to other chaotic systems. Our approach is based on Lyapunov analysis and the adaptation law is considered for the feedback gain. Because of this, we have named it NAFT (Nonlinear Adaptive Feedback Technique). At last, simulations show the capability of the presented technique for Chua’s circuit.

Keywords: Chaos, adaptive control, nonlinear control, Chua's circuit.

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736 Performance of Bridge Girder with Perforations under Tsunami Wave Loading

Authors: Sadia Rahman, Shatirah Akib, M. T. R. Khan, R. Triatmadja

Abstract:

Tsunami disaster poses a great threat to coastal infrastructures. Bridges without adequate provisions for earthquake and tsunami loading is generally vulnerable to tsunami attack. During the last two disastrous tsunami event (i.e. Indian Ocean and Japan Tsunami) a number of bridges were observed subsequent damages by tsunami waves. In this study, laboratory experiments were conducted to study the effects of perforations in bridge girder in force reduction. Results showed that significant amount of forces were reduced using perforations in girder. Approximately 10% to 18% force reductions were achieved by using about 16% perforations in bridge girder. Subsequent amount of force reductions revealed that perforations in girder are effective in reducing tsunami forces as perforations in girder let water to be passed through. Thus, less bridge damages are expected with the presence of perforations in girder during tsunami period.

Keywords: Bridge, force, girder, perforation, tsunami, wave.

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735 Analytical Study on the Shape of T-type Girder Modular Bridge Connection by Using Parameter

Authors: Jongho Park, Jinwoong Choi, Sungnam Hong, Seung-Kyung Kye, Sun-Kyu Park

Abstract:

Recently, to cope with the rapidly changing construction trend with aging infrastructures, modular bridge technology has been studied actively. Modular bridge is easily constructed by assembling standardized precast structure members in the field. It will be possible to construct rapidly and reduce construction cost efficiently. However, the shape of the transverse connection of T-type girder newly developed between the segmented modules is not verified. Therefore, the verification of the connection shape is needed. In this study, shape of the modular T-girder bridge transverse connection was analyzed by finite element model that was verified in study which was verified model of transverse connection using Abaqus. Connection angle was chosen as the parameter. The result of analyses showed that optimal value of angle is 130 degree.

Keywords: Modular bridge, optimal transverse shape, parameter, FEM.

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734 Design of SiC Capacitive Pressure Sensor with LC-Based Oscillator Readout Circuit

Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy

Abstract:

This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.

Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbide

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733 A High Accuracy Measurement Circuit for Soil Moisture Detection

Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

Abstract:

The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

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732 Efficient Numerical Model for Studying Bridge Pier Collapse in Floods

Authors: Thanut Kallaka, Ching-Jong Wang

Abstract:

High level and high velocity flood flows are potentially harmful to bridge piers as evidenced in many toppled piers, and among them the single-column piers were considered as the most vulnerable. The flood flow characteristic parameters including drag coefficient, scouring and vortex shedding are built into a pier-flood interaction model to investigate structural safety against flood hazards considering the effects of local scouring, hydrodynamic forces, and vortex induced resonance vibrations. By extracting the pier-flood simulation results embedded in a neural networks code, two cases of pier toppling occurred in typhoon days were reexamined: (1) a bridge overcome by flash flood near a mountain side; (2) a bridge washed off in flood across a wide channel near the estuary. The modeling procedures and simulations are capable of identifying the probable causes for the tumbled bridge piers during heavy floods, which include the excessive pier bending moments and resonance in structural vibrations.

Keywords: Bridge piers, Neural networks, Scour depth, Structural safety, Vortex shedding

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731 Solver for a Magnetic Equivalent Circuit and Modeling the Inrush Current of a 3-Phase Transformer

Authors: Markus G. Ortner, Christian Magele, Klaus Krischan

Abstract:

Knowledge about the magnetic quantities in a magnetic circuit is always of great interest. On the one hand, this information is needed for the simulation of a transformer. On the other hand, parameter studies are more reliable, if the magnetic quantities are derived from a well established model. One possibility to model the 3-phase transformer is by using a magnetic equivalent circuit (MEC). Though this is a well known system, it is often not an easy task to set up such a model for a large number of lumped elements which additionally includes the nonlinear characteristic of the magnetic material. Here we show the setup of a solver for a MEC and the results of the calculation in comparison to measurements taken. The equations of the MEC are based on a rearranged system of the nodal analysis. Thus it is possible to achieve a minimum number of equations, and a clear and simple structure. Hence, it is uncomplicated in its handling and it supports the iteration process. Additional helpful tasks are implemented within the solver to enhance the performance. The electric circuit is described by an electric equivalent circuit (EEC). Our results for the 3-phase transformer demonstrate the computational efficiency of the solver, and show the benefit of the application of a MEC.

Keywords: Inrush current, magnetic equivalent circuit, nonlinear behavior, transformer.

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730 Variable-Relation Criterion for Analysis of the Memristor

Authors: Qingjiang Li, Hui Xu, Haijun Liu, Xiaobo Tian

Abstract:

To judge whether the memristor can be interpreted as the fourth fundamental circuit element, we propose a variable-relation criterion of fundamental circuit elements. According to the criterion, we investigate the nature of three fundamental circuit elements and the memristor. From the perspective of variables relation, the memristor builds a direct relation between the voltage across it and the current through it, instead of a direct relation between the magnetic flux and the charge. Thus, it is better to characterize the memristor and the resistor as two special cases of the same fundamental circuit element, which is the memristive system in Chua-s new framework. Finally, the definition of memristor is refined according to the difference between the magnetic flux and the flux linkage.

Keywords: Memristor, Fundamental, Variable-Relation Criterion, Memristive system

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729 Developing Damage Assessment Model for Bridge Surroundings: A Study of Disaster by Typhoon Morakot in Taiwan

Authors: Jieh-Haur Chen, Pei-Fen Huang

Abstract:

This paper presents an integrated model that automatically measures the change of rivers, damage area of bridge surroundings, and change of vegetation. The proposed model is on the basis of a neurofuzzy mechanism enhanced by SOM optimization algorithm, and also includes three functions to deal with river imagery. High resolution imagery from FORMOSAT-2 satellite taken before and after the invasion period is adopted. By randomly selecting a bridge out of 129 destroyed bridges, the recognition results show that the average width has increased 66%. The ruined segment of the bridge is located exactly at the most scour region. The vegetation coverage has also reduced to nearly 90% of the original. The results yielded from the proposed model demonstrate a pinpoint accuracy rate at 99.94%. This study brings up a successful tool not only for large-scale damage assessment but for precise measurement to disasters.

Keywords: remote sensing image, damage assessment, typhoon disaster, bridge, ANN, fuzzy, SOM, optimization.

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728 An Efficient VLSI Design Approach to Reduce Static Power using Variable Body Biasing

Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam

Abstract:

In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.

Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.

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727 Dynamic Response Analyses for Human-Induced Lateral Vibration on Congested Pedestrian Bridges

Authors: M. Yoneda

Abstract:

In this paper, a lateral walking design force per person is proposed and compared with Imperial College test results. Numerical simulations considering the proposed walking design force which is incorporated into the neural-oscillator model are carried out placing much emphasis on the synchronization (the lock-in phenomenon) for a pedestrian bridge model with the span length of 50 m. Numerical analyses are also conducted for an existing pedestrian suspension bridge. As compared with full scale measurements for this suspension bridge, it is confirmed that the analytical method based on the neural-oscillator model might be one of the useful ways to explain the synchronization (the lock-in phenomenon) of pedestrians being on the bridge.

Keywords: Pedestrian bridge, human-induced lateral vibration, neural-oscillator, full scale measurement, dynamic response analysis.

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726 Two Active Elements Based All-Pass Section Suited for Current-Mode Cascading

Authors: J. Mohan, S. Maheshwari

Abstract:

A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.

Keywords: active filter, all-pass filter, current-mode, current conveyor.

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725 A Novel Optimized JTAG Interface Circuit Design

Authors: Chenguang Guo, Lei Chen, Yanlong Zhang

Abstract:

This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.

Keywords: Boundary scan, JTAG interface, Test frequency, Reduced pin

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724 A Numerical Study on Semi-Active Control of a Bridge Deck under Seismic Excitation

Authors: A. Yanik, U. Aldemir

Abstract:

This study investigates the benefits of implementing the semi-active devices in relation to passive viscous damping in the context of seismically isolated bridge structures. Since the intrinsically nonlinear nature of semi-active devices prevents the direct evaluation of Laplace transforms, frequency response functions are compiled from the computed time history response to sinusoidal and pulse-like seismic excitation. A simple semi-active control policy is used in regard to passive linear viscous damping and an optimal non-causal semi-active control strategy. The control strategy requires optimization. Euler-Lagrange equations are solved numerically during this procedure. The optimal closed-loop performance is evaluated for an idealized controllable dash-pot. A simplified single-degree-of-freedom model of an isolated bridge is used as numerical example. Two bridge cases are investigated. These cases are; bridge deck without the isolation bearing and bridge deck with the isolation bearing. To compare the performances of the passive and semi-active control cases, frequency dependent acceleration, velocity and displacement response transmissibility ratios Ta(w), Tv(w), and Td(w) are defined. To fully investigate the behavior of the structure subjected to the sinusoidal and pulse type excitations, different damping levels are considered. Numerical results showed that, under the effect of external excitation, bridge deck with semi-active control showed better structural performance than the passive bridge deck case.

Keywords: Bridge structures, passive control, seismic, semi-active control, viscous damping.

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723 A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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722 Uniform Distribution of Ductility Demand in Irregular Bridges using Shape Memory Alloy

Authors: Seyed Mohyeddin Ghodratian, Mehdi Ghassemieh, Mohammad Khanmohammadi

Abstract:

Excessive ductility demand on shorter piers is a common problem for irregular bridges subjected to strong ground motion. Various techniques have been developed to reduce the likelihood of collapse of bridge due to failure of shorter piers. This paper presents the new approach to improve the seismic behavior of such bridges using Nitinol shape memory alloys (SMAs). Superelastic SMAs have the ability to remain elastic under very large deformation due to martensitic transformation. This unique property leads to enhanced performance of controlled bridge compared with the performance of the reference bridge. To evaluate the effectiveness of the devices, nonlinear time history analysis is performed on a RC single column bent highway bridge using a suite of representative ground motions. The results show that this method is very effective in limiting the ductility demand of shorter pier.

Keywords: bridge, ductility demand, irregularity, shape memory alloy

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721 A New Digital Transceiver Circuit for Asynchronous Communication

Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra

Abstract:

A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.

Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.

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720 Hybrid Stainless Steel Girder for Bridge Construction

Authors: Tetsuya Yabuki, Yasunori Arizumi, Tetsuhiro Shimozato, Samy Guezouli, Hiroaki Matsusita, Masayuki Tai

Abstract:

The main object of this paper is to present the research results of the development of a hybrid stainless steel girder system for bridge construction undertaken at University of Ryukyu. In order to prevent the corrosion damage and reduce the fabrication costs, a hybrid stainless steel girder in bridge construction is developed, the stainless steel girder of which is stiffened and braced by structural carbon steel materials. It is verified analytically and experimentally that the ultimate strength of the hybrid stainless steel girder is equal to or greater than that of conventional carbon steel girder. The benefit of the life-cycle cost of the hybrid stainless steel girder is also shown.

Keywords: Smart structure, hybrid stainless steel members, ultimate strength, steel bridge, corrosion prevention.

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719 An Optimization Tool-Based Design Strategy Applied to Divide-by-2 Circuits with Unbalanced Loads

Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

Abstract:

This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.

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718 Fuzzy Logic Based Cascaded H-Bridge Eleven Level Inverter for Photovoltaic System Using Sinusoidal Pulse Width Modulation Technique

Authors: M. S. Sivagamasundari, P. Melba Mary

Abstract:

Multilevel inverter is a promising inverter topology for high voltage and high power applications. This inverter synthesizes several different levels of DC voltages to produce a stepped AC output that approaches the pure sine waveform. The three different topologies, diode-clamped inverter, capacitor-clamped inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each PV array can act as a separate dc source for each h-bridge module. This research especially focus on photovoltaic power source as input to the system and shows the potential of a Single Phase Cascaded H-bridge Eleven level inverter governed by the fuzzy logic controller to improve the power quality by reducing the total harmonic distortion at the output voltage. Hence the efficiency of the system will be improved. Simulation using MATLAB/SIMULINK has been done to verify the performance of cascaded h-bridge eleven level inverter using sinusoidal pulse width modulation technique. The simulated output shows very favorable result.

Keywords: Multilevel inverter, Cascaded H-Bridge multilevel inverter, Total Harmonic Distortion, Photovoltaic cell, Sinusoidal pulse width modulation.

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717 Developing of Fragility Curve for Two-Span Simply Supported Concrete Bridge in Near-Fault Area

Authors: S. Shirazian, M.R. Ghayamghamian, G.R. Nouri

Abstract:

Bridges are one of the main components of transportation networks. They should be functional before and after earthquake for emergency services. Therefore we need to assess seismic performance of bridges under different seismic loadings. Fragility curve is one of the popular tools in seismic evaluations. The fragility curves are conditional probability statements, which give the probability of a bridge reaching or exceeding a particular damage level for a given intensity level. In this study, the seismic performance of a two-span simply supported concrete bridge is assessed. Due to usual lack of empirical data, the analytical fragility curve was developed by results of the dynamic analysis of bridge subjected to the different time histories in near-fault area.

Keywords: Fragility curve, Seismic behavior, Time historyanalysis, Transportation Network.

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716 Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder

Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

Abstract:

The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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715 Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit

Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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714 Measurement and Analysis of Temperature Effects on Box Girders of Continuous Rigid Frame Bridges

Authors: Bugao Wang, Weifeng Wang, Xianwei Zeng

Abstract:

Researches on the general rules of temperature field changing and their effects on the bridge in construction are necessary. This paper investigated the rules of temperature field changing and its effects on bridge using onsite measurement and computational analysis. Guanyinsha Bridge was used as a case study in this research. The temperature field was simulated in analyses. The effects of certain boundary conditions such as sun radiance, wind speed, and model parameters such as heat factor and specific heat on temperature field are investigated. Recommended values for these parameters are proposed. The simulated temperature field matches the measured observations with high accuracy. At the same time, the stresses and deflections of the bridge computed with the simulated temperature field matches measured values too. As a conclusion, the temperature effect analysis of reinforced concrete box girder can be conducted directly based on the reliable weather data of the concerned area.

Keywords: continuous rigid frame bridge, temperature effectanalysis, temperature field, temperature field simulation

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