Search results for: static power reduction.

Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam

Abstract:

In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.

Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.

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Authors: Mostafa Alinezhad, Mehrdad Ahmadi Kamarposhti

Abstract:

According to the increasing utilization in power system, the transmission lines and power plants often operate in stability boundary and system probably lose its stable condition by over loading or occurring disturbance. According to the reasons that are mentioned, the prediction and recognition of voltage instability in power system has particular importance and it makes the network security stronger.This paper, by considering of power system contingencies based on the effects of them on Mega Watt Margin (MWM) and maximum loading point is focused in order to analyse the static voltage stability using continuation power flow method. The study has been carried out on IEEE 14-Bus Test System using Matlab and Psat softwares and results are presented.

Keywords: Contingency, Continuation Power Flow, Static Voltage Stability, Voltage Collapse.

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Authors: P.K. Sharma, B. Bhargava, S. Akashe

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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

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Authors: N.Karpagam, D.Devaraj

Abstract:

Static Var Compensator (SVC) is a shunt type FACTS device which is used in power system primarily for the purpose of voltage and reactive power control. In this paper, a fuzzy logic based supplementary controller for Static Var Compensator (SVC) is developed which is used for damping the rotor angle oscillations and to improve the transient stability of the power system. Generator speed and the electrical power are chosen as input signals for the Fuzzy Logic Controller (FLC). The effectiveness and feasibility of the proposed control is demonstrated with Single Machine Infinite Bus (SMIB) system and multimachine system (WSCC System) which show improvement over the use of a fixed parameter controller.

Keywords: FLC, SVC, Transient stability, SMIB, PIDcontroller.

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Authors: Hong Li, Linfeng Li, Jianping Hu

Abstract:

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

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Authors: Mehrdad Ahmadi Kamarposhti, Mostafa Alinezhad

Abstract:

One of the major causes of voltage instability is the reactive power limit of the system. Improving the system's reactive power handling capacity via Flexible AC transmission System (FACTS) devices is a remedy for prevention of voltage instability and hence voltage collapse. In this paper, the effects of SVC and STATCOM in Static Voltage Stability Margin Enhancement will be studied. AC and DC representations of SVC and STATCOM are used in the continuation power flow process in static voltage stability study. The IEEE-14 bus system is simulated to test the increasing loadability. It is found that these controllers significantly increase the loadability margin of power systems.

Keywords: SVC, STATCOM, Voltage Collapse, Maximum Loading Point.

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Authors: M. Yousefi, N. Nasirzadeh

Abstract:

In this paper, dynamic comparator structure employing two methods for power consumption reduction with applications in low-power high-speed analog-to-digital converters have been presented. The proposed comparator has low consumption thanks to power reduction methods. They have the ability for offset adjustment. The comparator consumes 14.3 μW at 100 MHz which is equal to 11.8 fJ. The comparator has been designed and simulated in 180 nm CMOS. Layouts occupy 210 μm².

Keywords: Comparator, low, power, efficiency.

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Authors: Ali Reza Rajabi, Shahab Rashnoei, Mojtaba Hakimzadeh, Amir Habibi

Abstract:

At any point of time, a power system operating condition should be stable, meeting various operational criteria and it should also be secure in the event of any credible contingency. Present day power systems are being operated closer to their stability limits due to economic and environmental constraints. Maintaining a stable and secure operation of a power system is therefore a very important and challenging issue. Voltage instability has been given much attention by power system researchers and planners in recent years, and is being regarded as one of the major sources of power system insecurity. Voltage instability phenomena are the ones in which the receiving end voltage decreases well below its normal value and does not come back even after setting restoring mechanisms such as VAR compensators, or continues to oscillate for lack of damping against the disturbances. Reactive power limit of power system is one of the major causes of voltage instability. This paper investigates the effects of coordinated series capacitors (SC) with static VAR compensators (SVC) on steady-state voltage stability of a power system. Also, the influence of the presence of series capacitor on static VAR compensator controller parameters and ratings required to stabilize load voltages at certain values are highlighted.

Keywords: Static VAR Compensator (SVC), Series Capacitor (SC), voltage stability, reactive power.

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Authors: M. Sedighizadeh, A. Rezazadeh

Abstract:

A method has been developed for preparing load models for power flow and stability. The load modeling (LOADMOD) computer software transforms data on load class mix, composition, and characteristics into the from required for commonly–used power flow and transient stability simulation programs. Typical default data have been developed for load composition and characteristics. This paper defines LOADMOD software and describes the dynamic and static load modeling techniques used in this software and results of initial testing for BAKHTAR power system.

Keywords: Load Modelling, Static, Power Flow.

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Authors: Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Keivan Navi

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In this paper we present two novel 1-bit full adder cells in dynamic logic style. NP-CMOS (Zipper) and Multi-Output structures are used to design the adder blocks. Characteristic of dynamic logic leads to higher speeds than the other standard static full adder cells. Using HSpice and 0.18┬Ám CMOS technology exhibits a significant decrease in the cell delay which can result in a considerable reduction in the power-delay product (PDP). The PDP of Multi-Output design at 1.8v power supply is around 0.15 femto joule that is 5% lower than conventional dynamic full adder cell and at least 21% lower than other static full adders.

Keywords: Bridge Style, Dynamic Logic, Full Adder, HighSpeed, Multi Output, NP-CMOS, Zipper.

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Authors: S. Padma, Dr. R. Lakshmipathi, K. Ramash Kumar, P. Nandagopal

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The power system network is becoming more complex nowadays and it is very difficult to maintain the stability of the system. Today-s enhancement of technology makes it possible to include new energy storage devices in the electric power system. In addition, with the aid of power electronic devices, it is possible to independently exchange active and reactive power flow with the utility grid. The main purpose of this paper proposes a Proportional – Integral (PI) control based 48 – pulse Inverter based Static Synchronous Series Compensator (SSSC) with and without Superconducting Magnetic Energy Storage (SMES) used for enhancing the transient stability and regulating power flow in automatic mode. Using a test power system through the dynamic simulation in Matlab/Simulink platform validates the performance of the proposed SSSC with and without SMES system.

Keywords: Flexible AC transmission system (FACTS), PIControl, Superconducting Magnetic Energy Storage (SMES), Static Synchronous Series Compensator (SSSC).

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Authors: S. Panda, N. P. Patidar, R. Singh

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Power system stability enhancement by simultaneous tuning of a Power System Stabilizer (PSS) and a Static Var Compensator (SVC)-based controller is thoroughly investigated in this paper. The coordination among the proposed damping stabilizers and the SVC internal voltage regulators has also been taken into consideration. The design problem is formulated as an optimization problem with a time-domain simulation-based objective function and Real-Coded Genetic Algorithm (RCGA) is employed to search for optimal controller parameters. The proposed stabilizers are tested on a weakly connected power system with different disturbances and loading conditions. The nonlinear simulation results are presented to show the effectiveness and robustness of the proposed control schemes over a wide range of loading conditions and disturbances. Further, the proposed design approach is found to be robust and improves stability effectively even under small disturbance and unbalanced fault conditions.

Keywords: Real-Coded Genetic Algorithm (RCGA), Static Var Compensator (SVC), Power System Stabilizer (PSS), Low Frequency Oscillations, Power System Stability.

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Authors: Mohammad Hasan Raouf, Ebrahim Rasooli Anarmarzi, Hamid Lesani, Javad Olamaei

Abstract:

This paper proposes the application of a hierarchical fuzzy system (HFS) based on multi-input power system stabilizer (MPSS) and also Static Var Compensator (SVC) in multi-machine environment.The number of rules grows exponentially with the number of variables in a conventional fuzzy logic system. The proposed HFS method is developed to solve this problem. To reduce the number of rules the HFS consists of a number of low-dimensional fuzzy systems in a hierarchical structure. In fact, by using HFS the total number of involved rules increases only linearly with the number of input variables. In the MPSS, to have better efficiency an auxiliary signal of reactive power deviation (ΔQ) is added with ΔP+ Δω input type Power system stabilizer (PSS). Phasor model of SVC is described and used in this paper. The performances of MPSS, Conventional power system stabilizer (CPSS), hierarchical Fuzzy Multi-input Power System Stabilizer (HFMPSS) and the proposed method in damping inter-area mode of oscillation are examined in response to disturbances. By using digital simulations the comparative study is illustrated. It can be seen that the proposed PSS is performing satisfactorily within the whole range of disturbances.

Keywords: Power system stabilizer (PSS), hierarchical fuzzysystem (HFS), Static VAR compensator (SVC)

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Authors: Sangram Keshori Mohapatra, Sidhartha Panda, Prasant Kumar Satpathy

Abstract:

This paper describes the power-system stability improvement by a static synchronous compensator (STATCOM) based damping controller with Differential evolution (DE) algorithm is used to find out the optimal controller parameters. The present study considered both local and remote signals with associated time delays. The performances of the proposed controllers have been compared with different disturbances for both single-machine infinite bus power system and multi-machine power system. The performance of the proposed controllers with variations in the signal transmission delays has also been investigated. To show the effectiveness and robustness of the proposed controller the Simulation results are presented under different disturbances and loading conditions.

Keywords: Controller Design, Differential Evolution Algorithm Static Synchronous Compensator, Time Delay, Power System Stability, Single Machine Infinite-bus Power System, Multi-Machine Power System.

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Authors: Shobha Sharma, Amita Dev

Abstract:

This research paper presents highly optimized barrel shifter at 22nm Hi K metal gate strained Si technology node. This barrel shifter is having a unique combination of static and dynamic body bias which gives lowest power delay product. This power delay product is compared with the same circuit at same technology node with static forward biasing at ‘supply/2’ and also with normal reverse substrate biasing and still found to be the lowest. The power delay product of this barrel sifter is .39362X10-17J and is lowered by approximately 78% to reference proposed barrel shifter at 32nm bulk CMOS technology. Power delay product of barrel shifter at 22nm Hi K Metal gate technology with normal reverse substrate bias is 2.97186933X10-17J and can be compared with this design’s PDP of .39362X10-17J. This design uses both static and dynamic substrate biasing and also has approximately 96% lower power delay product compared to only forward body biased at half of supply voltage. The NMOS model used are predictive technology models of Arizona state university and the simulations to be carried out using HSPICE simulator.

Keywords: Dynamic body biasing, highly optimized barrel shifter, PDP, Static body biasing.

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Authors: Jörg Lenhardt, Wolfram Schiffmann, Jörg Keller

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While the feature sizes of recent Complementary Metal Oxid Semiconductor (CMOS) devices decrease the influence of static power prevails their energy consumption. Thus, power savings that benefit from Dynamic Frequency and Voltage Scaling (DVFS) are diminishing and temporal shutdown of cores or other microchip components become more worthwhile. A consequence of powering off unused parts of a chip is that the relative difference between idle and fully loaded power consumption is increased. That means, future chips and whole server systems gain more power saving potential through power-aware load balancing, whereas in former times this power saving approach had only limited effect, and thus, was not widely adopted. While powering off complete servers was used to save energy, it will be superfluous in many cases when cores can be powered down. An important advantage that comes with that is a largely reduced time to respond to increased computational demand. We include the above developments in a server power model and quantify the advantage. Our conclusion is that strategies from datacenters when to power off server systems might be used in the future on core level, while load balancing mechanisms previously used at core level might be used in the future at server level.

Keywords: Power efficiency, static power consumption, dynamic power consumption, CMOS.

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Authors: Pardeep Singh, Sanjay Sharma, Parvinder S. Sandhu

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This work aims to reduce the read power consumption as well as to enhance the stability of the SRAM cell during the read operation. A new 10-transisor cell is proposed with a new read scheme to minimize the power consumption within the memory core. It has separate read and write ports, thus cell read stability is significantly improved. A 16Kb SRAM macro operating at 1V supply voltage is demonstrated in 65 nm CMOS process. Its read power consumption is reduced to 24% of the conventional design. The new cell also has lower leakage current due to its special bit-line pre-charge scheme. As a result, it is suitable for low-power mobile applications where power supply is restricted by the battery.

Keywords: A 16Kb 10T-SRAM, 4x Read-Power Reduction

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Authors: Reza Sedaghati, Mojtaba Hakimzadeh, Abdolmohamad Davodi, Navid Javidtash

Abstract:

The advent of Flexible AC Transmission Systems (FACTS) is giving rise to a new family of power electronic equipment emerging for controlling and optimizing the performance of power system, e.g. STATCOM. Static synchronous Compensator (STATCOM) is a commonly used FACTS device and has been successfully applied in power systems. In this sense, superconducting magnetic energy storage (SMES) in integration with a static synchronous compensator (STATCOM) is capable of supplying power systems with both active and reactive powers simultaneously and very rapidly, and thus is able to enhance the security dramatically. In this paper the structure and characteristics of the STATCOM/SMES is proposed. In addition, using a proper control scheme, STATCOM/ SMES is tested on an IEEE 3-bus system and more effective performance of the presented STATCOM/SMES compensator is evaluated with alone STATCOM through the dynamic simulation by using PSCAD/EMTDC software.

Keywords: STATCOM/SMES, Oscillation Damping, Control, Power System.

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Authors: U. Ramesh Babu, V. Vijaya Kumar Reddy, S. Tara Kalyani

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This paper investigates the performance comparison of SVC (Static VAR Compensator) and DSTATCOM (Distribution Static Synchronous Compensator) to improve voltage stability in Radial Distribution System (RDS) which are efficient FACTS (Flexible AC Transmission System) devices that are capable of controlling the active and reactive power flows in a power system line by appropriately controlling parameters using ANFIS. Simulations are carried out in MATLAB/Simulink environment for the IEEE-4 bus system to test the ability of increasing load. It is found that these controllers significantly increase the margin of load in the power systems.

Keywords: SVC, DSTATCOM, voltage improvement, ANFIS.

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Authors: J. Barati, A. Saeedian, S. S. Mortazavi

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The main objective of this paper is a comparative investigate in enhancement of damping power system oscillation via coordinated design of the power system stabilizer (PSS) and static synchronous series compensator (SSSC) and static synchronous compensator (STATCOM). The design problem of FACTS-based stabilizers is formulated as a GA based optimization problem. In this paper eigenvalue analysis method is used on small signal stability of single machine infinite bus (SMIB) system installed with SSSC and STATCOM. The generator is equipped with a PSS. The proposed stabilizers are tested on a weakly connected power system with different disturbances and loading conditions. This aim is to enhance both rotor angle and power system stability. The eigenvalue analysis and non-linear simulation results are presented to show the effects of these FACTS-based stabilizers and reveal that SSSC exhibits the best effectiveness on damping power system oscillation.

Keywords: Power system stability, PSS, SSSC, STATCOM, Coordination, Optimization, Damping Oscillations.

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Authors: T. Hussein

Abstract:

The use of power system stabilizers (PSSs) to damp power system swing mode of oscillations is practical important. Our purpose is to retune the power system stabilizer (PSS1A) parameters in Unitrol D produced by ABB– was installed in 1995in Benghazi North Power Plants (BNPPs) at General Electricity Company of Libya (GECOL). The optimal values of the power system stabilizer (PSS1A) parameters are determined off-line by a particle swarm optimization technique (PSO). The objective is to damp the local and inter-area modes of oscillations that occur following power system disturbances. The retuned power system stabilizer (PSS1A) can cope with large disturbance at different operating points and has enhanced power system stability.

Keywords: Static excitation system, particle swarm optimization (PSO), power system stabilizer (PSS).

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Authors: Sanjay Singh, M Sathish Kumar, H. S Mruthyunjaya

Abstract:

Multicarrier transmission system such as Orthogonal Frequency Division Multiplexing (OFDM) is a promising technique for high bit rate transmission in wireless communication system. OFDM is a spectrally efficient modulation technique that can achieve high speed data transmission over multipath fading channels without the need for powerful equalization techniques. However the price paid for this high spectral efficiency and less intensive equalization is low power efficiency. OFDM signals are very sensitive to nonlinear effects due to the high Peak-to-Average Power Ratio (PAPR), which leads to the power inefficiency in the RF section of the transmitter. This paper investigates the effect of PAPR reduction on the performance parameter of multicarrier communication system. Performance parameters considered are power consumption of Power Amplifier (PA) and Digital-to-Analog Converter (DAC), power amplifier efficiency, SNR of DAC and BER performance of the system. From our analysis it is found that irrespective of PAPR reduction technique being employed, the power consumption of PA and DAC reduces and power amplifier efficiency increases due to reduction in PAPR. Moreover, it has been shown that for a given BER performance the requirement of Input-Backoff (IBO) reduces with reduction in PAPR.

Keywords: BER, Crest Factor (CF), Digital-to-Analog Converter(DAC), Input-Backoff (IBO), Orthogonal Frequency Division Multiplexing(OFDM), Peak-to-Average Power Ratio (PAPR), PowerAmplifier efficiency, SNR

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Authors: A. S. P.Kanojia, B. Dr.V.K.Chandrakar

Abstract:

Static synchronous compensator (STATCOM) is a shunt connected voltage source converter (VSC), which can affect rapid control of reactive flow in the transmission line by controlling the generated a.c. voltage. The main aim of the paper is to design a power system installed with a Static synchronous compensator (STATCOM) and demonstrates the application of the linearised Phillips-heffron model in analyzing the damping effect of the STATCOM to improve power system oscillation stability. The proposed PI controller is designed to coordinate two control inputs: Voltage of the injection bus and capacitor voltage of the STATCOM, to improve the Dynamic stability of a SMIB system .The power oscillations damping (POD) control and power system stabilizer (PSS) and their coordinated action with proposed controllers are tested. The simulation result shows that the proposed damping controllers provide satisfactory performance in terms of improvements of dynamic stability of the system.

Keywords: Damping oscillations, FACTS, STATCOM, dynamic stability, PSS, POD, Coordination.

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Authors: Dana M. Ragab, Jasim A. Ghaeb

Abstract:

The three-phase power system suffers from different challenging problems, e.g. voltage unbalance conditions at the load side. The voltage unbalance usually degrades the power quality of the electric power system. Several techniques can be considered for load balancing including load reconfiguration, static synchronous compensator and static reactive power compensator. In this work an efficient neural network is designed to control the unbalanced condition in the Aqaba-Qatrana-South Amman (AQSA) electric power system. It is designed for highly enhanced response time of the reactive compensator for voltage balancing. The neural network is developed to determine the appropriate set of firing angles required for the thyristor-controlled reactor to balance the three load voltages accurately and quickly. The parameters of AQSA power system are considered in the laboratory model, and several test cases have been conducted to test and validate the proposed technique capabilities. The results have shown a high performance of the proposed Neural Network Control (NNC) technique for correcting the voltage unbalance conditions at three-phase load based on accuracy and response time.

Keywords: Three-phase power system, reactive power control, voltage unbalance factor, neural network, power quality.

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Authors: Amir Sepasi Zahmati, Bahman Abolhassani, Ali Asghar Beheshti Shirazi, Ali Shojaee Bakhtiari

Abstract:

A wireless sensor network with a large number of tiny sensor nodes can be used as an effective tool for gathering data in various situations. One of the major issues in wireless sensor networks is developing an energy-efficient routing protocol which has a significant impact on the overall lifetime of the sensor network. In this paper, we propose a novel hierarchical with static clustering routing protocol called Energy-Efficient Protocol with Static Clustering (EEPSC). EEPSC, partitions the network into static clusters, eliminates the overhead of dynamic clustering and utilizes temporary-cluster-heads to distribute the energy load among high-power sensor nodes; thus extends network lifetime. We have conducted simulation-based evaluations to compare the performance of EEPSC against Low-Energy Adaptive Clustering Hierarchy (LEACH). Our experiment results show that EEPSC outperforms LEACH in terms of network lifetime and power consumption minimization.

Keywords: Clustering methods, energy efficiency, routingprotocol, wireless sensor networks.

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Authors: Yahya Naderi, Tohid Rahimi, Babak Yousefi, Seyed Hossein Hosseini

Abstract:

Today’s modern interconnected power system is highly complex in nature. In this, one of the most important requirements during the operation of the electric power system is the reliability and security. Power and frequency oscillation damping mechanism improve the reliability. Because of power system stabilizer (PSS) low speed response against of major fault such as three phase short circuit, FACTs devise that can control the network condition in very fast time, are becoming popular. But FACTs capability can be seen in a major fault present when nonlinear models of FACTs devise and power system equipment are applied. To realize this aim, the model of multi-machine power system with FACTs controller is developed in MATLAB/SIMULINK using Sim Power System (SPS) blockiest. Among the FACTs device, Static synchronous series compensator (SSSC) due to high speed changes its reactance characteristic inductive to capacitive, is effective power flow controller. Tuning process of controller parameter can be performed using different method. But Genetic Algorithm (GA) ability tends to use it in controller parameter tuning process. In this paper firstly POD controller is used to power oscillation damping. But in this station, frequency oscillation dos not has proper damping situation. So FOD controller that is tuned using GA is using that cause to damp out frequency oscillation properly and power oscillation damping has suitable situation.

Keywords: Power oscillation damping (POD), frequency oscillation damping (FOD), Static synchronous series compensator (SSSC), Genetic Algorithm (GA).

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Authors: Khoshnaw Khalid Hama Saleh, Ergun Ercelebi

Abstract:

Increasingly complex modern power systems require stability, especially for transient and small disturbances. Transient stability plays a major role in stability during fault and large disturbance. This paper compares a power system stabilizer (PSS) and static Var compensator (SVC) to improve damping oscillation and enhance transient stability. The effectiveness of a PSS connected to the exciter and/or governor in damping electromechanical oscillations of isolated synchronous generator was tested. The SVC device is a member of the shunt FACTS (flexible alternating current transmission system) family, utilized in power transmission systems. The designed model was tested with a multi-machine system consisting of four machines six bus, using MATLAB/SIMULINK software. The results obtained indicate that SVC solutions are better than PSS.

Keywords: FACTS, MATLAB/SIMULINK, multi-machine system, PSS, SVC, transient stability.

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Authors: K. Abuzayan, H. Alabed, J. Ezarrugh, M. Agila

Abstract:

Static and dynamic balance are essential in daily and sports life. Many factors have been identified as influencing static balance control. Therefore, the aim of this study was to apply the (XCoM) method and other relevant variables (CoP, CoM, F_h, KE, P, Q, and, AI) to investigate sport related activities such as hopping and jumping. Many studies have represented the CoP data without mentioning its accuracy so several experiments were done to establish the agreement between the CoP and the projected CoM in a static condition. 5 healthy male were participated in this study (Mean ± SD:- age 24.6 years ±4.5, height 177cm ± 6.3, body mass 72.8kg ± 6.6).Results found that the implementation of the XCoM method was found to be practical for evaluating both static and dynamic balance. The general findings were that the CoP, the CoM, the XCoM, F_h, and Q were more informative than the other variables (e.g. KE, P, and AI) during static and dynamic balance. The XCoM method was found to be applicable to dynamic balance as well as static balance.

Keywords: Centre of Mass, static balance, Dynamic balance, extrapolated Centre of Mass

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Authors: A.M. Vural, K.C. Bayindir

Abstract:

Back-to-back static synchronous compensator (BtBSTATCOM) consists of two back-to-back voltage-source converters (VSC) with a common DC link in a substation. This configuration extends the capabilities of conventional STATCOM that bidirectional active power transfer from one bus to another is possible. In this paper, VSCs are designed in quasi multi-pulse form in which GTOs are triggered only once per cycle in PSCAD/EMTDC. The design details of VSCs as well as gate switching circuits and controllers are fully represented. Regulation modes of BtBSTATCOM are verified and tested on a multi-machine power system through different simulation cases. The results presented in the form of typical time responses show that practical PI controllers are almost robust and stable in case of start-up, set-point change, and line faults.

Keywords: Flexible AC Transmission Systems (FACTS), Backto-Back Static Synchronous Compensator (BtB-STATCOM), quasi multi-pulse voltage source converter, active power transfer; voltage control.

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Authors: Sangram Keshori Mohapatra, Sidhartha Panda, Prasant Kumar Satpathy

Abstract:

Power-system stability improvement by simultaneous tuning of power system stabilizer (PSS) and a Static Var Compensator (SVC) based damping controller is thoroughly investigated in this paper. Both local and remote signals with associated time delays are considered in the present study. The design problem of the proposed controller is formulated as an optimization problem, and differential evolution (DE) algorithm is employed to search for the optimal controller parameters. The performances of the proposed controllers are evaluated under different disturbances for both single-machine infinite bus power system and multi-machine power system. The performance of the proposed controllers with variations in the signal transmission delays has also been investigated. The proposed stabilizers are tested on a weakly connected power system subjected to different disturbances. Nonlinear simulation results are presented to show the effectiveness and robustness of the proposed control schemes over a wide range of loading conditions and disturbances. Further, the proposed design approach is found to be robust and improves stability effectively even under small disturbance conditions.

Keywords: Differential Evolution Algorithm, Power System Stability, Power System Stabilizer, Static Var Compensator

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