Search results for: silicon oxide.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 540

Search results for: silicon oxide.

540 Effects of Silicon Oxide Filler Material and Fibre Orientation on Erosive Wear of GF/EP Composites

Authors: M. Bagci, H. Imrek, Omari M. Khalfan

Abstract:

Materials added to the matrix help improving operating properties of a composite. This experimental study has targeted to investigate this aim where Silicon Oxide particles were added to glass fibre and epoxy resin at an amount of 15% to the main material to obtain a sort of new composite material. Erosive wear behavior of epoxy-resin dipped composite materials reinforced with glass fibre and Silicon Oxide under three different impingement angles (30°, 60° and 90°), three different impact velocities (23, 34 and 53 m/s), two different angular Aluminum abrasive particle sizes (approximately 200 and 400 μm) and the fibre orientation of 45° (45/-45) were investigated. In the test results, erosion rates were obtained as functions of impingement angles, impact velocities, particle sizes and fibre orientation. Moreover, materials with addition of Silicon Oxide filler material exhibited lower wear as compared to neat materials with no added filler material. In addition, SEM views showing worn out surfaces of the test specimens were scrutinized.

Keywords: Erosive wear, fibre orientation, GF/EP, silicon oxide.

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539 A High-Crosstalk Silicon Photonic Arrayed Waveguide Grating

Authors: Qing Fang, Lianxi Jia, Junfeng Song, Chao Li, Xianshu Luo, Mingbin Yu, Guoqiang Lo

Abstract:

In this paper, we demonstrated a 1 × 4 silicon photonic cascaded arrayed waveguide grating, which is fabricated on a SOI wafer with a 220 nm top Si layer and a 2µm buried oxide layer. The measured on-chip transmission loss of this cascaded arrayed waveguide grating is ~ 5.6 dB, including the fiber-to-waveguide coupling loss. The adjacent crosstalk is 33.2 dB. Compared to the normal single silicon photonic arrayed waveguide grating with a crosstalk of ~ 12.5 dB, the crosstalk of this device has been dramatically increased.

Keywords: Silicon photonic, arrayed waveguide grating, high-crosstalk, cascaded structure.

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538 Optical Reflectance of Pure and Doped Tin Oxide: From Thin Films to Poly-Crystalline Silicon/Thin Film Device

Authors: Smaali Assia, Outemzabet Ratiba, Media El Mahdi, Kadi Mohamed

Abstract:

Films of pure tin oxide SnO2 and in presence of antimony atoms (SnO2-Sb) deposited onto glass substrates have shown a sufficiently high energy gap to be transparent in the visible region, a high electrical mobility and a carrier concentration which displays a good electrical conductivity [1]. In this work, the effects of polycrystalline silicon substrate on the optical properties of pure and Sb doped tin oxide is investigated. We used the APCVD (atmospheric pressure chemical vapour deposition) technique, which is a low-cost and simple technique, under nitrogen ambient, for growing this material. A series of SnO2 and SnO2-Sb have been deposited onto polycrystalline silicon substrates with different contents of antimony atoms at the same conditions of deposition (substrate temperature, flow oxygen, duration and nitrogen atmosphere of the reactor). The effect of the substrate in terms of morphology and nonlinear optical properties, mainly the reflectance, was studied. The reflectance intensity of the device, compared to the reflectance of tin oxide films deposited directly on glass substrate, is clearly reduced on the overall wavelength range. It is obvious that the roughness of the poly-c silicon plays an important role by improving the reflectance and hence the optical parameters. A clear shift in the minimum of the reflectance upon doping level is observed. This minimum corresponds to strong free carrier absorption, resulting in different plasma frequency. This effect is followed by an increase in the reflectance depending of the antimony doping. Applying the extended Drude theory to the combining optical and electrical obtained results these effects are discussed.

Keywords: Doping, oxide, reflectance.

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537 Electrotechnology for Silicon Refining: Plasma Generator and Arc Furnace: Installations and Theoretical Base

Authors: Ashot Navasardian, Mariam Vardanian, Vladik Vardanian

Abstract:

The photovoltaic and the semiconductor industries are in growth and it is necessary to supply a large amount of silicon to maintain this growth. Since silicon is still the best material for the manufacturing of solar cells and semiconductor components so the pure silicon like solar grade and semiconductor grade materials are demanded. There are two main routes for silicon production: metallurgical and chemical. In this article, we reviewed the electrotecnological installations and systems for semiconductor manufacturing. The main task is to design the installation which can produce SOG Silicon from river sand by one work unit.

Keywords: Metallurgical grade silicon, solar grade silicon, impurity, refining, plasma.

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536 Preparation of Porous Metal Membrane by Thermal Annealing for Thin Film Encapsulation

Authors: Jaibir Sharma, Lee JaeWung, Merugu Srinivas, Navab Singh

Abstract:

This paper presents thermal annealing de-wetting technique for the preparation of porous metal membrane for Thin Film Encapsulation (TFE) application. Thermal annealing de-wetting experimental results reveal that pore size formation in porous metal membrane depend upon i.e. 1. The substrate at which metal is deposited, 2. Melting point of metal used for porous metal cap layer membrane formation, 3. Thickness of metal used for cap layer, 4. Temperature used for formation of porous metal membrane. In order to demonstrate this technique, Silver (Ag) was used as a metal for preparation of porous metal membrane on amorphous silicon (a-Si) and silicon oxide. The annealing of the silver thin film of various thicknesses was performed at different temperature. Pores in porous silver film were analyzed using Scanning Electron Microscope (SEM). In order to check the usefulness of porous metal film for TFE application, the porous silver film prepared on amorphous silicon (a- Si) and silicon oxide was released using XeF2 and VHF, respectively. Finally, guide line and structures are suggested to use this porous membrane for robust TFE application.

Keywords: De-wetting, thermal annealing, metal, melting point, porous.

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535 Simulation of High Performance Nanoscale Partially Depleted SOI n-MOSFET Transistors

Authors: Fatima Zohra Rahou, A. Guen Bouazza, B. Bouazza

Abstract:

Invention of transistor is the foundation of electronics industry. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has been the key for the development of nanoelectronics technology. In the first part of this manuscript, we present a new generation of MOSFET transistors based on SOI (Silicon-On-Insulator) technology. It is a partially depleted Silicon-On-Insulator (PD SOI MOSFET) transistor simulated by using SILVACO software. This work was completed by the presentation of some results concerning the influence of parameters variation (channel length L and gate oxide thickness Tox) on our PDSOI n-MOSFET structure on its drain current and kink effect.

Keywords: SOI technology, PDSOI MOSFET, FDSOI MOSFET, Kink Effect, SILVACO TCAD.

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534 High Temperature Hydrogen Sensors Based On Pd/Ta2O5/SiC MOS Capacitor

Authors: J. H. Choi, S. J. Kim, M. S. Jung, S. J. Kim, S. J. Joo, S. C. Kim

Abstract:

There are a many of needs for the development of SiC-based hydrogen sensor for harsh environment applications. We fabricated and investigated Pd/Ta2O5/SiC-based hydrogen sensors with MOS capacitor structure for high temperature process monitoring and leak detection applications in such automotive, chemical and petroleum industries as well as direct monitoring of combustion processes. In this work, we used silicon carbide (SiC) as a substrate to replace silicon which operating temperatures are limited to below 200°C. Tantalum oxide was investigated as dielectric layer which has high permeability for hydrogen gas and high dielectric permittivity, compared with silicon dioxide or silicon nitride. Then, electrical response properties, such as I-V curve and dependence of capacitance on hydrogen concentrations were analyzed in the temperature ranges of room temperature to 500°C for performance evaluation of the sensor.

Keywords: High temperature, hydrogen sensor, SiC, Ta2O5 dielectric layer.

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533 Impact of Process Variations on the Vertical Silicon Nanowire Tunneling FET (TFET)

Authors: Z. X. Chen, T. S. Phua, X. P. Wang, G. -Q. Lo, D. -L. Kwong

Abstract:

This paper presents device simulations on the vertical silicon nanowire tunneling FET (VSiNW TFET). Simulations show that a narrow nanowire and thin gate oxide is required for good performance, which is expected even for conventional MOSFETs. The gate length also needs to be more than the nanowire diameter to prevent short channel effects. An effect more unique to TFET is the need for abrupt source to channel junction, which is shown to improve the performance. The ambipolar effect suppression by reducing drain doping concentration is also explored and shown to have little or no effect on performance.

Keywords: Device simulation, MEDICI, tunneling FET (TFET), vertical silicon nanowire.

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532 CMOS-Compatible Deposited Materials for Photonic Layers Integrated above Electronic Integrated Circuit

Authors: Shiyang Zhu, G. Q. Lo, D. L. Kwong

Abstract:

Silicon photonics has generated an increasing interest in recent years mainly for optical communications optical interconnects in microelectronic circuits or bio-sensing applications. The development of elementary passive and active components (including detectors and modulators), which are mainly fabricated on the silicon on insulator platform for CMOS-compatible fabrication, has reached such a performance level that the integration challenge of silicon photonics with microelectronic circuits should be addressed. Since crystalline silicon can only be grown from another silicon crystal, making it impossible to deposit in this state, the optical devices are typically limited to a single layer. An alternative approach is to integrate a photonic layer above the CMOS chip using back-end CMOS fabrication process. In this paper, various materials, including silicon nitride, amorphous silicon, and polycrystalline silicon, for this purpose are addressed.

Keywords: Silicon photonics, CMOS, Integration.

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531 Ultrasensitive Hepatitis B Virus Detection in Blood Using Nano-Porous Silicon Oxide: Towards POC Diagnostics

Authors: N. Das, N. Samanta, L. Pandey, C. Roy Chaudhuri

Abstract:

Early diagnosis of infection like Hep-B virus in blood is important for low cost medical treatment. For this purpose, it is desirable to develop a point of care device which should be able to detect trace quantities of the target molecule in blood. In this paper, we report a nanoporous silicon oxide sensor which is capable of detecting down to 1fM concentration of Hep-B surface antigen in blood without the requirement of any centrifuge or pre-concentration. This has been made possible by the presence of resonant peak in the sensitivity characteristics. This peak is observed to be dependent only on the concentration of the specific antigen and not on the interfering species in blood serum. The occurrence of opposite impedance change within the pores and at the bottom of the pore is responsible for this effect. An electronic interface has also been designed to provide a display of the virus concentration.

Keywords: Impedance spectroscopy, Ultrasensitive detection in blood, Peak frequency, Electronic interface.

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530 Effect of Concentration of Sodium Borohydrate on the Synthesis of Silicon Nanoparticles via Microemulsion Route

Authors: W. L. Liong, Srimala Sreekantan, Sabar D. Hutagalung

Abstract:

The effect of concentration of reduction agent of sodium borohydrate (NaBH4) on the properties of silicon nanoparticles synthesized via microemulsion route is reported. In this work, the concentration of the silicon tetrachloride (SiCl4) that served as silicon source with sodium hydroxide (NaOH) and polyethylene glycol (PEG) as stabilizer and surfactant, respectively, are keep fixed. Four samples with varied concentration of NaBH4 from 0.05 M to 0.20 M were synthesized. It was found that the lowest concentration of NaBH4 gave better formation of silicon nanoparticles.

Keywords: Microelmusion, nanoparticles, reduction, silicon

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529 Light Emission Enhancement of Silicon Nanocrystals by Gold Layer

Authors: R. Karmouch

Abstract:

A thin gold metal layer was deposited on the top of silicon oxide films containing embedded Si nanocrystals (Si-nc). The sample was annealed in a gas containing nitrogen, and subsequently characterized by photoluminescence. We obtained 3-fold enhancement of photon emission from the Si-nc embedded in silicon dioxide covered with a Gold layer as compared with an uncovered sample. We attribute this enhancement to the increase of the spontaneous emission rate caused by the coupling of the Si-nc emitters with the surface plasmons (SP). The evolution of PL emission with laser irradiated time was also collected from covered samples, and compared to that from uncovered samples. In an uncovered sample, the PL intensity decreases with time, approximately with two decay constants. Although the decrease of the initial PL intensity associated with the increase of sample temperature under CW pumping is still observed in samples covered with a gold layer, this film significantly contributes to reduce the permanent deterioration of the PL intensity. The resistance to degradation of light-emitting silicon nanocrystals can be increased by SP coupling to suppress the permanent deterioration. Controlling the permanent photodeterioration can allow to perform a reliable optical gain measurement.

Keywords: Photodeterioration, Silicon Nanocrystals, Ion Implantation, Photoluminescence, Surface Plasmons.

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528 Silicon-To-Silicon Anodic Bonding via Intermediate Borosilicate Layer for Passive Flow Control Valves

Authors: Luc Conti, Dimitry Dumont-Fillon, Harald van Lintel, Eric Chappel

Abstract:

Flow control valves comprise a silicon flexible membrane that deflects against a substrate, usually made of glass, containing pillars, an outlet hole, and anti-stiction features. However, there is a strong interest in using silicon instead of glass as substrate material, as it would simplify the process flow by allowing the use of well controlled anisotropic etching. Moreover, specific devices demanding a bending of the substrate would also benefit from the inherent outstanding mechanical strength of monocrystalline silicon. Unfortunately, direct Si-Si bonding is not easily achieved with highly structured wafers since residual stress may prevent the good adhesion between wafers. Using a thermoplastic polymer, such as parylene, as intermediate layer is not well adapted to this design as the wafer-to-wafer alignment is critical. An alternative anodic bonding method using an intermediate borosilicate layer has been successfully tested. This layer has been deposited onto the silicon substrate. The bonding recipe has been adapted to account for the presence of the SOI buried oxide and intermediate glass layer in order not to exceed the breakdown voltage. Flow control valves dedicated to infusion of viscous fluids at very high pressure have been made and characterized. The results are compared to previous data obtained using the standard anodic bonding method.

Keywords: Anodic bonding, evaporated glass, microfluidic valve, drug delivery.

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527 The Synergistic Effects of Using Silicon and Selenium on Fruiting of Zaghloul Date Palm (Phoenix dectylifera L.)

Authors: M. R. Gad El- Kareem, A. M. K. Abdel Aal, A. Y. Mohamed

Abstract:

During 2011 and 2012 seasons, Zaghloul date palms received four sprays of silicon (Si) at 0.05 to 0.1% and selenium (Se) at 0.01 to 0.02%. Growth, nutritional status, yield as well as physical and chemical characteristics of the fruits in response to application of silicon and selenium were investigated. Single and combined applications of silicon at 0.05 to 0.1% and selenium at 0.01 to 0.02% was very effective in enhancing the leaf area, total chlorophylls, percentages of N, P and K in the leaves, yield, bunch weight as well as physical and chemical characteristics of the fruits in relative to the check treatment. Silicon was superior to selenium in this respect. Combined application was favorable than using each alone in this connection. Treating Zaghloul date palms four times with a mixture of silicon at 0.05% + selenium at 0.01% resulted in an economical yield and producing better fruit quality.

Keywords: Date Palms, Zaghloul, Silicon, Selenium, leaf area.

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526 Contribution to the Study of Thermal Conductivity of Porous Silicon Used In Thermal Sensors

Authors: A. Ould-Abbas, M. Bouchaour, , M. Madani, D. Trari, O. Zeggai, M. Boukais, N.-E.Chabane-Sari

Abstract:

The porous silicon (PS), formed from the anodization of a p+ type substrate silicon, consists of a network organized in a pseudo-column as structure of multiple side ramifications. Structural micro-topology can be interpreted as the fraction of the interconnected solid phase contributing to thermal transport. The reduction of dimensions of silicon of each nanocristallite during the oxidation induced a reduction in thermal conductivity. Integration of thermal sensors in the Microsystems silicon requires an effective insulation of the sensor element. Indeed, the low thermal conductivity of PS consists in a very promising way in the fabrication of integrated thermal Microsystems.In this work we are interesting in the measurements of thermal conductivity (on the surface and in depth) of PS by the micro-Raman spectroscopy. The thermal conductivity is studied according to the parameters of anodization (initial doping and current density. We also, determine porosity of samples by spectroellipsometry.

Keywords: micro-Raman spectroscopy, mono-crysatl silicon, porous silicon, thermal conductivity

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525 Investigation of Mesoporous Silicon Carbonization Process

Authors: N. I. Kargin, G. K. Safaraliev, A. S. Gusev, A. O. Sultanov, N. V. Siglovaya, S. M. Ryndya, A. A. Timofeev

Abstract:

In this paper, an experimental and theoretical study of the processes of mesoporous silicon carbonization during the formation of buffer layers for the subsequent epitaxy of 3C-SiC films and related wide-band-gap semiconductors is performed. Experimental samples were obtained by the method of chemical vapor deposition and investigated by scanning electron microscopy. Analytic expressions were obtained for the effective diffusion factor and carbon atoms diffusion length in a porous system. The proposed model takes into account the processes of Knudsen diffusion, coagulation and overgrowing of pores during the formation of a silicon carbide layer.

Keywords: Silicon carbide, porous silicon, carbonization, electrochemical etching, diffusion.

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524 The Manufacturing of Metallurgical Grade Silicon from Diatomaceous Silica by an Induction Furnace

Authors: Shahrazed Medeghri, Saad Hamzaoui, Mokhtar Zerdali

Abstract:

The metallurgical grade silicon (MG-Si) is obtained from the reduction of silica (SiO2) in an induction furnace or an electric arc furnace. Impurities inherent in reduction process also depend on the quality of the raw material used. Among the applications of the silicon, it is used as a substrate for the photovoltaic conversion of solar energy and this conversion is wider as the purity of the substrate is important. Research is being done where the purpose is looking for new methods of manufacturing and purification of silicon, as well as new materials that can be used as substrates for the photovoltaic conversion of light energy. In this research, the technique of production of silicon in an induction furnace, using a high vacuum for fusion. Diatomaceous Silica (SiO2) used is 99 mass% initial purities, the carbon used is 6N of purity and the particle size of 63μm as starting materials. The final achieved purity of the material was above 50% by mass. These results demonstrate that this method is a technically reliable, and allows obtaining a better return on the amount 50% of silicon.

Keywords: Induction, amorphous silica, carbon microstructure, silicon.

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523 Numerical Analysis of Flow through Abrasive Water Suspension Jet: The Effect of Garnet, Aluminum Oxide and Silicon Carbide Abrasive on Skin Friction Coefficient Due To Wall Shear and Jet Exit Kinetic Energy

Authors: Deepak D, Anjaiah D, Yagnesh Sharma N.

Abstract:

It is well known that the abrasive particles in the abrasive water suspension has significant effect on the erosion characteristics of the inside surface of the nozzle. Abrasive particles moving with the flow cause severe skin friction effect, there by altering the nozzle diameter due to wear which in turn reflects on the life of the nozzle for effective machining. Various commercial abrasives are available for abrasive water jet machining. The erosion characteristic of each abrasive is different. In consideration of this aspect, in the present work, the effect of abrasive materials namely garnet, aluminum oxide and silicon carbide on skin friction coefficient due to wall shear stress and jet kinetic energy has been analyzed. It is found that the abrasive material of lower density produces a relatively higher skin friction effect and higher jet exit kinetic energy.

Keywords: Abrasive water suspension jet, Skin friction coefficient, Jet kinetic energy, Particulate loading, Stokes number.

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522 Thermoelectric Properties of Doped Polycrystalline Silicon Film

Authors: Li Long, Thomas Ortlepp

Abstract:

The transport properties of carriers in polycrystalline silicon film affect the performance of polycrystalline silicon-based devices. They depend strongly on the grain structure, grain boundary trap properties and doping concentration, which in turn are determined by the film deposition and processing conditions. Based on the properties of charge carriers, phonons, grain boundaries and their interactions, the thermoelectric properties of polycrystalline silicon are analyzed with the relaxation time approximation of the Boltzmann transport equation. With this approach, thermal conductivity, electrical conductivity and Seebeck coefficient as a function of grain size, trap properties and doping concentration can be determined. Experiment on heavily doped polycrystalline silicon is carried out and measurement results are compared with the model.

Keywords: Conductivity, polycrystalline silicon, relaxation time approximation, Seebeck coefficient, thermoelectric property.

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521 An Electrically Modulatable Silicon Waveguide Grating Using an Implantation Technology

Authors: Qing Fang, Lianxi Jia, JunFeng Song, Xiaoguang Tu, Mingbin Yu, Andy Eu-jin Lim, Guo Qiang Lo

Abstract:

The first pn-type carrier-induced silicon Bragg-grating filter is demonstrated. The extinction-ratio modulations are 11.5 dB and 10 dB with reverse and forward biases, respectively. 8-Gpbs data rate is achieved with a reverse bias.

Keywords: Silicon photonics, Waveguide grating, Carrier-induced, Extinction-ratio modulation.

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520 All-Silicon Raman Laser with Quasi-Phase-Matched Structures and Resonators

Authors: Isao Tomita

Abstract:

The principle of all-silicon Raman lasers for an output wavelength of 1.3 μm is presented, which employs quasi-phase-matched structures and resonators to enhance the output power. 1.3-μm laser beams for GE-PONs in FTTH systems generated from a silicon device are very important because such a silicon device can be monolithically integrated with the silicon planar lightwave circuits (Si PLCs) used in the GE-PONs. This reduces the device fabrication processes and time and also optical losses at the junctions between optical waveguides of the Si PLCs and Si laser devices when compared with 1.3-μm III-V semiconductor lasers set on the Si PLCs employed at present. We show that the quasi-phase-matched Si Raman laser with resonators can produce about 174 times larger laser power at 1.3 μm (at maximum) than that without resonators for a Si waveguide of Raman gain 20 cm/GW and optical loss 1.2 dB/cm, pumped at power 10 mW, where the length of the waveguide is 3 mm and its cross-section is (1.5 μm)2.

Keywords: All-silicon raman laser, FTTH, GE-PON, quasi-phase-matched structure, resonator.

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519 Analysis of a Novel Strained Silicon RF LDMOS

Authors: V.Fathipour, M. A. Malakootian, S. Fathipour, M. Fathipour

Abstract:

In this paper we propose a novel RF LDMOS structure which employs a thin strained silicon layer at the top of the channel and the N-Drift region. The strain is induced by a relaxed Si0.8 Ge0.2 layer which is on top of a compositionally graded SiGe buffer. We explain the underlying physics of the device and compare the proposed device with a conventional LDMOS in terms of energy band diagram and carrier concentration. Numerical simulations of the proposed strained silicon laterally diffused MOS using a 2 dimensional device simulator indicate improvements in saturation and linear transconductance, current drivability, cut off frequency and on resistance. These improvements are however accompanied with a suppression in the break down voltage.

Keywords: High Frequency MOSFET, Design of RF LDMOS, Strained-Silicon, LDMOS.

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518 Three Dimensional MEMS Supercapacitor Fabricated by DRIE on Silicon Substrate

Authors: Wei Sun, Ruilin Zheng, Xuyuan Chen

Abstract:

Micro power sources are required to be used in autonomous microelectromechanical system (MEMS). In this paper,  we designed and fabricated a three dimensional (3D) MEMS supercapacitor, which is consisting of conformal silicon  dioxide/titanium/polypyrrole (PPy) layers on silicon substrate. At first, ''through-structure'' was fabricated on the silicon substrate by high-aspect-ratio deep reactive ion etching (DRIE) method, which enlarges the available surface area significantly. Then the SiO2/Ti/PPy layers grew sequentially on the ³through-structure´. Finally, the supercapacitor was investigated by electrochemical methods.

Keywords: MEMS, Supercapacitor, DRIE, 3D.

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517 Study on Extraction of Lanthanum Oxide from Monazite Concentrate

Authors: Nwe Nwe Soe, Lwin Thuzar Shwe, Kay Thi Lwin

Abstract:

Lanthanum oxide is to be recovered from monazite, which contains about 13.44% lanthanum oxide. The principal objective of this study is to be able to extract lanthanum oxide from monazite of Moemeik Myitsone Area. The treatment of monazite in this study involves three main steps; extraction of lanthanum hydroxide from monazite by using caustic soda, digestion with nitric acid and precipitation with ammonium hydroxide and calcination of lanthanum oxalate to lanthanum oxide.

Keywords: Calcination, Digestion, Precipitation.

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516 Design of a Carbon Silicon Electrode for Iontophoresis Treatment towards Alopecia

Authors: Q. Wei, D. G. Hwang, Z. Mohy-Udin, D. H. Shin, J. H. Park, M. Y. Kang, J. H. Cho

Abstract:

This study presents design of a carbon silicon electrode for iontophorsis treatment towards alopecia. The alopecia is a medical description means loss of hair from the body. For solving this problem, the drug need to be delivered into the scalp, therefore, the iontophoresis was chosen to use in this treatment. However, almost common electrodes of iontophoresis device are made with metal material, the electrodes could give patients hurt when they using it, and it is hard to avoid the hair for attaching the hair. For this reason, an electrode is made with silicon material to decrease the hurt from the electrodes, and the carbon material is mixed in it for increasing conductance. The several cones with stainless material on the electrode make the electrode is able to void hair to attach the affected part. According to the results of a vivo-experiment, the carbon silicon electrode showed a good performance and in treatment comfortably.

Keywords: Carbon silicon, drug delivery system, iontophoresis

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515 Study of Fast Etching of Silicon for the Fabrication of Bulk Micromachined MEMS Structures

Authors: V. Swarnalatha, A. V. Narasimha Rao, P. Pal

Abstract:

The present research reports the investigation of fast etching of silicon for the fabrication of microelectromechanical systems (MEMS) structures using silicon wet bulk micromachining. Low concentration tetramethyl-ammonium hydroxide (TMAH) and hydroxylamine (NH2OH) are used as main etchant and additive, respectively. The concentration of NH2OH is varied to optimize the composition to achieve best etching characteristics such as high etch rate, significantly high undercutting at convex corner for the fast release of the microstructures from the substrate, and improved etched surface morphology. These etching characteristics are studied on Si{100} and Si{110} wafers as they are most widely used in the fabrication of MEMS structures as wells diode, transistors and integrated circuits.

Keywords: KOH, MEMS, micromachining, silicon, TMAH, wet anisotropic etching.

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514 Impact of Gate Insulation Material and Thickness on Pocket Implanted MOS Device

Authors: Muhibul Haque Bhuyan

Abstract:

This paper reports on the impact study with the variation of the gate insulation material and thickness on different models of pocket implanted sub-100 nm n-MOS device. The gate materials used here are silicon dioxide (SiO2), aluminum silicate (Al2SiO5), silicon nitride (Si3N4), alumina (Al2O3), hafnium silicate (HfSiO4), tantalum pentoxide (Ta2O5), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), and lanthanum oxide (La2O3) upon a p-type silicon substrate material. The gate insulation thickness was varied from 2.0 nm to 3.5 nm for a 50 nm channel length pocket implanted n-MOSFET. There are several models available for this device. We have studied and simulated threshold voltage model incorporating drain and substrate bias effects, surface potential, inversion layer charge, pinch-off voltage, effective electric field, inversion layer mobility, and subthreshold drain current models based on two linear symmetric pocket doping profiles. We have changed the values of the two parameters, viz. gate insulation material and thickness gradually fixing the other parameter at their typical values. Then we compared and analyzed the simulation results. This study would be helpful for the nano-scaled MOS device designers for various applications to predict the device behavior.

Keywords: Linear symmetric pocket profile, pocket implanted n-MOS Device, model, impact of gate material, insulator thickness.

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513 Investigation of Titanium Oxide Layer in Thermal-Electrochemical Anodizing of Ti6Al4V Alloy

Authors: Z. Abdolldhi, A. A. Ziaee M., A. Afshar

Abstract:

In this paper the combination of thermal oxidation and electrochemical anodizing processes is used to produce titanium oxide layers. The response of titanium alloy Ti6Al4V to oxidation processes at various temperatures and electrochemical anodizing in various voltages are investigated. Scanning electron microscopy (SEM); X-Ray Diffraction (XRD) and porosity determination have been used to characterize the oxide layer thickness, surface morphology, oxide layer-substrate adhesion and porosity. In the first experiment, samples modified by thermal oxidation process then followed by electrochemical anodizing. Second experiment consists of surfaces modified by electrochemical anodizing process and then followed by thermal oxidation. The first method shows better properties than other one. In second experiment, Surfaces modified were achieved by thicker and more adherent thick oxide layers on titanium surface. The existence of an electrochemical anodized oxide layer did not improve the adhesion of thermal oxide layer. The high temperature, thermal formation of an oxide layer leads to a coarse oxide grain morphology and a complete oxidative particle. In addition, in high temperature oxidation porosity content is increased. The oxide layer of thermal oxidation and electrochemical anodizing processes; on Ti–6Al–4V substrate was covered with different colored oxide layers.

Keywords: Electrochemically anodizing, Porosity, Thermaloxidation, Ti6Al4 alloy.

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512 Synthesis and Characterization of Nickel and Sulphur Sensitized Zinc Oxide Structures

Authors: Ella C. Linganiso, Bonex W. Mwakikunga, Trilock Singh, Sanjay Mathur, Odireleng M. Ntwaeaborwa

Abstract:

The use of nanostructured semiconducting material to catalyze degradation of environmental pollutants still receives much attention to date. One of the desired characteristics for pollutant degradation under ultra-violet visible light is the materials with extended carrier charge separation that allows for electronic transfer between the catalyst and the pollutants. In this work, zinc oxide n-type semiconductor vertically aligned structures were fabricated on silicon (100) substrates using the chemical bath deposition method. The as-synthesized structures were treated with nickel and sulphur. X-ray diffraction, scanning electron microscopy, energy dispersive X-ray spectroscopy were used to characterize the phase purity, structural dimensions and elemental composition of the obtained structures respectively. Photoluminescence emission measurements showed a decrease in both the near band edge emission as well as the defect band emission upon addition of nickel and sulphur with different concentrations. This was attributed to increased charger-carrier-separation due to the presence of Ni-S material on ZnO surface, which is linked to improved charge transfer during photocatalytic reactions.

Keywords: Carrier-charge-separation, nickel, sulphur, zinc oxide, photoluminescence.

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511 Impact of Height of Silicon Pillar on Vertical DG-MOSFET Device

Authors: K. E. Kaharudin, A. H. Hamidon, F. Salehuddin

Abstract:

Vertical Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is believed to suppress various short channel effect problems. The gate to channel coupling in vertical DG-MOSFET are doubled, thus resulting in higher current density. By having two gates, both gates are able to control the channel from both sides and possess better electrostatic control over the channel. In order to ensure that the transistor possess a superb turn-off characteristic, the subs-threshold swing (SS) must be kept at minimum value (60-90mV/dec). By utilizing SILVACO TCAD software, an n-channel vertical DG-MOSFET was successfully designed while keeping the sub-threshold swing (SS) value as minimum as possible. From the observation made, the value of sub-threshold swing (SS) was able to be varied by adjusting the height of the silicon pillar. The minimum value of sub-threshold swing (SS) was found to be 64.7mV/dec with threshold voltage (VTH) of 0.895V. The ideal height of the vertical DG-MOSFET pillar was found to be at 0.265 µm.

Keywords: DG-MOSFET, pillar, SCE, vertical

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