Search results for: Si-Ge.

Authors: Y. Li, K. Buddharaju, X. P. Wang

Abstract:

The mechanism of nickel (Ni) metallization in silicon-germanium (Si_0.5Ge_0.5) alloy nanowire (NW) was studied. Transmission electron microscope imaging with in-situ annealing was conducted at temperatures of 200^oC to 600°C. During rapid formation of Ni germanosilicide, loss of material from from the SiGe NW occurred which led to the formation of a thin Ni germanosilicide filament and eventual void. Energy dispersive X-ray spectroscopy analysis along the SiGe NW before and after annealing determined that Ge atoms tend to out-diffuse from the Ni germanosilicide towards the Ni source in the course of annealing. A model for the Ni germanosilicide formation in SiGe NW is proposed to explain this observation.

Keywords: SiGe, nanowires, germanosilicide.

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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Authors: Hyunwon Moon

Abstract:

It is necessary to realize new biomedical wireless communication systems which send the signals collected from various bio sensors located at human body in order to monitor our health. Also, it should seamlessly connect to the existing wireless communication systems. A 5.8 GHz ISM band low power RF front-end receiver for a biomedical wireless communication system is implemented using a 0.5 µm SiGe BiCMOS process. To achieve low power RF front-end, the current optimization technique for selecting device size is utilized. The implemented low noise amplifier (LNA) shows a power gain of 9.8 dB, a noise figure (NF) of below 1.75 dB, and an IIP3 of higher than 7.5 dBm while current consumption is only 6 mA at supply voltage of 2.5 V. Also, the performance of a down-conversion mixer is measured as a conversion gain of 11 dB and SSB NF of 10 dB.

Keywords: Biomedical, low noise amplifier, mixer, receiver, RF front-end, SiGe.

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Authors: I. Kurashvili, G. Darsavelidze, T. Kimeridze, G. Chubinidze, I. Tabatadze

Abstract:

At present, a number of modern semiconductor devices based on SiGe alloys have been created in which the latest achievements of high technologies are used. These devices might cause significant changes to networking, computing, and space technology. In the nearest future new materials based on SiGe will be able to restrict the A³B⁵ and Si technologies and firmly establish themselves in medium frequency electronics. Effective realization of these prospects requires the solution of prediction and controlling of structural state and dynamical physical –mechanical properties of new SiGe materials. Based on these circumstances, a complex investigation of structural defects and structural-sensitive dynamic mechanical characteristics of SiGe alloys under different external impacts (deformation, radiation, thermal cycling) acquires great importance. Internal friction (IF) and shear modulus temperature and amplitude dependences of the monocrystalline boron-doped Si_1-xGe_x(x≤0.05) alloys grown by Czochralski technique is studied in initial and ⁶⁰Co gamma-irradiated states. In the initial samples, a set of dislocation origin relaxation processes and accompanying modulus defects are revealed in a temperature interval of 400-800 ⁰C. It is shown that after gamma-irradiation intensity of relaxation internal friction in the vicinity of 280 ⁰C increases and simultaneously activation parameters of high temperature relaxation processes reveal clear rising. It is proposed that these changes of dynamical mechanical characteristics might be caused by a decrease of the dislocation mobility in the Cottrell atmosphere enriched by the radiation defects.

Keywords: Gamma-irradiation, internal friction, shear modulus, SiGe alloys.

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Authors: Morteza Fathipour, Samira Omidbakhsh, Kimia Khodayari

Abstract:

RF performance of SOI CMOS device has attracted significant amount of interest recently. In order to improve RF parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a replacement for Si technology .Enhancement of carrier mobility associated with strain engineering makes Strained Si a promising candidate for improving RF performance of CMOS technology. From the simulation, the cut-off frequency is estimated to be 224 GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore, Strained Si exhibits 19% improvement in cut-off frequency over similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of the key parameters in logic and digital application. Strained Si/SiGe demonstrates better Ion/Ioff characteristic than SOI, in similar channel length of 100 nm.Another important key analog figures of merit such as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids) are studied. They introduce the efficiency of the devices to convert dc power into ac frequency.

Keywords: cut-off frequency, RF application, Silicon oninsulator, Strained Si/SiGe on insulator.

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Authors: Pin-Hsu Kao, Wen-Shou Tseng, Hung-Ming Tai, Yuan-Ming Chang, Jenh-Yih Juang

Abstract:

We report a lithography-free approach to fabricate the biomimetics, quasi-beehive Si nanostructures (QBSNs), on Si-substrates. The self-assembled SiGe nanoislands via the strain induced surface roughening (Asaro-Tiller-Grinfeld instability) during in-situ annealing play a key role as patterned sacrifice regions for subsequent reactive ion etching (RIE) process performed for fabricating quasi-beehive nanostructures on Si-substrates. As the measurements of field emission, the bare QBSNs show poor field emission performance, resulted from the existence of the native oxide layer which forms an insurmountable barrier for electron emission. In order to dramatically improve the field emission characteristics, the platinum nanopillars (Pt-NPs) were deposited on QBSNs to form Pt-NPs/QBSNs heterostructures. The turn-on field of Pt-NPs/QBSNs is as low as 2.29 V/μm (corresponding current density of 1 μA/cm2), and the field enhancement factor (β-value) is significantly increased to 6067. More importantly, the uniform and continuous electrons excite light emission, due to the surrounding filed emitters from Pt-NPs/QBSNs, can be easily obtained. This approach does not require an expensive photolithographic process and possesses great potential for applications.

Keywords: Biomimetics, quasi-beehive Si, SiGe nanoislands, platinum nanopillars, field emission.

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Authors: V.Fathipour, M. A. Malakootian, S. Fathipour, M. Fathipour

Abstract:

In this paper we propose a novel RF LDMOS structure which employs a thin strained silicon layer at the top of the channel and the N-Drift region. The strain is induced by a relaxed Si0.8 Ge0.2 layer which is on top of a compositionally graded SiGe buffer. We explain the underlying physics of the device and compare the proposed device with a conventional LDMOS in terms of energy band diagram and carrier concentration. Numerical simulations of the proposed strained silicon laterally diffused MOS using a 2 dimensional device simulator indicate improvements in saturation and linear transconductance, current drivability, cut off frequency and on resistance. These improvements are however accompanied with a suppression in the break down voltage.

Keywords: High Frequency MOSFET, Design of RF LDMOS, Strained-Silicon, LDMOS.

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Authors: Robert Setekera, Luuk Tiemeijer, Ramses van der Toorn

Abstract:

In this paper an extensive verification of the extraction method (published earlier) that consistently accounts for self-heating and Early effect to accurately extract both base and thermal resistance of bipolar junction transistors is presented. The method verification is demonstrated on advanced RF SiGe HBTs were the extracted results for the thermal resistance are compared with those from another published method that ignores the effect of Early effect on internal base-emitter voltage and the extracted results of the base resistance are compared with those determined from noise measurements. A self-consistency of our method in the extracted base resistance and thermal resistance using compact model simulation results is also carried out in order to study the level of accuracy of the method.

Keywords: Avalanche, Base resistance, Bipolar transistor, Compact modeling, Early voltage, Thermal resistance, Self-heating, parameter extraction.

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Authors: Fatemeh Karimi, Morteza Fathipour, Hamdam Ghanatian, Vala Fathipour

Abstract:

In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-κ dielectric near the source and low-κ dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure.

Keywords: SNWT (silicon nanowire transistor), Tensile Strain, high-κ dielectric, Field Induced Barrier Lowering (FIBL), cylindricalnano wire (CW), drain induced barrier lowering (DIBL).

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