Search results for: Low power design.

Authors: Wenjuan Du

Abstract:

The phase compensation method was proposed based on the concept of the damping torque analysis (DTA). It is a method for the design of a PSS (power system stabilizer) to suppress local-mode power oscillations in a single-machine infinite-bus power system. This paper presents the application of the phase compensation method for the design of a PSS in a multi-machine power system. The application is achieved by examining the direct damping contribution of the stabilizer to the power oscillations. By using linearized equal area criterion, a theoretical proof to the application for the PSS design is presented. Hence PSS design in the paper is an example of stable tending control by localized method.

Keywords: Phase compensation method, power system small-signal stability, power system stabilizer.

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Authors: Itziar Marín, Eduardo Arceredillo, Aitzol Zuloaga, Jagoba Arias

Abstract:

Distributed wireless sensor network consist on several scattered nodes in a knowledge area. Those sensors have as its only power supplies a pair of batteries that must let them live up to five years without substitution. That-s why it is necessary to develop some power aware algorithms that could save battery lifetime as much as possible. In this is document, a review of power aware design for sensor nodes is presented. As example of implementations, some resources and task management, communication, topology control and routing protocols are named.

Keywords: Low Power Design, Power Awareness, RemoteSensing, Wireless Sensor Networks (WSN).

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Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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Authors: Abdalla Mohamed Eblabla

Abstract:

Due to the high increase in and demand for a wide assortment of applications that require low-cost, high-efficiency, and compact systems, RF power amplifiers are considered the most critical design blocks and power consuming components in wireless communication, TV transmission, radar, and RF heating. Therefore, much research has been carried out in order to improve the performance of power amplifiers. Classes-A, B, C, D, E and F are the main techniques for realizing power amplifiers.

An implementation of high efficiency class-F power amplifier with Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) was realized in this paper. The simulation and optimization of the class-F power amplifier circuit model was undertaken using Agilent’s Advanced Design system (ADS). The circuit was designed using lumped elements.

Keywords: Power Amplifier (PA), Gallium Nitride (GaN), Agilent’s Advanced Design system (ADS) and lumped elements.

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Authors: A. Sardi, J. Zbitou, A. Errkik, L. El Abdellaoui, A. Tajmouati, M. Latrach.

Abstract:

This paper presents analysis and design of a wideband Wilkinson power divider for wireless applications. The design is accomplished by transforming the lengths and impedances of the quarter wavelength sections of the conventional Wilkinson power divider into U-shaped sections. The designed power divider is simulated by using ADS Agilent technologies and CST microwave studio software. It is shown that the proposed power divider has simple topology and good performances in terms of insertion loss, port matching and isolation at all operating frequencies (1.8 GHz, 2.45 GHz and 3.55 GHz).

Keywords: ADS Agilent technologies, CST microwave Studio, Microstrip, Wideband, Wilkinson power divider.

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Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

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Authors: K. Echchakhaoui, E. Abdelmounim, J. Zbitou, H. Bennis, N. Ababssi, M. Latrach

Abstract:

In this paper a new design of a broadband microwave power limiter is presented and validated into simulation by using ADS software (Advanced Design System) from Agilent technologies. The final circuit is built on microstrip lines by using identical Zero Bias Schottky diodes. The power limiter is designed by Associating 3 stages Schottky diodes. The obtained simulation results permit to validate this circuit with a threshold input power level of 0 dBm until a maximum input power of 30 dBm.

Keywords: Limiter, microstrip, zero-biais.

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Authors: Renbin Dai, Rana Arslan Ali Khan

Abstract:

The design of Class A and Class AB 2-stage X band Power Amplifier is described in this report. This power amplifier is part of a transceiver used in radar for monitoring iron characteristics in a blast furnace. The circuit was designed using foundry WIN Semiconductors. The specification requires 15dB gain in the linear region, VSWR nearly 1 at input as well as at the output, an output power of 10 dBm and good stable performance in the band 10.9-12.2 GHz. The design was implemented by using inter-stage configuration, the Class A amplifier was chosen for driver stage i.e. the first amplifier focusing on the gain and the output amplifier conducted at Class AB with more emphasis on output power.

Keywords: Power amplifier, Class AB, Class A, MMIC, 2-stage, X band.

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Authors: Jingjing Lan, Jun Zhou, Xin Liu

Abstract:

In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach. 

Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.

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Authors: Ahmed Z. Gabr, Ahmed A. Helal, Hussein E. Said

Abstract:

With the incessant increase of power systems capacity and voltage grade, the safety of grounding grid becomes more and more prominent. In this paper, the designing substation grounding grid is presented by means of genetic algorithm (GA). This approach purposes to control the grounding cost of the power system with the aid of controlling grounding rod number and conductor lengths under the same safety limitations. The proposed technique is used for the design of the substation grounding grid in Khalda Petroleum Company “El-Qasr” power plant and the design was simulated by using CYMGRD software for results verification. The result of the design is highly complying with IEEE 80-2000 standard requirements.

Keywords: Genetic algorithm, optimum grounding grid design, power system analysis, power system protection, single layer model, substation.

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Authors: Pejman Hosseiniun, Rose Shayeghi, Iman Rahbari, Mohamad Reza Kalhor

Abstract:

CNFET has emerged as an alternative material to silicon for high performance, high stability and low power SRAM design in recent years. SRAM functions as cache memory in computers and many portable devices. In this paper, a new SRAM cell design based on CNFET technology is proposed. The proposed SRAM cell design for CNFET is compared with SRAM cell designs implemented with the conventional CMOS and FinFET in terms of speed, power consumption, stability, and leakage current. The HSPICE simulation and analysis show that the dynamic power consumption of the proposed 8T CNFET SRAM cell’s is reduced about 48% and the SNM is widened up to 56% compared to the conventional CMOS SRAM structure at the expense of 2% leakage power and 3% write delay increase.

Keywords: SRAM cell, CNFET, low power, HSPICE.

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Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam

Abstract:

In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.

Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.

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Authors: Sidhartha Panda, C. Ardil

Abstract:

Power system stabilizers (PSS) are now routinely used in the industry to damp out power system oscillations. In this paper, particle swarm optimization (PSO) technique is applied to coordinately design multiple power system stabilizers (PSS) in a multi-machine power system. The design problem of the proposed controllers is formulated as an optimization problem and PSO is employed to search for optimal controller parameters. By minimizing the time-domain based objective function, in which the deviation in the oscillatory rotor speed of the generator is involved; stability performance of the system is improved. The non-linear simulation results are presented for various severe disturbances and small disturbance at different locations as well as for various fault clearing sequences to show the effectiveness and robustness of the proposed controller and their ability to provide efficient damping of low frequency oscillations.

Keywords: Low frequency oscillations, Particle swarm optimization, power system stability, power system stabilizer, multimachine power system.

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Authors: Ermanu A. Hakim, Adi Soeprijanto, Mauridhi H.P

Abstract:

This paper presents PSS (Power system stabilizer) design based on optimal fuzzy PID (OFPID). OFPID based PSS design is considered for single-machine power systems. The main motivation for this design is to stabilize or to control low-frequency oscillation on power systems. Firstly, describing the linear PID control then to combine this PID control with fuzzy logic control mechanism. Finally, Fuzzy PID parameters (Kp. Kd, KI, Kupd, Kui) are tuned by Genetic Algorthm (GA) to reach optimal global stability. The effectiveness of the proposed PSS in increasing the damping of system electromechanical oscillation is demonstrated in a one-machine-infinite-bus system

Keywords: Fuzzy PID, Genetic Algorithm, power system stabilizer.

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Authors: Sidhartha Panda, N. P. Padhy

Abstract:

Power system stabilizers (PSS) are now routinely used in the industry to damp out power system oscillations. In this paper, particle swarm optimization (PSO) technique is applied to design a robust power system stabilizer (PSS). The design problem of the proposed controller is formulated as an optimization problem and PSO is employed to search for optimal controller parameters. By minimizing the time-domain based objective function, in which the deviation in the oscillatory rotor speed of the generator is involved; stability performance of the system is improved. The non-linear simulation results are presented under wide range of operating conditions; disturbances at different locations as well as for various fault clearing sequences to show the effectiveness and robustness of the proposed controller and their ability to provide efficient damping of low frequency oscillations. Further, all the simulations results are compared with a conventionally designed power system stabilizer to show the superiority of the proposed design approach.

Keywords: Particle swarm optimization, power system stabilizer, low frequency oscillations, power system stability.

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Authors: S. Abdollahi Pour, M. Saneei

Abstract:

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.

Keywords: leakage current, leakage power monitor, body biasing, low power

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Authors: Idris Elfeituri

Abstract:

In the current study, energy and exergy analysis of a 65 MW steam power plant was carried out. This study investigated the effect of variations of overall conductance of the super heater on the performance of an existing steam power plant located in Derna, Libya. The performance of the power plant was estimated by a mathematical modelling which considers the off-design operating conditions of each component. A fully interactive computer program based on the mass, energy and exergy balance equations has been developed. The maximum exergy destruction has been found in the steam generation unit. A 50% reduction in the design value of overall conductance of the super heater has been achieved, which accordingly decreases the amount of the net electrical power that would be generated by at least 13 MW, as well as the overall plant exergy efficiency by at least 6.4%, and at the same time that would cause an increase of the total exergy destruction by at least 14 MW. The achieved results showed that the super heater design and operating conditions play an important role on the thermodynamics performance and the fuel utilization of the power plant. Moreover, these considerations are very useful in the process of the decision that should be taken at the occasions of deciding whether to replace or renovate the super heater of the power plant.

Keywords: Exergy, super-heater, fouling, steam power plant, off-design.

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Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia

Abstract:

This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ∼72% PAE and output power of >39dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The loadand source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.

Keywords: Power Amplifier (PA), GaN HEMT, Class-J and Class-E, High Efficiency.

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Authors: Kyaw Myo Lin, Wunna Swe, Pyone Lai Swe

Abstract:

This paper presents the coordinated controller design of static synchronous compensator (STATCOM) and power system stabilizers (PSSs) for power system stability improvement. Coordinated design problem of STATCOM-based controller with multiple PSSs is formulated as an optimization problem and optimal controller parameters are obtained using bacteria foraging optimization algorithm. By minimizing the proposed objective function, in which the speed deviations between generators are involved; stability performance of the system is improved. The nonlinear simulation results show that coordinated design of STATCOM-based controller and PSSs improve greatly the system damping oscillations and consequently stability improvement.

Keywords: Bacteria Foraging, Coordinated Design, Power System Stability, PSSs, STATCOM.

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Authors: Jasna Dragosavac, Žarko Janda, J.V. Milanović, Dušan Arnautović

Abstract:

This paper discusses coordinated reactive power - voltage (Q-V) control in a multi machine steam power plant. The drawbacks of manual Q-V control are briefly listed, and the design requirements for coordinated Q-V controller are specified. Theoretical background and mathematical model of the new controller are presented next followed by validation of developed Matlab/Simulink model through comparison with recorded responses in real steam power plant and description of practical realisation of the controller. Finally, the performance of commissioned controller is illustrated on several examples of coordinated Q-V control in real steam power plant and compared with manual control.

Keywords: Coordinated Voltage Control, Power Plant Control, Reactive Power Control, Sensitivity Matrix

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Authors: Manisha Dubey, Aalok Dubey

Abstract:

This paper presents an approach for the design of fuzzy logic power system stabilizers using genetic algorithms. In the proposed fuzzy expert system, speed deviation and its derivative have been selected as fuzzy inputs. In this approach the parameters of the fuzzy logic controllers have been tuned using genetic algorithm. Incorporation of GA in the design of fuzzy logic power system stabilizer will add an intelligent dimension to the stabilizer and significantly reduces computational time in the design process. It is shown in this paper that the system dynamic performance can be improved significantly by incorporating a genetic-based searching mechanism. To demonstrate the robustness of the genetic based fuzzy logic power system stabilizer (GFLPSS), simulation studies on multimachine system subjected to small perturbation and three-phase fault have been carried out. Simulation results show the superiority and robustness of GA based power system stabilizer as compare to conventionally tuned controller to enhance system dynamic performance over a wide range of operating conditions.

Keywords: Dynamic stability, Fuzzy logic power systemstabilizer, Genetic Algorithms, Genetic based power systemstabilizer

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Authors: A. Hellany, M.Nagrial, M. Nassereddine, J. Rizk

Abstract:

As new challenges emerge in power electrical workplace safety, it is the responsibility of the systems designer to seek out new approaches and solutions that address them. Design decisions made today will impact cost, safety and serviceability of the installed systems for 40 or 50 years during the useful life for the owner. Studies have shown that this cost is an order of magnitude of 7 to 10 times the installed cost of the power distribution equipment. This paper reviews some aspects of earthing system design in power substation surrounded by residential houses. The electrical potential rise and split factors are discussed and a few recommendations are provided to achieve a safety voltage in the area beyond the boundary of the substation.

Keywords: EPR, Split Factor, Earthing Design

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Authors: Nasser Erfani Majd, Mojtaba Lotfizad

Abstract:

In this paper, an ultra low power and low jitter 12bit CMOS digitally controlled oscillator (DCO) design is presented. Based on a ring oscillator implemented with low power Schmitt trigger based inverters. Simulation of the proposed DCO using 32nm CMOS Predictive Transistor Model (PTM) achieves controllable frequency range of 550MHz~830MHz with a wide linearity and high resolution. Monte Carlo simulation demonstrates that the time-period jitter due to random power supply fluctuation is under 31ps and the power consumption is 0.5677mW at 750MHz with 1.2V power supply and 0.53-ps resolution. The proposed DCO has a good robustness to voltage and temperature variations and better linearity comparing to the conventional design.

Keywords: digitally controlled oscillator (DCO), low power, jitter; good linearity, robust

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Authors: Sidhartha Panda, C. Ardil

Abstract:

Power system stabilizers (PSS) are now routinely used in the industry to damp out power system oscillations. In this paper, real-coded genetic algorithm (RCGA) optimization technique is applied to design robust power system stabilizer for both singlemachine infinite-bus (SMIB) and multi-machine power system. The design problem of the proposed controller is formulated as an optimization problem and RCGA is employed to search for optimal controller parameters. By minimizing the time-domain based objective function, in which the deviation in the oscillatory rotor speed of the generator is involved; stability performance of the system is improved. The non-linear simulation results are presented under wide range of operating conditions; disturbances at different locations as well as for various fault clearing sequences to show the effectiveness and robustness of the proposed controller and their ability to provide efficient damping of low frequency oscillations.

Keywords: Particle swarm optimization, power system stabilizer, low frequency oscillations, power system stability.

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Authors: Kayun Chantarasathaporn, Chonawat Srisa-an

Abstract:

Design Patterns have gained more and more acceptances since their emerging in software development world last decade and become another de facto standard of essential knowledge for Object-Oriented Programming developers nowadays. Their target usage, from the beginning, was for regular computers, so, minimizing power consumption had never been a concern. However, in this decade, demands of more complicated software for running on mobile devices has grown rapidly as the much higher performance portable gadgets have been supplied to the market continuously. To get along with time to market that is business reason, the section of software development for power conscious, battery, devices has shifted itself from using specific low-level languages to higher level ones. Currently, complicated software running on mobile devices are often developed by high level languages those support OOP concepts. These cause the trend of embracing Design Patterns to mobile world. However, using Design Patterns directly in software development for power conscious systems is not recommended because they were not originally designed for such environment. This paper demonstrates the adapted Design Pattern for power limitation system. Because there are numerous original design patterns, it is not possible to mention the whole at once. So, this paper focuses only in creating Energy Conscious version of existing regular "Builder Pattern" to be appropriated for developing low power consumption software.

Keywords: Design Patterns, Builder Pattern, Low Power Consumption, Object Oriented Programming, Power Conscious System, Software.

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Authors: Hasmayadi Abdul Majid, Rohana Musa

Abstract:

This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIMOS’s 0.35 µm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and SAR digital logic to create 10 effective bits while consuming less than 7.8 mW with a 3.3 V power supply.

Keywords: Successive Approximation Register Analog-to- Digital Converter, SAR ADC, Resistive DAC.

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Authors: A.Gjukaj, G.Kabashi, G.Pula, N.Avdiu, B.Prebreza

Abstract:

This paper discusses aspects of re-design of loadshedding schemes with respect to actual developments in the Kosovo power system. Load-shedding is a type of emergency control that is designed to ensure system stability by reducing power system load to match the power generation supply. This paper presents a new adaptive load-shedding scheme that provides emergency protection against excess frequency decline, in cases when the Kosovo power system might be disconnected from the regional transmission network. The proposed load-shedding scheme uses the local frequency rate information to adapt the load-shedding pattern to suit the size and location of the occurring disturbance. The proposed scheme is tested in a software simulation on a large scale PSS/E model which represents nine power system areas of Southeast Europe including the Kosovo power system.

Keywords: About Load Shedding, Power System Transient, PSS/E Dynamic Simulation, Under-frequency Protection

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Authors: Z. Dibi, F. Djeffal, N. Lakhdar

Abstract:

In this paper, we have developed an explicit analytical drain current model comprising surface channel potential and threshold voltage in order to explain the advantages of the proposed Gate Stack Double Diffusion (GSDD) MOSFET design over the conventional MOSFET with the same geometric specifications that allow us to use the benefits of the incorporation of the high-k layer between the oxide layer and gate metal aspect on the immunity of the proposed design against the self-heating effects. In order to show the efficiency of our proposed structure, we propose the simulation of the power chopper circuit. The use of the proposed structure to design a power chopper circuit has showed that the (GSDD) MOSFET can improve the working of the circuit in terms of power dissipation and self-heating effect immunity. The results so obtained are in close proximity with the 2D simulated results thus confirming the validity of the proposed model.

Keywords: Double-Diffusion, modeling, MOSFET, power.

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Authors: Sidhartha Panda, Narayana Prasad Padhy

Abstract:

This paper presents a systematic procedure for modelling and simulation of a power system installed with a power system stabilizer (PSS) and a flexible ac transmission system (FACTS)-based controller. For the design purpose, the model of example power system which is a single-machine infinite-bus power system installed with the proposed controllers is developed in MATLAB/SIMULINK. In the developed model synchronous generator is represented by model 1.1. which includes both the generator main field winding and the damper winding in q-axis so as to evaluate the impact of PSS and FACTS-based controller on power system stability. The model can be can be used for teaching the power system stability phenomena, and also for research works especially to develop generator controllers using advanced technologies. Further, to avoid adverse interactions, PSS and FACTS-based controller are simultaneously designed employing genetic algorithm (GA). The non-linear simulation results are presented for the example power system under various disturbance conditions to validate the effectiveness of the proposed modelling and simultaneous design approach.

Keywords: Genetic algorithm, modelling and simulation, MATLAB/SIMULINK, power system stabilizer, thyristor controlledseries compensator, simultaneous design, power system stability.

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Authors: MooSeop Kim, Juhan Kim, Yongje Choi

Abstract:

Recently, much research has been conducted for security for wireless sensor networks and ubiquitous computing. Security issues such as authentication and data integrity are major requirements to construct sensor network systems. Advanced Encryption Standard (AES) is considered as one of candidate algorithms for data encryption in wireless sensor networks. In this paper, we will present the hardware architecture to implement low power AES crypto module. Our low power AES crypto module has optimized architecture of data encryption unit and key schedule unit which could be applicable to wireless sensor networks. We also details low power design methods used to design our low power AES crypto module.

Keywords: Algorithm, Low Power Crypto Circuit, AES, Security.

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