Search results for: Complementarypass-transistor logic
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 550

Search results for: Complementarypass-transistor logic

550 LOWL: Logic and OWL, an Extension

Authors: M. Mohsenzadeh, F. Shams, M. Teshnehlab

Abstract:

Current research on semantic web aims at making intelligent web pages meaningful for machines. In this way, ontology plays a primary role. We believe that logic can help ontology languages (such as OWL) to be more fluent and efficient. In this paper we try to combine logic with OWL to reduce some disadvantages of this language. Therefore we extend OWL by logic and also show how logic can satisfy our future expectations of an ontology language.

Keywords: Logical Programming, OWL, Language Extension.

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549 Analysis of Effect of Pre-Logic Factoring on Cell Based Combinatorial Logic Synthesis

Authors: Padmanabhan Balasubramanian, Bashetty Raghavendra

Abstract:

In this paper, an analysis is presented, which demonstrates the effect pre-logic factoring could have on an automated combinational logic synthesis process succeeding it. The impact of pre-logic factoring for some arbitrary combinatorial circuits synthesized within a FPGA based logic design environment has been analyzed previously. This paper explores a similar effect, but with the non-regenerative logic synthesized using elements of a commercial standard cell library. On an overall basis, the results obtained pertaining to the analysis on a variety of MCNC/IWLS combinational logic benchmark circuits indicate that pre-logic factoring has the potential to facilitate simultaneous power, delay and area optimized synthesis solutions in many cases.

Keywords: Algebraic factoring, Combinational logic synthesis, Standard cells, Low power, Delay optimization, Area reduction.

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548 Development of Logic Model for R&D Program Plan Analysis in Preliminary Feasibility Study

Authors: Hyun-Kyu Kang

Abstract:

The Korean Government has applied the preliminary feasibility study to new government R&D program plans as a part of an evaluation system for R&D programs. The preliminary feasibility study for the R&D program is composed of 3 major criteria such as technological, policy and economic analysis. The program logic model approach is used as a part of the technological analysis in the preliminary feasibility study. We has developed and improved the R&D program logic model. The logic model is a very useful tool for evaluating R&D program plans. Using a logic model, we can generally identify important factors of the R&D program plan, analyze its logic flow and find the disconnection or jump in the logic flow among components of the logic model.

Keywords: Preliminary feasibility study, R&D program logic model, technological analysis.

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547 Fuzzy Logic PID Control of Automatic Voltage Regulator System

Authors: Aye Aye Mon

Abstract:

The application of a simple microcontroller to deal with a three variable input and a single output fuzzy logic controller, with Proportional – Integral – Derivative (PID) response control built-in has been tested for an automatic voltage regulator. The fuzzifiers are based on fixed range of the variables of output voltage. The control output is used to control the wiper motor of the auto transformer to adjust the voltage, using fuzzy logic principles, so that the voltage is stabilized. In this report, the author will demonstrate how fuzzy logic might provide elegant and efficient solutions in the design of multivariable control based on experimental results rather than on mathematical models.

Keywords: Fuzzy logic system, PID Controller, control systems, controlled A V R

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546 A Reversible CMOS AD / DA Converter Implemented with Pseudo Floating-Gate

Authors: Omid Mirmotahari, Yngvar Berg, Ahmad Habibizad Navin

Abstract:

Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.

Keywords: Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).

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545 A Intelligent Inference Model about Complex Systems- Stability: Inspiration from Nature

Authors: Naiqin Feng, Yuhui Qiu, Yingshan Zhang, Fang Wang

Abstract:

A logic model for analyzing complex systems- stability is very useful to many areas of sciences. In the real world, we are enlightened from some natural phenomena such as “biosphere", “food chain", “ecological balance" etc. By research and practice, and taking advantage of the orthogonality and symmetry defined by the theory of multilateral matrices, we put forward a logic analysis model of stability of complex systems with three relations, and prove it by means of mathematics. This logic model is usually successful in analyzing stability of a complex system. The structure of the logic model is not only clear and simple, but also can be easily used to research and solve many stability problems of complex systems. As an application, some examples are given.

Keywords: Complex system, logic model, relation, stability.

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544 Improving Ride Comfort of a Bus Using Fuzzy Logic Controlled Suspension

Authors: Mujde Turkkan, Nurkan Yagiz

Abstract:

In this study an active controller is presented for vibration suppression of a full-bus model. The bus is modeled having seven degrees of freedom. Using the achieved model via Lagrange Equations the system equations of motion are derived. The suspensions of the bus model include air springs with two auxiliary chambers are used. Fuzzy logic controller is used to improve the ride comfort. The numerical results, verifies that the presented fuzzy logic controller improves the ride comfort.

Keywords: Ride comfort, air spring, bus, fuzzy logic controller.

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543 Maximum Power Point Tracking Using FLC Tuned with GA

Authors: Mohamed Amine Haraoubia, Abdelaziz Hamzaoui, Najib Essounbouli

Abstract:

The pursuit of the MPPT has led to the development of many kinds of controllers, one of which is the Fuzzy Logic controller, which has proven its worth. To further tune this controller this paper will discuss and analyze the use of Genetic Algorithms to tune the Fuzzy Logic Controller. It will provide an introduction to both systems, and test their compatibility and performance.

Keywords: Fuzzy logic controller (FLC), fuzzy logic (FL), genetic algorithm (GA), maximum power point (MPP), maximum power point tracking (MPPT).

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542 Design and Testing of Nanotechnology Based Sequential Circuits Using MX-CQCA Logic in VHDL

Authors: K. Maria Agnes, J. Joshua Bapu

Abstract:

This paper impart the design and testing of Nanotechnology based sequential circuits using multiplexer conservative QCA (MX-CQCA) logic gates, which is easily testable using only two vectors. This method has great prospective in the design of sequential circuits based on reversible conservative logic gates and also smashes the sequential circuits implemented in traditional gates in terms of testability. Reversible circuits are similar to usual logic circuits except that they are built from reversible gates. Designs of multiplexer conservative QCA logic based two vectors testable double edge triggered (DET) sequential circuits in VHDL language are also accessible here; it will also diminish intricacy in testing side. Also other types of sequential circuits such as D, SR, JK latches are designed using this MX-CQCA logic gate. The objective behind the proposed design methodologies is to amalgamate arithmetic and logic functional units optimizing key metrics such as garbage outputs, delay, area and power. The projected MX-CQCA gate outshines other reversible gates in terms of the intricacy, delay.

Keywords: Conservative logic, Double edge triggered (DET) flip flop, majority voters, MX-CQCA gate, reversible logic, Quantum dot Cellular automata.

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541 Logic Program for Authorizations

Authors: Yun Bai

Abstract:

As a security mechanism, authorization is to provide access control to the system resources according to the polices and rules specified by the security strategies. Either by update or in the initial specification, conflicts in authorization is an issue needs to be solved. In this paper, we propose a new approach to solve conflict by using prioritized logic programs and discuss the uniqueness of its answer set. Addressing conflict resolution from logic programming viewpoint and the uniqueness analysis of the answer set provide a novel, efficient approach for authorization conflict resolution.

Keywords: authorization, formal specification, conflict resolution, prioritized logic program.

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540 Prediction of Compressive Strength of Self- Compacting Concrete with Fuzzy Logic

Authors: Paratibha Aggarwal, Yogesh Aggarwal

Abstract:

The paper presents the potential of fuzzy logic (FL-I) and neural network techniques (ANN-I) for predicting the compressive strength, for SCC mixtures. Six input parameters that is contents of cement, sand, coarse aggregate, fly ash, superplasticizer percentage and water-to-binder ratio and an output parameter i.e. 28- day compressive strength for ANN-I and FL-I are used for modeling. The fuzzy logic model showed better performance than neural network model.

Keywords: Self compacting concrete, compressive strength, prediction, neural network, Fuzzy logic.

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539 Representation of Coloured Petri Net in Abductive Logic Programming (CPN-LP) and Its Application in Modeling an Intelligent Agent

Authors: T. H. Fung

Abstract:

Coloured Petri net (CPN) has been widely adopted in various areas in Computer Science, including protocol specification, performance evaluation, distributed systems and coordination in multi-agent systems. It provides a graphical representation of a system and has a strong mathematical foundation for proving various properties. This paper proposes a novel representation of a coloured Petri net using an extension of logic programming called abductive logic programming (ALP), which is purely based on classical logic. Under such a representation, an implementation of a CPN could be directly obtained, in which every inference step could be treated as a kind of equivalence preserved transformation. We would describe how to implement a CPN under such a representation using common meta-programming techniques in Prolog. We call our framework CPN-LP and illustrate its applications in modeling an intelligent agent.

Keywords: Abduction, coloured petri net, intelligent agent, logic programming.

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538 Specifying Strict Serializability of Iterated Transactions in Propositional Temporal Logic

Authors: Walter Hussak

Abstract:

We present an operator for a propositional linear temporal logic over infinite schedules of iterated transactions, which, when applied to a formula, asserts that any schedule satisfying the formula is serializable. The resulting logic is suitable for specifying and verifying consistency properties of concurrent transaction management systems, that can be defined in terms of serializability, as well as other general safety and liveness properties. A strict form of serializability is used requiring that, whenever the read and write steps of a transaction occurrence precede the read and write steps of another transaction occurrence in a schedule, the first transaction must precede the second transaction in an equivalent serial schedule. This work improves on previous work in providing a propositional temporal logic with a serializability operator that is of the same PSPACE complete computational complexity as standard propositional linear temporal logic without a serializability operator.

Keywords: Temporal logic, iterated transactions, serializability.

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537 An Improved Transfer Logic of the Two-Path Algorithm for Acoustic Echo Cancellation

Authors: Chang Liu, Zishu He

Abstract:

Adaptive echo cancellers with two-path algorithm are applied to avoid the false adaptation during the double-talk situation. In the two-path algorithm, several transfer logic solutions have been proposed to control the filter update. This paper presents an improved transfer logic solution. It improves the convergence speed of the two-path algorithm, and allows the reduction of the memory elements and computational complexity. Results of simulations show the improved performance of the proposed solution.

Keywords: Acoustic echo cancellation, Echo return lossenhancement (ERLE), Two-path algorithm, Transfer logic

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536 CBCTL: A Reasoning System of TemporalEpistemic Logic with Communication Channel

Authors: Suguru Yoshioka, Satoshi Tojo

Abstract:

This paper introduces a temporal epistemic logic CBCTL that updates agent-s belief states through communications in them, based on computational tree logic (CTL). In practical environments, communication channels between agents may not be secure, and in bad cases agents might suffer blackouts. In this study, we provide inform* protocol based on ACL of FIPA, and declare the presence of secure channels between two agents, dependent on time. Thus, the belief state of each agent is updated along with the progress of time. We show a prover, that is a reasoning system for a given formula in a given a situation of an agent ; if it is directly provable or if it could be validated through the chains of communications, the system returns the proof.

Keywords: communication channel, computational tree logic, reasoning system, temporal epistemic logic.

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535 Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology

Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

Abstract:

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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534 Synthesis of Logic Circuits Using Fractional-Order Dynamic Fitness Functions

Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits

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533 Power-Efficient AND-EXOR-INV Based Realization of Achilles' heel Logic Functions

Authors: Padmanabhan Balasubramanian, R. Chinnadurai

Abstract:

This paper deals with a power-conscious ANDEXOR- Inverter type logic implementation for a complex class of Boolean functions, namely Achilles- heel functions. Different variants of the above function class have been considered viz. positive, negative and pure horn for analysis and simulation purposes. The proposed realization is compared with the decomposed implementation corresponding to an existing standard AND-EXOR logic minimizer; both result in Boolean networks with good testability attribute. It could be noted that an AND-OR-EXOR type logic network does not exist for the positive phase of this unique class of logic function. Experimental results report significant savings in all the power consumption components for designs based on standard cells pertaining to a 130nm UMC CMOS process The simulations have been extended to validate the savings across all three library corners (typical, best and worst case specifications).

Keywords: Achilles' heel functions, AND-EXOR-Inverter logic, CMOS technology, low power design.

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532 Towards an Automatic Translation of Colored Petri Nets to Maude Language

Authors: Noura Boudiaf, Abdelhamid Djebbar

Abstract:

Colored Petri Nets (CPN) are very known kind of high level Petri nets. With sound and complete semantics, rewriting logic is one of very powerful logics in description and verification of non-deterministic concurrent systems. Recently, CPN semantics are defined in terms of rewriting logic, allowing us to built models by formal reasoning. In this paper, we propose an automatic translation of CPN to the rewriting logic language Maude. This tool allows graphical editing and simulating CPN. The tool allows the user drawing a CPN graphically and automatic translating the graphical representation of the drawn CPN to Maude specification. Then, Maude language is used to perform the simulation of the resulted Maude specification. It is the first rewriting logic based environment for this category of Petri Nets.

Keywords: Colored Petri Nets, Rewriting Logic, Maude, Graphical Edition, Automatic Translation, Simulation.

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531 A Logic Approach to Database Dynamic Updating

Authors: Daniel Stamate

Abstract:

We introduce a logic-based framework for database updating under constraints. In our framework, the constraints are represented as an instantiated extended logic program. When performing an update, database consistency may be violated. We provide an approach of maintaining database consistency, and study the conditions under which the maintenance process is deterministic. We show that the complexity of the computations and decision problems presented in our framework is in each case polynomial time.

Keywords: Databases, knowledge bases, constraints, updates, minimal change, consistency.

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530 Fuzzy-Genetic Optimal Control for Four Degreeof Freedom Robotic Arm Movement

Authors: V. K. Banga, R. Kumar, Y. Singh

Abstract:

In this paper, we present optimal control for movement and trajectory planning for four degrees-of-freedom robot using Fuzzy Logic (FL) and Genetic Algorithms (GAs). We have evaluated using Fuzzy Logic (FL) and Genetic Algorithms (GAs) for four degree-of-freedom (4 DOF) robotics arm, Uncertainties like; Movement, Friction and Settling Time in robotic arm movement have been compensated using Fuzzy logic and Genetic Algorithms. The development of a fuzzy genetic optimization algorithm is presented and discussed. The result are compared only GA and Fuzzy GA. This paper describes genetic algorithms, which is designed to optimize robot movement and trajectory. Though the model represents is a general model for redundant structures and could represent any n-link structures. The result is a complete trajectory planning with Fuzzy logic and Genetic algorithms demonstrating the flexibility of this technique of artificial intelligence.

Keywords: Inverse kinematics, Genetic algorithms (GAs), Fuzzy logic (FL), Trajectory planning.

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529 Chose the Right Mutation Rate for Better Evolve Combinational Logic Circuits

Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

Evolvable hardware (EHW) is a developing field that applies evolutionary algorithm (EA) to automatically design circuits, antennas, robot controllers etc. A lot of research has been done in this area and several different EAs have been introduced to tackle numerous problems, as scalability, evolvability etc. However every time a specific EA is chosen for solving a particular task, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade the selection of the right parameters for the EA-s components for solving different “test-problems" has been investigated. In this paper the behaviour of mutation rate for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies the number of inputs of each logic gates, the functionality (for example from AND to NOR) and the connectivity between logic gates. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates for the evolved circuits. The experimental results found provide the behaviour of the mutation rate during evolution for the design and optimization of simple logic circuits. The experimental results propose the best mutation rate to be used for designing combinational logic circuits. The research presented is particular important for those who would like to implement a dynamic mutation rate inside the evolutionary algorithm for evolving digital circuits. The researches on the mutation rate during the last 40 years are also summarized.

Keywords: Design of logic circuit, evolutionary computation, evolvable hardware, mutation rate.

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528 LabVIEW with Fuzzy Logic Controller Simulation Panel for Condition Monitoring of Oil and Dry Type Transformer

Authors: N. A. Muhamad, S.A.M. Ali

Abstract:

Condition monitoring of electrical power equipment has attracted considerable attention for many years. The aim of this paper is to use Labview with Fuzzy Logic controller to build a simulation system to diagnose transformer faults and monitor its condition. The front panel of the system was designed using LabVIEW to enable computer to act as customer-designed instrument. The dissolved gas-in-oil analysis (DGA) method was used as technique for oil type transformer diagnosis; meanwhile terminal voltages and currents analysis method was used for dry type transformer. Fuzzy Logic was used as expert system that assesses all information keyed in at the front panel to diagnose and predict the condition of the transformer. The outcome of the Fuzzy Logic interpretation will be displayed at front panel of LabVIEW to show the user the conditions of the transformer at any time.

Keywords: LabVIEW, Fuzzy Logic, condition monitoring, oiltransformer, dry transformer, DGA, terminal values.

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527 Fuzzy Logic Based Coordinated Voltage Control for Distribution Network with Distributed Generations

Authors: T. Juhana Hashim, A. Mohamed

Abstract:

This paper discusses the implementation of a fuzzy logic based coordinated voltage control for a distribution system connected with distributed generations (DGs). The connection of DGs has created a challenge for the distribution network operators to keep the voltage in the system within its acceptable limits. Intelligent centralized or coordinated voltage control schemes have proven to be more reliable due to its ability to provide more control and coordination with the communication with other network devices. In this work, voltage control using fuzzy logic by coordinating three methods of control, power factor control, on load tap changer and generation curtailment is implemented on a distribution network test system. The results show that the fuzzy logic based coordination is able to keep the voltage within its allowable limits. 

Keywords: Coordinated control, Distributed generation, Fuzzy logic, Voltage control.

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526 A New Intelligent Strategy to Integrated Control of AFS/DYC Based on Fuzzy Logic

Authors: R. Karbalaei, A. Ghaffari, R. Kazemi, S. H. Tabatabaei

Abstract:

An integrated vehicle dynamics control system is developed in this paper by a combination of active front steering (AFS) and direct yaw-moment control (DYC) based on fuzzy logic control. The control system has a hierarchical structure consisting of two layers. A fuzzy logic controller is used in the upper layer (yaw rate controller) to keep the yaw rate in its desired value. The yaw rate error and its rate of change are applied to the upper controlling layer as inputs, where the direct yaw moment control signal and the steering angle correction of the front wheels are the outputs. In the lower layer (fuzzy integrator), a fuzzy logic controller is designed based on the working region of the lateral tire forces. Depending on the directions of the lateral forces at the front wheels, a switching function is activated to adjust the scaling factor of the fuzzy logic controller. Using a nonlinear seven degrees of freedom vehicle model, the simulation results illustrate considerable improvements which are achieved in vehicle handling through the integrated AFS/DYC control system in comparison with the individual AFS or DYC controllers.

Keywords: Intelligent strategy, integrated control, fuzzy logic, AFS/DYC.

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525 A Soft Error Rates Evaluation Method of Combinational Logic Circuit Based on Linear Energy Transfers

Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of combinational logic circuit. The existing research on soft error rates (SER) of combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rates evaluation method based on LET. In this paper, we analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on LET. Based on this model, the error rate of test circuit ISCAS’85 is calculated. Experimental results show that this model can be used for SER evaluation.

Keywords: Communication satellite, pulse width, soft error rates, linear energy transfer, LET.

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524 On The Comparison of Fuzzy Logic and State Space Averaging based Sliding Control Methods Applied onan Arc Welding Machine

Authors: İres İskender, Ahmet Karaarslan

Abstract:

In this study, the performance of a high-frequency arc welding machine including a two-switch inverter is analyzed. The control of the system is achieved using two different control techniques i- fuzzy logic control (FLC) ii- state space averaging based sliding control. Fuzzy logic control does not need accurate mathematical model of a plant and can be used in nonlinear applications. The second method needs the mathematical model of the system. In this method the state space equations of the system are derived for two different “on" and “off" states of the switches. The derived state equations are combined with the sliding control rule considering the duty-cycle of the converter. The performance of the system is analyzed by simulating the system using SIMULINK tool box of MATLAB. The simulation results show that fuzzy logic controller is more robust and less sensitive to parameter variations.

Keywords: Fuzzy logic, arc welding, sliding state space control, PWM, current control.

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523 Predictive Fuzzy Logic Controller for Agile Micro-Satellite

Authors: A. Bellar, M.K. Fellah, A.M. Si Mohammed, M. Bensaada, L. Boukhris

Abstract:

This paper presents the use of the predictive fuzzy logic controller (PFLC) applied to attitude control system for agile micro-satellite. In order to reduce the effect of unpredictable time delays and large uncertainties, the algorithm employs predictive control to predict the attitude of the satellite. Comparison of the PFLC and conventional fuzzy logic controller (FLC) is presented to evaluate the performance of the control system during attitude maneuver. The two proposed models have been analyzed with the same level of noise and external disturbances. Simulation results demonstrated the feasibility and advantages of the PFLC on the attitude determination and control system (ADCS) of agile satellite.

Keywords: Agile micro-satellite, Attitude control, fuzzy logic, predictive control

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522 Rule-Based Fuzzy Logic Controller with Adaptable Reference

Authors: Sheroz Khan, I. Adam, A. H. M. Zahirul Alam, Mohd Rafiqul Islam, Othman O. Khalifa

Abstract:

This paper attempts to model and design a simple fuzzy logic controller with Variable Reference. The Variable Reference (VR) is featured as an adaptability element which is obtained from two known variables – desired system-input and actual system-output. A simple fuzzy rule-based technique is simulated to show how the actual system-input is gradually tuned in to a value that closely matches the desired input. The designed controller is implemented and verified on a simple heater which is controlled by PIC Microcontroller harnessed by a code developed in embedded C. The output response of the PIC-controlled heater is analyzed and compared to the performances by conventional fuzzy logic controllers. The novelty of this work lies in the fact that it gives better performance by using less number of rules compared to conventional fuzzy logic controllers.

Keywords: Fuzzy logic controller, Variable reference, Adaptability, Rule-based.

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521 Feasibility of the Evolutionary Algorithm using Different Behaviours of the Mutation Rate to Design Simple Digital Logic Circuits

Authors: Konstantin Movsovic, Emanuele Stomeo, Tatiana Kalganova

Abstract:

The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits.

Keywords: Evolvable hardware, evolutionary algorithm, digitallogic circuit, mutation rate.

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