Search results for: 3D microfluidic chip

Authors: Reza Hadjiaghaie Vafaie, Aysan Madanpasandi, Behrooz Zare Desari, Seyedmohammad Mousavi

Abstract:

High lamination in microchannel is one of the main challenges in on-chip components like micro total analyzer systems and lab-on-a-chips. Electro-osmotic force is highly effective in chip-scale. This research proposes a microfluidic-based micropump for low ionic strength solutions. Narrow microchannels are designed to generate an efficient electroosmotic flow near the walls. Microelectrodes are embedded in the lateral sides and actuated by low electric potential to generate pumping effect inside the channel. Based on the simulation study, the fluid velocity increases by increasing the electric potential amplitude. We achieve a net flow velocity of 100 µm/s, by applying +/- 2 V to the electrode structures. Our proposed low voltage design is of interest in conventional lab-on-a-chip applications.

Keywords: Integration, electrokinetic, on-chip, fluid pumping, microfluidic.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 798

Authors: T. Brettschneider, C. Dorrer, H. Suy, T. Braun, E. Jung, R. Hoofman, M. Bründel, R. Zengerle, F. Lärmer

Abstract:

We present an integration approach of a CMOS biosensor into a polymer based microfluidic environment suitable for mass production. It consists of a wafer-level-package for the silicon die and laser bonding process promoted by an intermediate hot melt foil to attach the sensor package to the microfluidic chip, without the need for dispensing of glues or underfiller. A very good condition of the sensing area was obtained after introducing a protection layer during packaging. A microfluidic flow cell was fabricated and shown to withstand pressures up to Δp = 780 kPa without leakage. The employed biosensors were electrically characterized in a dry environment.

Keywords: CMOS biosensor, laser bonding, silicon polymer integration, wafer level packaging.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2980

Authors: Virendra J. Majarikar, Harikrishnan N. Unni

Abstract:

This paper sets to demonstrate a modeling of electrokinetic mixing employing electroosmotic stationary and time-dependent microchannel using alternate zeta patches on the lower surface of the micromixer in a lab on chip microfluidic device. Electroosmotic flow is amplified using different 2D and 3D model designs with alternate and geometric zeta potential values such as 25, 50, and 100 mV, respectively, to achieve high concentration mixing in the electrokinetically-driven microfluidic system. The enhancement of electrokinetic mixing is studied using Finite Element Modeling, and simulation workflow is accomplished with defined integral steps. It can be observed that the presence of alternate zeta patches can help inducing microvortex flows inside the channel, which in turn can improve mixing efficiency. Fluid flow and concentration fields are simulated by solving Navier-Stokes equation (implying Helmholtz-Smoluchowski slip velocity boundary condition) and Convection-Diffusion equation. The effect of the magnitude of zeta potential, the number of alternate zeta patches, etc. are analysed thoroughly. 2D simulation reveals that there is a cumulative increase in concentration mixing, whereas 3D simulation differs slightly with low zeta potential as that of the 2D model within the T-shaped micromixer for concentration 1 mol/m³ and 0 mol/m³, respectively. Moreover, 2D model results were compared with those of 3D to indicate the importance of the 3D model in a microfluidic design process.

Keywords: COMSOL, electrokinetic, electroosmotic, microfluidics, zeta potential.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1152

Authors: Shigenori Togashi, Yukako Asano

Abstract:

We developed an effective microfluidic device for photoreactions with low reflectance and good heat conductance. The performance of this microfluidic device was tested by carrying out a photoreactive synthesis of benzopinacol and acetone from benzophenone and 2-propanol. The yield reached 36% with an irradiation time of 469.2 s and was improved by more than 30% when compared to the values obtained by the batch method. Therefore, the microfluidic device was found to be effective for improving the yields of photoreactions.

Keywords: Microfluidic device, Photoreaction, Benzophenone, Black Aluminum Oxide, Detection, Yield Improvement.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1780

Authors: Muthana Saleh Alalaki, Michael Opoku Agyeman

Abstract:

The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.

Keywords: Network-on-Chip, System-on-Chip, embedded systems, computer architecture.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1401

Authors: A. Zahra, G. de Cesare, D. Caputo, A. Nascetti

Abstract:

PDMS (Polydimethylsiloxane) polymer is a suitable material for biological and MEMS (Microelectromechanical systems) designers, because of its biocompatibility, transparency and high resistance under plasma treatment. PDMS round channel is always been of great interest due to its ability to confine the liquid with membrane type micro valves. In this paper we are presenting a very simple way to form round shapemicrofluidic channel, which is based on reflow of positive photoresist AZ® 40 XT. With this method, it is possible to obtain channel of different height simply by varying the spin coating parameters of photoresist.

Keywords: Lab-on-Chip, PDMS, Reflow, Round microfluidic channel.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2955

Authors: Jae Young Park, Soongyu Kwon, Kyu Han Kim, Hyeong Geon Lee, Jong Tae Kim

Abstract:

This paper considers the problem of finding low cost chip set for a minimum cost partitioning of a large logic circuits. Chip sets are selected from a given library. Each chip in the library has a different price, area, and I/O pin. We propose a low cost chip set selection algorithm. Inputs to the algorithm are a netlist and a chip information in the library. Output is a list of chip sets satisfied with area and maximum partitioning number and it is sorted by cost. The algorithm finds the sorted list of chip sets from minimum cost to maximum cost. We used MCNC benchmark circuits for experiments. The experimental results show that all of chip sets found satisfy the multiple partitioning constraints.

Keywords: lowest cost chip set, MCNC benchmark, multi-way partitioning.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1460

Authors: Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen

Abstract:

With the increasing number of on-chip components and the critical requirement for processing power, Chip Multiprocessor (CMP) has gained wide acceptance in both academia and industry during the last decade. However, the conventional bus-based onchip communication schemes suffer from very high communication delay and low scalability in large scale systems. Network-on-Chip (NoC) has been proposed to solve the bottleneck of parallel onchip communications by applying different network topologies which separate the communication phase from the computation phase. Observing that the memory bandwidth of the communication between on-chip components and off-chip memory has become a critical problem even in NoC based systems, in this paper, we propose a novel 3D NoC with on-chip Dynamic Random Access Memory (DRAM) in which different layers are dedicated to different functionalities such as processors, cache or memory. Results show that, by using our proposed architecture, average link utilization has reduced by 10.25% for SPLASH-2 workloads. Our proposed design costs 1.12% less execution cycles than the traditional design on average.

Keywords: 3D integration, network-on-chip, memory-on-chip, DRAM, chip multiprocessor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2386

Authors: Rohaya Abdul Wahab, Raja Mohd Fuad Tengku Aziz, Nazaliza Othman, Sharifah Saleh, Nabihah Razali, Rozaimah Baharim, Md Hanif Md Nasir

Abstract:

This paper will discuss flip chip methodology, in which I/O pads, standard cells, macros and bump cells array are placed in the floorplan, then routed using Astro place and route tool. Final DRC and LVS checking is done using Calibre verification tool. The design vehicle to run this methodology is an OpenRISC design targeted to Silterra 0.18 micrometer technology with 6 metal layers for routing. Astro has extensive support for flip chip placement and routing. Astro tool commands for flip chip are straightforward approach like the conventional standard wire bond packaging. However since we do not have flip chip commands in our Astro tool, no LEF file for bump cell and no LEF file for flip chip I/O pad, we create our own methodology to prepare for future flip chip tapeout. 

Keywords: Astro, bump cell, Calibre, flip chip, LEF, methodology, SCHEME, TCL.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2709

Authors: Ehsan Yazdanpanah Moghadam, Muthukumaran Packirisamy

Abstract:

In the present study, a design of the suspended polymeric microfluidic platform is introduced that is fabricated with three polymeric layers. Changing the microchannel plane to be perpendicular to microcantilever plane, drastically decreases moment of inertia in that direction. In addition, the platform is made of polymer (around five orders of magnitude less compared to silicon). It causes significant increase in the sensitivity of the cantilever deflection. Next, although the dimensions of this platform are constant, by misaligning the embedded microchannels laterally in the suspended microfluidic platform, the sensitivity can be highly increased. The investigation is studied on four fluids including water, seawater, milk, and blood for flow ranges from low rate of 5 to 70 µl/min to obtain the best design with the highest sensitivity. The best design in this study shows the sensitivity increases around 50% for water, seawater, milk, and blood at the flow rate of 70 µl/min by just misaligning the embedded microchannels in the suspended polymeric microfluidic platform.

Keywords: Microfluidic, biosensor, MEMS.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 831

Authors: Shigenori Togashi, Erika Katayama, Mitsuhiro Matsuzawa

Abstract:

We have developed a microfluidic device system for the continuous producting of nanoparticles, and we have clarified the relationship between the mixing performance of reactors and the particle size. First, we evaluated the mixing performance of reactors by carring out the Villermaux–Dushman reaction and determined the experimental conditions for producing AgCl nanoparticles. Next, we produced AgCl nanoparticles and evaluated the mixing performance and the particle size. We found that as the mixing performance improves the size of produced particles decreases and the particle size distribution becomes sharper. We produced AgCl nanoparticles with a size of 86 nm using the microfluidic device that had the best mixing performance among the three reactors we tested in this study; the coefficient of variation (Cv) of the size distribution of the produced nanoparticles was 26.1%.

Keywords: Microfluidic, Mixing, Nanoparticle, Silver Chloride.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2556

Authors: V.Sivaraman, S. Sankaran, L. Vijayaraghavan

Abstract:

Machining through turning was carried out in a lathe to study the chip formation of Multiphase Ferrite (F-B-M) microalloyed steel. Taguchi orthogonal array was employed to perform the machining. Continuous and discontinuous chips were formed for different cutting parameters like speed, feed and depth of cut. Optical and scanning electron microscope was employed to identify the chip morphology.

Keywords: Multiphase microalloyed steel, chip formation, Taguchi technique, turning, cutting parameters

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1598

Authors: Haiyi Zhang, Jianli Guo, Daqian Yang

Abstract:

This Classifying Bird Sounds (chip notes) project-s purpose is to reduce the unwanted noise from recorded bird sound chip notes, design a scheme to detect differences and similarities between recorded chip notes, and classify bird sound chip notes. The technologies of determining the similarities of sound waves have been used in communication, sound engineering and wireless sound applications for many years. Our research is focused on the similarity of chip notes, which are the sounds from different birds. The program we use is generated by Microsoft Cµ.

Keywords: Classify Bird Sounds, Noise Filter, High-pass, Lowpass, Band-pass, Band-stop Filter, FIR.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1204

Authors: Ziaddin Daie Koozekanani, Mina Zolfy Lighvan

Abstract:

One of the most challengeable issues in ESL (Electronic System Level) design is the lack of a general modeling scheme for on chip communication architecture. In this paper some of the mostly used methodologies for modeling and representation of on chip communication are investigated. Our goal is studying the existing methods to extract the requirements of a general representation scheme for communication architecture synthesis. The next step, will be introducing a modeling and representation method for being used in automatically synthesis process of on chip communication architecture.

Keywords: Communication architecture, System on Chip, Communication Modeling and Representation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1351

Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3380

Authors: V. Karamzadeh, J. Adhvaryu, A. Chandrasekaran, M. Packirisamy

Abstract:

In Bulk Acoustic Wave (BAW) microfluidics, the throughput of particle sorting is dependent on the complex interplay between the geometric configuration of the channel, the size of the particles, and the properties of the fluid medium, which therefore calls for a detailed modeling and understanding of the fluid-particle interaction dynamics under an acoustic field, prior to designing the system. In this work, we propose a simplified Bulk acoustophoretic system that can be used for size dependent particle sorting. A Finite Element Method (FEM) based analytical model has been developed to study the dependence of particle sizes on channel parameters, and the sorting efficiency in a given fluid medium. Based on the results, the microfluidic system has been designed to take into account all the variables involved with the underlying physics, and has been fabricated using an additive manufacturing technique employing a commercial 3D printer, to generate a simple, cost-effective system that can be used for size sensitive particle sorting.

Keywords: 3D printing, 3D microfluidic chip, acoustophoresis, cell separation, MEMS, microfluidics.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1009

Authors: J. Ruenin, S. Sukprasong, R. Phatthanakun, N. Chomnawang, P. Kuntanawat

Abstract:

In this paper, a simple microfluidic device for monitoring algal cell behavior is proposed. An array of algal microwells is fabricated by PDMS soft-lithography using X-ray LIGA mold, placed on a glass substrate. Two layers of replicated PDMS and substrate are attached by oxygen plasma bonding, creating a microchannel for the microfluidic system. Algal cell are loaded into the microfluidic device, which provides positive charge on the bottom surface of wells. Algal cells, which are negative charged, can be attracted to the bottom of the wells via electrostatic interaction. By varying the concentration of algal cells in the loading suspension, it is possible to obtain wells with a single cell. Liquid medium for cells monitoring are flown continuously over the wells, providing nutrient and waste exchange between the well and the main flow. This device could lead to the uncovering of the quantitative biology of the algae, which is a key to effective and extensive algal utilizations in the field of biotechnology, food industry and bioenergy research and developments.

Keywords: Algal cells, microfluidic device, X-ray LIGA, X-ray lithography, metallic mold, synchrotron light, PDMS

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2377

Authors: D. Czurratis, Y. Beyl, S. Zinober, R. Zengerle, F. Lärmer

Abstract:

A new concept for long-term reagent storage for Labon- a-Chip (LoC) devices is described. Here we present a polymer multilayer stack with integrated stick packs for long-term storage of several liquid reagents, which are necessary for many diagnostic applications. Stick packs are widely used in packaging industry for storing solids and liquids for long time. The storage concept fulfills two main requirements: First, a long-term storage of reagents in stick packs without significant losses and interaction with surroundings, second, on demand releasing of liquids, which is realized by pushing a membrane against the stick pack through pneumatic pressure. This concept enables long-term on-chip storage of liquid reagents at room temperature and allows an easy implementation in different LoC devices.

Keywords: Lab-on-a-Chip, long-term storage, reagent storage, stick pack.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3005

Authors: Doshi N. A., Dhobale S. B., Kakade S. R.

Abstract:

As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size and performance, LFSR (Linear Feedback Shift Register) is implemented in layout level which develops the low power consumption chip, using recent CMOS, sub-micrometer layout tools. Thus LFSR counter can be a new trend setter in cryptography and is also beneficial as compared to GRAY & BINARY counter and variety of other applications. This paper compares 3 architectures in terms of the hardware implementation, CMOS layout and power consumption, using Microwind CMOS layout tool. Thus it provides solution to a low power architecture implementation of LFSR in CMOS VLSI.

Keywords: Chip technology, Layout level, LFSR, Pass transistor

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4471

Authors: Muhammad Ali, Awais Adnan

Abstract:

Network on a chip (NoC) has been proposed as a viable solution to counter the inefficiency of buses in the current VLSI on-chip interconnects. However, as the silicon chip accommodates more transistors, the probability of transient faults is increasing, making fault tolerance a key concern in scaling chips. In packet based communication on a chip, transient failures can corrupt the data packet and hence, undermine the accuracy of data communication. In this paper, we present a comparative analysis of transient fault tolerant techniques including end-to-end, node-by-node, and stochastic communication based on flooding principle.

Keywords: NoC, fault-tolerance, transient faults.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1315

Authors: Minsoo Lee, Yearn Jeong Kim, Yun-mi Kim, Sujeung Cheong, Sookyung Song

Abstract:

Bio-chips are used for experiments on genes and contain various information such as genes, samples and so on. The two-dimensional bio-chips, in which one axis represent genes and the other represent samples, are widely being used these days. Instead of experimenting with real genes which cost lots of money and much time to get the results, bio-chips are being used for biological experiments. And extracting data from the bio-chips with high accuracy and finding out the patterns or useful information from such data is very important. Bio-chip analysis systems extract data from various kinds of bio-chips and mine the data in order to get useful information. One of the commonly used methods to mine the data is classification. The algorithm that is used to classify the data can be various depending on the data types or number characteristics and so on. Considering that bio-chip data is extremely large, an algorithm that imitates the ecosystem such as the ant algorithm is suitable to use as an algorithm for classification. This paper focuses on finding the classification rules from the bio-chip data using the Ant Colony algorithm which imitates the ecosystem. The developed system takes in consideration the accuracy of the discovered rules when it applies it to the bio-chip data in order to predict the classes.

Keywords: Ant Colony System, DNA chip data, Classification.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1421

Authors: Sin J. Chen, Jyh J. Chen

Abstract:

This study describes a micro device integrated with multi-chamber for polymerase chain reaction (PCR) with different annealing temperatures. The device consists of the reaction polydimethylsiloxane (PDMS) chip, a cover glass chip, and is equipped with cartridge heaters, fans, and thermocouples for temperature control. In this prototype, commercial software is utilized to determine the geometric and operational parameters those are responsible for creating the denaturation, annealing, and extension temperatures within the chip. Two cartridge heaters are placed at two sides of the chip and maintained at two different temperatures to achieve a thermal gradient on the chip during the annealing step. The temperatures on the chip surface are measured via an infrared imager. Some thermocouples inserted into the reaction chambers are used to obtain the transient temperature profiles of the reaction chambers during several thermal cycles. The experimental temperatures compared to the simulated results show a similar trend. This work should be interesting to persons involved in the high-temperature based reactions and genomics or cell analysis.

Keywords: Polymerase chain reaction, thermal cycles, temperature gradient, micro-fabrication.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1603

Authors: Chih-Wei Chao, Jiashing Yu

Abstract:

To mimic the natural circumstances of cell growth in an organism, we present three-dimensional (3D) scaffolds fabricated by microfluidics for cultivation. This work investigates the cellular behaviors of rat cardiomyocytes in gelatin 3D scaffolds compared to those on 2D control, such as proliferation, viability and morphology. We found that the scaffolds may induce skeletal differentiation of H9c2 cells.

Keywords: Microfluidic device, H9c2, tissue engineering, 3D scaffolds.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2021

Authors: Eduardo Sant'Ana da Silva, Andre Luiz Pires Guedes, Eduardo Todt

Abstract:

Independent spanning trees (ISTs) provide a number of advantages in data broadcasting. One can cite the use in fault tolerance network protocols for distributed computing and bandwidth. However, the problem of constructing multiple ISTs is considered hard for arbitrary graphs. In this paper we present an efficient algorithm to construct ISTs on hypercubes that requires minimum resources to be performed.

Keywords: Hypercube, Independent Spanning Trees, Networks On Chip, Systems On Chip.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1833

Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1992

Authors: Samy E. Oraby, Ayman M. Alaskari

Abstract:

The importance of machining process in today-s industry requires the establishment of more practical approaches to clearly represent the intimate and severe contact on the tool-chipworkpiece interfaces. Mathematical models are developed using the measured force signals to relate each of the tool-chip friction components on the rake face to the operating cutting parameters in rough turning operation using multilayers coated carbide inserts. Nonlinear modeling proved to have high capability to detect the nonlinear functional variability embedded in the experimental data. While feedrate is found to be the most influential parameter on the friction coefficient and its related force components, both cutting speed and depth of cut are found to have slight influence. Greater deformed chip thickness is found to lower the value of friction coefficient as the sliding length on the tool-chip interface is reduced.

Keywords: Mathematical modeling, Cutting forces, Frictionforces, Friction coefficient and Chip ratio.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3081

Authors: Ahmad M. Shafiee, Mehrdad Montazeri, Mahdi Nikdast

Abstract:

Every day human life experiences new equipments more automatic and with more abilities. So the need for faster processors doesn-t seem to finish. Despite new architectures and higher frequencies, a single processor is not adequate for many applications. Parallel processing and networks are previous solutions for this problem. The new solution to put a network of resources on a chip is called NOC (network on a chip). The more usual topology for NOC is mesh topology. There are several routing algorithms suitable for this topology such as XY, fully adaptive, etc. In this paper we have suggested a new algorithm named Intermittent X, Y (IX/Y). We have developed the new algorithm in simulation environment to compare delay and power consumption with elders' algorithms.

Keywords: Computer architecture, parallel computing, NOC, routing algorithm.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1633

Authors: Ahmad Manbohi, Seyyed Hamid Ahmadi

Abstract:

A low-cost paper-based microfluidic device (PAD) for the multiplex electrochemical determination of glucose, uric acid, and dopamine in biological fluids was developed. Using wax printing, PAD containing a central zone, six channels, and six detection zones was fabricated, and the electrodes were printed on detection zones using pre-made electrodes template. For each analyte, two detection zones were used. The carbon working electrode was coated with chitosan-BSA (and enzymes for glucose and uric acid). To detect glucose and uric acid, enzymatic reactions were employed. These reactions involve enzyme-catalyzed redox reactions of the analytes and produce free electrons for electrochemical measurement. Calibration curves were linear (R^² > 0.980) in the range of 0-80 mM for glucose, 0.09–0.9 mM for dopamine, and 0–50 mM for uric acid, respectively. Blood samples were successfully analyzed by the proposed method.

Keywords: Multiplex, microfluidic paper-based electrochemical biosensors, biomarkers, biological fluids.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1528

Authors: Pedro Acevedo, Carlos Díaz, Mónica Vázquez, Joel Durán

Abstract:

This paper describes the design of a pulse generator based on the Programmable System-on-Chip (PSoC) module. In this module, using programmable logic is possible to implement different pulses which are required for ultrasonic applications, either in a single channel or multiple channels. This module can operate with programmable frequencies from 3-74 MHz; its programming may be versatile covering a wide range of ultrasonic applications. It is ideal for low-power ultrasonic applications where PZT or PVDF transducers are used.

Keywords: pulse generator, PVDF, Programmable System-on-Chip (PSoC), ultrasonic transducer

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1958

Authors: G. H. Senussi

Abstract:

The present work is concerned with the effect of turning process parameters (cutting speed, feed rate, and depth of cut) and distance from the center of work piece as input variables on the chip micro-hardness as response or output. Three experiments were conducted; they were used to investigate the chip micro-hardness behavior at diameter of work piece for 30[mm], 40[mm], and 50[mm]. Response surface methodology (R.S.M) is used to determine and present the cause and effect of the relationship between true mean response and input control variables influencing the response as a two or three dimensional hyper surface. R.S.M has been used for designing a three factor with five level central composite rotatable factors design in order to construct statistical models capable of accurate prediction of responses. The results obtained showed that the application of R.S.M can predict the effect of machining parameters on chip micro-hardness. The five level factorial designs can be employed easily for developing statistical models to predict chip micro-hardness by controllable machining parameters. Results obtained showed that the combined effect of cutting speed at it?s lower level, feed rate and depth of cut at their higher values, and larger work piece diameter can result increasing chi micro-hardness.

Keywords: Machining Parameters, Chip Micro-Hardness, CNCMachining, 304-Austenic Stainless Steel.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3228