Guo-Qiang Lo

Publications

6 Highly Efficient Silicon Photomultiplier for Positron Emission Tomography Application

Authors: Guo-Qiang Lo, Fei Sun, Ning Duan

Abstract:

A silicon photomultiplier (SiPM) was designed, fabricated and characterized. The SiPM was based on SACM (Separation of Absorption, Charge and Multiplication) structure, which was optimized for blue light detection in application of positron emission tomography (PET). The achieved SiPM array has a high geometric fill factor of 64% and a low breakdown voltage of about 22V, while the temperature dependence of breakdown voltage is only 17mV/°C. The gain and photon detection efficiency of the device achieved were also measured under illumination of light at 405nm and 460nm wavelengths. The gain of the device is in the order of 106. The photon detection efficiency up to 60% has been observed under 1.8V overvoltage.

Keywords: Positron Emission Tomography, silicon photomultiplier, Photon Detection Efficiency

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1394
5 On the Operation Mechanism and Device Modeling of AlGaN/GaN High Electron Mobility Transistors (HEMTs)

Authors: Guo-Qiang Lo, Li Yuan, Weizhu Wang, Kean Boon Lee, Haifeng Sun, Susai Lawrence Selvaraj, Shane Todd

Abstract:

In this work, the physical based device model of AlGaN/GaN high electron mobility transistors (HEMTs) has been established and the corresponding device operation behavior has been investigated also by using Sentaurus TCAD from Synopsys. Advanced AlGaN/GaN hetero-structures with GaN cap layer and AlN spacer have been considered and the GaN cap layer and AlN spacer are found taking important roles on the gate leakage blocking and off-state breakdown voltage enhancement.

Keywords: HEMT, AlGaN/GaN, Physical mechanism, TCAD simulation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3413
4 Silicon-Waveguide Based Silicide Schottky- Barrier Infrared Detector for on-Chip Applications

Authors: Guo-Qiang Lo, Shiyang Zhu, Dim-Lee Kwong

Abstract:

We prove detailed analysis of a waveguide-based Schottky barrier photodetector (SBPD) where a thin silicide film is put on the top of a silicon-on-insulator (SOI) channel waveguide to absorb light propagating along the waveguide. Taking both the confinement factor of light absorption and the wall scanning induced gain of the photoexcited carriers into account, an optimized silicide thickness is extracted to maximize the effective gain, thereby the responsivity. For typical lengths of the thin silicide film (10-20 Ðçm), the optimized thickness is estimated to be in the range of 1-2 nm, and only about 50-80% light power is absorbed to reach the maximum responsivity. Resonant waveguide-based SBPDs are proposed, which consist of a microloop, microdisc, or microring waveguide structure to allow light multiply propagating along the circular Si waveguide beneath the thin silicide film. Simulation results suggest that such resonant waveguide-based SBPDs have much higher repsonsivity at the resonant wavelengths as compared to the straight waveguidebased detectors. Some experimental results about Si waveguide-based SBPD are also reported.

Keywords: Silicon Photonics, Infrared detector, Schottky-barrier, Silicon waveguide

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1799
3 Silicon-based Low-Power Reconfigurable Optical Add-Drop Multiplexer (ROADM)

Authors: Qing Fang, Junfeng Song, Xianshu Luo, Lianxi Jia, Xiaoguang Tu, Tsung-Yang Liow, Mingbin Yu, Guo-Qiang Lo

Abstract:

We demonstrate a 1×4 coarse wavelength division-multiplexing (CWDM) planar concave grating multiplexer/demultiplexer and its application in re-configurable optical add/drop multiplexer (ROADM) system in silicon-on-insulator substrate. The wavelengths of the demonstrated concave grating multiplexer align well with the ITU-T standard. We demonstrate a prototype of ROADM comprising two such concave gratings and four wide-band thermo-optical MZI switches. Undercut technology which removes the underneath silicon substrate is adopted in optical switches in order to minimize the operation power. For all the thermal heaters, the operation voltage is smaller than 1.5 V, and the switch power is ~2.4 mW. High throughput pseudorandom binary sequence (PRBS) data transmission with up to 100 Gb/s is demonstrated, showing the high-performance ROADM functionality.

Keywords: low power consumption, ROADM, Optical switch, Integrated devices

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1865
2 CMOS-Compatible Silicon Nanoplasmonics for On-Chip Integration

Authors: Guo-Qiang Lo, Shiyang Zhu, Dim-Lee Kwong

Abstract:

Although silicon photonic devices provide a significantly larger bandwidth and dissipate a substantially less power than the electronic devices, they suffer from a large size due to the fundamental diffraction limit and the weak optical response of Si. A potential solution is to exploit Si plasmonics, which may not only miniaturize the photonic device far beyond the diffraction limit, but also enhance the optical response in Si due to the electromagnetic field confinement. In this paper, we discuss and summarize the recently developed metal-insulator-Si-insulator-metal nanoplasmonic waveguide as well as various passive and active plasmonic components based on this waveguide, including coupler, bend, power splitter, ring resonator, MZI, modulator, detector, etc. All these plasmonic components are CMOS compatible and could be integrated with electronic and conventional dielectric photonic devices on the same SOI chip. More potential plasmonic devices as well as plasmonic nanocircuits with complex functionalities are also addressed.

Keywords: CMOS, Silicon nanoplasmonics, Silicon nanophotonics, Onchip integration

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1531
1 Integration of Resistive Switching Memory Cell with Vertical Nanowire Transistor

Authors: Guo-Qiang Lo, Xiang Li, Zhixian Chen, Zheng Fang, Aashit Kamath, Xinpeng Wang, Navab Singh, Dim-Lee Kwong

Abstract:

We integrate TiN/Ni/HfO2/Si RRAM cell with a vertical gate-all-around (GAA) nanowire transistor to achieve compact 4F2 footprint in a 1T1R configuration. The tip of the Si nanowire (source of the transistor) serves as bottom electrode of the memory cell. Fabricated devices with nanowire diameter ~ 50nm demonstrate ultra-low current/power switching; unipolar switching with 10μA/30μW SET and 20μA/30μW RESET and bipolar switching with 20nA/85nW SET and 0.2nA/0.7nW RESET. Further, the switching current is found to scale with nanowire diameter making the architecture promising for future scaling.

Keywords: nanowire FET, RRAM, gate-all-around FET, vertical MOSFETs

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1767