Kevin T. C. Chai

Publications

2 14-Bit 1MS/s Cyclic-Pipelined ADC

Authors: Shan Jiang, Minkyu Je, Kevin T. C. Chai, S. Saisundar, David Nuttman

Abstract:

This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm2. The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.


Keywords: cyclic, analog to digital converter, gain-boosting, pipelined

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1 Resonant-Based Capacitive Pressure Sensor Read-Out Oscillating at 1.67 GHz in 0.18

Authors: Yong Wang, Minkyu Je, Wang Ling Goh, Jung Hyup Lee, Kevin T. C. Chai

Abstract:

This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.

Keywords: LC oscillator, Capacitance-to-frequency converter, Capacitive pressure sensor, Digital counter

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