Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1

floating-point arithmetic Related Publications

1 A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic

Authors: Akinori Kanasugi, Yukinari Minagi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: FPGA, Dynamic Reconfiguration, double precision, floating-point arithmetic

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1126