Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3

factorization Related Publications

3 Application of Method of Symmetries at a Calculation and Planning of Circular Plate with Variable Thickness

Authors: Kirill Trapezon, Alexandr Trapezon

Abstract:

A problem is formulated for the natural oscillations of a circular plate of linearly variable thickness on the basis of the symmetry method. The equations of natural frequencies and forms for a plate are obtained, providing that it is rigidly fixed along the inner contour. The first three eigenfrequencies are calculated, and the eigenmodes of the oscillations of the acoustic element are constructed. An algorithm for applying the symmetry method and the factorization method for solving problems in the theory of oscillations for plates of variable thickness is shown. The effectiveness of the approach is demonstrated on the basis of comparison of known results and those obtained in the article. It is shown that the results are more accurate and reliable.

Keywords: Approximation, vibrations, Symmetry‎, Plate, thickness, factorization

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2 A Set Theory Based Factoring Technique and Its Use for Low Power Logic Design

Authors: Padmanabhan Balasubramanian, Ryuta Arisaka

Abstract:

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

Keywords: Set Theory, low power, factorization, Logic function, Standardcell based design

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1 High Resolution Methods Based On Rank Revealing Triangular Factorizations

Authors: M. Bouri, S. Bourennane

Abstract:

In this paper, we propose a novel method for subspace estimation used high resolution method without eigendecomposition where the sample Cross-Spectral Matrix (CSM) is replaced by upper triangular matrix obtained from LU factorization. This novel method decreases the computational complexity. The method relies on a recently published result on Rank-Revealing LU (RRLU) factorization. Simulation results demonstrates that the new algorithm outperform the Householder rank-revealing QR (RRQR) factorization method and the MUSIC in the low Signal to Noise Ratio (SNR) scenarios.

Keywords: Localization, matrix, factorization, Signalsubspace

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