Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3

Design methodology Related Publications

3 Seamless MATLAB® to Register-Transfer Level Design Methodology Using High-Level Synthesis

Authors: Petri Solanti, Russell Klein

Abstract:

Many designers are asking for an automated path from an abstract mathematical MATLAB model to a high-quality Register-Transfer Level (RTL) hardware description. Manual transformations of MATLAB or intermediate code are needed, when the design abstraction is changed. Design conversion is problematic as it is multidimensional and it requires many different design steps to translate the mathematical representation of the desired functionality to an efficient hardware description with the same behavior and configurability. Yet, a manual model conversion is not an insurmountable task. Using currently available design tools and an appropriate design methodology, converting a MATLAB model to efficient hardware is a reasonable effort. This paper describes a simple and flexible design methodology that was developed together with several design teams.

Keywords: Verification, Design methodology, MATLAB, High-Level Synthesis

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 155
2 Robotics System Design for Assembly and Disassembly Process

Authors: Nina Danišová, Roman Ružarovský, Karol Velíšek

Abstract:

In this paper is described a new conception of the Cartesian robot for automated assembly and also disassembly process. The advantage of this conception is the utilization the Cartesian assembly robot with its all peripheral automated devices for assembly of the assembled product. The assembly product in the end of the lifecycle can be disassembled with the same Cartesian disassembly robot with the use of the same peripheral automated devices and equipment. It is a new approach to problematic solving and development of the automated assembly systems with respect to lifecycle management of the assembly product and also assembly system with Cartesian robot. It is also important to develop the methodical process for design of automated assembly and disassembly system with Cartesian robot. Assembly and disassembly system use the same Cartesian robot input and output devices, assembly and disassembly units in one workplace with different application. Result of design methodology is the verification and proposition of real automated assembly and disassembly workplace with Cartesian robot for known verified model of assembled actuator.

Keywords: Design methodology, assembly, Disassembly, pneumatic, Cartesian robot

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2549
1 A Software-Supported Methodology for Designing General-Purpose Interconnection Networks for Reconfigurable Architectures

Authors: Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis

Abstract:

Modern applications realized onto FPGAs exhibit high connectivity demands. Throughout this paper we study the routing constraints of Virtex devices and we propose a systematic methodology for designing a novel general-purpose interconnection network targeting to reconfigurable architectures. This network consists of multiple segment wires and SB patterns, appropriately selected and assigned across the device. The goal of our proposed methodology is to maximize the hardware utilization of fabricated routing resources. The derived interconnection scheme is integrated on a Virtex style FPGA. This device is characterized both for its high-performance, as well as for its low-energy requirements. Due to this, the design criterion that guides our architecture selections was the minimal Energy×Delay Product (EDP). The methodology is fully-supported by three new software tools, which belong to MEANDER Design Framework. Using a typical set of MCNC benchmarks, extensive comparison study in terms of several critical parameters proves the effectiveness of the derived interconnection network. More specifically, we achieve average Energy×Delay Product reduction by 63%, performance increase by 26%, reduction in leakage power by 21%, reduction in total energy consumption by 11%, at the expense of increase of channel width by 20%.

Keywords: low-energy, FPGA, Design methodology, high-performance, interconnection, CAD tool

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1412