Search results for: stack cache

Authors: Abdulrahman K. Alshegaifi, Chun-Hsi Huang

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Treating data based on its location in memory has received much attention in recent years due to its different properties, which offer important aspects for cache utilization. Stack data and non-stack data may interfere with each other’s locality in the data cache. One of the important aspects of stack data is that it has high spatial and temporal locality. In this work, we simulate non-unified cache design that split data cache into stack and non-stack caches in order to maintain stack data and non-stack data separate in different caches. We observe that the overall hit rate of non-unified cache design is sensitive to the size of non-stack cache. Then, we investigate the appropriate size and associativity for stack cache to achieve high hit ratio especially when over 99% of accesses are directed to stack cache. The result shows that on average more than 99% of stack cache accuracy is achieved by using 2KB of capacity and 1-way associativity. Further, we analyze the improvement in hit rate when adding small, fixed, size of stack cache at level1 to unified cache architecture. The result shows that the overall hit rate of unified cache design with adding 1KB of stack cache is improved by approximately, on average, 3.9% for Rijndael benchmark. The stack cache is simulated by using SimpleScalar toolset.

Keywords: hit rate, locality of program, stack cache, stack data

Procedia PDF Downloads 273

Authors: Guowei Hou, Lixin Yu, Wei Zhuang, Hui Qin, Xue Yang

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Formal verification is proposed to ensure the correctness of the design and make functional verification more efficient. As cache plays a vital role in the design of System on Chip (SoC), and cache with Memory Management Unit (MMU) and cache memory unit makes the state space too large for simulation to verify, then a formal verification is presented for such system design. In the paper, a formal model checking verification flow is suggested and a new cache memory model which is called “exhaustive search model” is proposed. Instead of using large size ram to denote the whole cache memory, exhaustive search model employs just two cache blocks. For cache system contains data cache (Dcache) and instruction cache (Icache), Dcache memory model and Icache memory model are established separately using the same mechanism. At last, the novel model is employed to the verification of a cache which is module of a custom-built SoC system that has been applied in practical, and the result shows that the cache system is verified correctly using the exhaustive search model, and it makes the verification much more manageable and flexible.

Keywords: cache system, formal verification, novel model, system on chip (SoC)

Procedia PDF Downloads 467

Authors: Sajjad Rostami-Sani, Mojtaba Valinataj, Amir-Hossein Khojir-Angasi

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The cache has an important role in the reduction of access delay between a processor and memory in high-performance embedded systems. In these systems, the energy consumption is one of the most important concerns, and it will become more important with smaller processor feature sizes and higher frequencies. Meanwhile, the cache system dissipates a significant portion of energy compared to the other components of a processor. There are some elements that can affect the energy consumption of the cache such as replacement policy and degree of associativity. Due to these points, it can be inferred that selecting an appropriate configuration for the cache is a crucial part of designing a system. In this paper, we investigate the effect of different cache replacement policies on both cache’s performance and energy consumption. Furthermore, the impact of different Instruction Set Architectures (ISAs) on cache’s performance and energy consumption has been investigated.

Keywords: energy consumption, replacement policy, instruction set architecture, multicore processor

Procedia PDF Downloads 112

Authors: Rasool Sadeghi, Sayed Mahdi Faghih Imani, Negar Najafi

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The inherent features of Named Data Networking (NDN) provides a robust solution for Internet of Thing (IoT). Therefore, NDN-IoT has emerged as a combined architecture which exploits the benefits of NDN for interconnecting of the heterogeneous objects in IoT. In NDN-IoT, caching schemes are a key role to improve the network performance. In this paper, we consider the effectiveness of cache replacement schemes in NDN-IoT scenarios. We investigate the impact of replacement schemes on average delay, average hop count, and average interest retransmission when replacement schemes are Least Frequently Used (LFU), Least Recently Used (LRU), First-In-First-Out (FIFO) and Random. The simulation results demonstrate that LFU and LRU present a stable performance when the cache size changes. Moreover, the network performance improves when the number of consumers increases.

Keywords: NDN-IoT, cache replacement, performance, ndnSIM

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Authors: Nastaran Moosavi, Mohammad Mokhtari

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Seismic inversion is a technique which has been in use for years and its main goal is to estimate and to model physical characteristics of rocks and fluids. Generally, it is a combination of seismic and well-log data. Seismic inversion can be carried out through different methods; we have conducted and compared post-stack and pre- stack seismic inversion methods on real data in one of the fields in the Persian Gulf. Pre-stack seismic inversion can transform seismic data to rock physics such as P-impedance, S-impedance and density. While post- stack seismic inversion can just estimate P-impedance. Then these parameters can be used in reservoir identification. Based on the results of inverting seismic data, a gas reservoir was detected in one of Hydrocarbon oil fields in south of Iran (Persian Gulf). By comparing post stack and pre-stack seismic inversion it can be concluded that the pre-stack seismic inversion provides a more reliable and detailed information for identification and prediction of hydrocarbon reservoirs.

Keywords: density, p-impedance, s-impedance, post-stack seismic inversion, pre-stack seismic inversion

Procedia PDF Downloads 291

Authors: Na Li, Samuel Simon Araya, Søren Knudsen Kær

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This study investigates the effects of operating parameters of different current density, temperature and pressure on the performance of a proton exchange membrane (PEM) water electrolysis stack. A 7-cell PEM water electrolysis stack was assembled and tested under different operation modules. The voltage change and polarization curves under different test conditions, namely current density, temperature and pressure, were recorded. Results show that higher temperature has positive effect on overall stack performance, where temperature of 80 ℃ improved the cell performance greatly. However, the cathode pressure and current density has little effect on stack performance.

Keywords: PEM electrolysis stack, current density, temperature, pressure

Procedia PDF Downloads 164

Authors: Khyamling Parane, B. M. Prabhu Prasad, Basavaraj Talawar

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Fast simulations are critical in reducing time to market in CMPs and SoCs. Several simulators have been used to evaluate the performance and power consumed by Network-on-Chips. Researchers and designers rely upon these simulators for design space exploration of NoC architectures. Our experiments show that simulating large NoC topologies take hours to several days for completion. To speed up the simulations, it is necessary to investigate and optimize the hotspots in simulator source code. Among several simulators available, we choose Booksim2.0, as it is being extensively used in the NoC community. In this paper, we analyze the cache and memory system behaviour of Booksim2.0 to accurately monitor input dependent performance bottlenecks. Our measurements show that cache and memory usage patterns vary widely based on the input parameters given to Booksim2.0. Based on these measurements, the cache configuration having least misses has been identified. To further reduce the cache misses, we use software optimization techniques such as removal of unused functions, loop interchanging and replacing post-increment operator with pre-increment operator for non-primitive data types. The cache misses were reduced by 18.52%, 5.34% and 3.91% by employing above technology respectively. We also employ thread parallelization and vectorization to improve the overall performance of Booksim2.0. The OpenMP programming model and SIMD are used for parallelizing and vectorizing the more time-consuming portions of Booksim2.0. Speedups of 2.93x and 3.97x were observed for the Mesh topology with 30 × 30 network size by employing thread parallelization and vectorization respectively.

Keywords: cache behaviour, network-on-chip, performance profiling, vectorization

Procedia PDF Downloads 164

Authors: Gunasekaran Raja, Kottilingam Kottursamy, Rajakumar Arul, Ramkumar Jayaraman, Krithika Sairam, Lakshmi Ravi

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The synchronization server maintains a dynamically changing cache, which contains the data items which were requested and collected by the mobile node from the server. The order and presence of tuples in the cache changes dynamically according to the frequency of updates performed on the data, by the server and client. To synchronize, the data which has been modified by client and the server at an instant are collected, batched together by the type of modification (insert/ update/ delete), and sorted according to their update frequencies. This ensures that the DCASH (Dynamic Cache Synchronization Algorithm for Heterogeneous Reverse Y synchronizing Mobile Database Systems) gives priority to the frequently accessed data with high usage. The optimal memory management algorithm is proposed to manage data items according to their frequency, theorems were written to show the current mobile data activity is reverse Y in nature and the experiments were tested with 2g and 3g networks for various mobile devices to show the reduced response time and energy consumption.

Keywords: mobile databases, synchronization, cache, response time

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Authors: Settana M. Abdulh, Naila A. Sadalla, Yaseen H. Taha, Howaida Elshoush

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Side channel attacks are based on side channel information, which is information that is leaked from encryption systems. This includes timing information, power consumption as well as electromagnetic or even sound leaking which can exploited by an attacker. Implementing side channel attacks are possible if and only if an attacker has access to a cryptosystem. In this case, the attacker can exploit bad implementation in software or hardware which is not controlled by encryption implementer. Thus, he/she will represent a real threat to the security system. Several countermeasures have been proposed to eliminate side channel information vulnerability.Cache timing attack is a special type of side channel attack. Here, timing information is collected and analyzed by an attacker to guess sensitive information such as encryption key or plaintext. This paper reviews the technique applied in this attack and surveys the countermeasures against it, evaluating the feasibility and usability of each. Based on this evaluation, finally we pose several recommendations about using these countermeasures.

Keywords: AES algorithm, side channel attack, cache timing attack, cache timing countermeasure

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Authors: Patcharin Saechan, Isares Dhuchakallaya

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Thermoacoustic refrigerator is a cooling device which uses the acoustic waves to produce the cooling effect. The aim of this paper is to explore the experimental and numerical feasibility of a standing-wave thermoacoustic refrigerator. The effects of the stack length, position of stack and operating frequency on the cooling performance are carried out. The circular pore stacks are tested under the atmospheric pressure. A low-cost loudspeaker is used as an acoustic driver. The results show that the location of stack installed in resonator tube has a greater effect on the cooling performance than the stack length and operating frequency, respectively. The temperature difference across the ends of the stack can be generated up to 13.7°C, and the temperature of cold-end is dropped down by 5.3°C from the ambient temperature.

Keywords: cooling performance, refrigerator, standing-wave, thermoacoustics

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Authors: H. Afsari, H. Shokouhmand

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When stack is placed in a thermoacoustic resonator in a cryocooler, one extremity of the stack heats up while the other cools down due to the thermoacoustic effect. In the present, with expression a formula by linear theory, will see this temperature difference depends on what factors. The computed temperature difference is compared to the one predicted by the formula. These discrepancies can not be attributed to non-linear effects, rather they exist because of thermal effects. Two correction factors are introduced for close up results among linear theory and computed and use these correction factors to modified linear theory. In fact, this formula, is optimized by GA (Genetic Algorithm). Finally, results are shown at different Mach numbers and stack location in resonator.

Keywords: heat transfer, thermoacoustic cryocooler, stack, resonator, mach number, genetic algorithm

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Authors: Lai Xuejiang, Huang Li, Yang Yi

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To study the potential hazards of the sudden emergency relief of flare stack, the thermal radiation and noise calculation of flare stack is carried out by using Flaresim program 2.0. Thermal radiation and noise analysis should be considered as the sudden emergency relief takes place. According to the Flaresim software simulation results, the thermal radiation and noise meet the requirement.

Keywords: flare stack, thermal radiation, safety assessment, noise

Procedia PDF Downloads 320

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

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In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

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Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo

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In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.

Keywords: ESD, SCR, trigger voltage, holding voltage

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Authors: Osayande Pascal Omondiagbe, Sherlock a Licorish

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Stack Overflow is a popular community question and answer portal which is used by practitioners to solve technology-related challenges during software development. Previous studies have shown that this forum is becoming a substitute for official software programming languages documentation. While tools have looked to aid developers by presenting interfaces to explore Stack Overflow, developers often face challenges searching through many possible answers to their questions, and this extends the development time. To this end, researchers have provided ways of predicting acceptable Stack Overflow answers by using various modeling techniques. However, less interest is dedicated to examining the performance and quality of typically used modeling methods, and especially in relation to models’ and features’ complexity. Such insights could be of practical significance to the many practitioners that use Stack Overflow. This study examines the performance and quality of various modeling methods that are used for predicting acceptable answers on Stack Overflow, drawn from 2014, 2015 and 2016. Our findings reveal significant differences in models’ performance and quality given the type of features and complexity of models used. Researchers examining classifiers’ performance and quality and features’ complexity may leverage these findings in selecting suitable techniques when developing prediction models.

Keywords: feature selection, modeling and prediction, neural network, random forest, stack overflow

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Authors: Yiwei Li, Boyu Tian, Mingyu Gao

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Hybrid main memory systems combine both performance and capacity advantages from heterogeneous memory technologies. With larger capacities, higher associativities, and finer granularities, hybrid memory systems currently exhibit significant metadata storage and lookup overheads for flexibly remapping data blocks between the two memory tiers. To alleviate the inefficiencies of existing designs, we propose Trimma, the combination of a multi-level metadata structure and an efficient metadata cache design. Trimma uses a multilevel metadata table to only track truly necessary address remap entries. The saved memory space is effectively utilized as extra DRAM cache capacity to improve performance. Trimma also uses separate formats to store the entries with non-identity and identity mappings. This improves the overall remap cache hit rate, further boosting the performance. Trimma is transparent to software and compatible with various types of hybrid memory systems. When evaluated on a representative DDR4 + NVM hybrid memory system, Trimma achieves up to 2.4× and on average 58.1% speedup benefits, compared with a state-of-the-art design that only leverages the unallocated fast memory space for caching. Trimma addresses metadata management overheads and targets future scalable large-scale hybrid memory architectures.

Keywords: memory system, data cache, hybrid memory, non-volatile memory

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Authors: Tao Chen, ShiHua Liu, JiWei Zhang

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Assembly of the proton exchange membrane fuel cells (PEMFC) has a very important influence on its performance and efficiency. The various components of PEMFC stack are usually locked and fixed by bolts. Locking bolt will cause the deformation of the bipolar plate and the other components, which will affect directly the deformation degree of the integral parts of the PEMFC as well as the performance of PEMFC. This paper focuses on the object of three-cell stack of PEMFC. Finite element simulation is used to investigate the deformation of bipolar plate caused by quantity and layout of bolts, bolt locking pressure, and bolt locking sequence, etc. Finally, we made a conclusion that the optimal combination packaging scheme was adopted to assemble the fuel cell stack. The scheme was in use of 3.8 MPa locking pressure imposed on the fuel cell stack, type Ⅱ of four locking bolts and longitudinal locking method. The scheme was obtained by comparatively analyzing the overall displacement contour of PEMFC stack, absolute displacement curve of bipolar plate along the given three paths in the Z direction and the polarization curve of fuel cell. The research results are helpful for the fuel cell stack assembly.

Keywords: bipolar plate, deformation, finite element simulation, fuel cell, locking bolt

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Authors: Cao Jiayu, Lan Ximing, Huang Jingjia, Burra Venkata Durga Kumar

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The first virus to attack personal computers was born in early 1986, called C-Brain, written by a pair of Pakistani brothers. In those days, people still used dos systems, manipulating computers with the most basic command lines. In the 21st century today, computer performance has grown geometrically. But computer viruses are also evolving and escalating. We never stop fighting against security problems. Stack overflow is one of the most common security vulnerabilities in operating systems. It may result in serious security issues for an operating system if a program in it has a vulnerability with administrator privileges. Certain viruses change the value of specific memory through a stack overflow, allowing computers to run harmful programs. This study developed a mechanism to detect and respond to time whenever a stack overflow occurs. We demonstrate the effectiveness of standard machine learning algorithms and control flow enforcement techniques in predicting computer OS security using generating suspicious vulnerability functions (SVFS) and associated suspect areas (SAS). The method can minimize the possibility of stack overflow attacks occurring.

Keywords: operating system, security, stack overflow, buffer overflow, machine learning, control-flow enforcement technology

Procedia PDF Downloads 85

Authors: Hyun Young Kim, Chung Kwang Lee, Han Hee Cho, Sang Woon Cho, Yong Seo Koo

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In this paper, we proposed a novel SCR (Silicon Controlled Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O and power clamp. The proposed device has a higher holding voltage characteristic than conventional SCR. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. The proposed device was analyzed to figure out electrical characteristics and tolerance robustness in term of individual design parameters (D1, D2, D3). They are investigated by using the Synopsys TCAD simulator. As a result of simulation, holding voltage increased with different design parameters. The holding voltage of the proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD device with the high holding voltage is proposed. In the simulation results, 2-stack has holding voltage of 6.8V and 3-stack has holding voltage of 10.5V. The simulation results show that holding voltage of stacking structure can be larger than the operation voltage of high-voltage application.

Keywords: ESD, SCR, holding voltage, stack, power clamp

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Authors: Ahmadali Shirazytabar, Hamidreza Namazi

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The inherent irreversibility of thermo-acoustics primarily in the stack region causes poor efficiency of thermo-acoustic engines which is the major weakness of these devices. In view of the above, this study examines entropy generation in the stack of a thermo-acoustic system. For this purpose two parallel plates representative of the stack is considered. A general equation for entropy generation is derived based on the Second Law of thermodynamics. Assumptions such as Rott’s linear thermo-acoustic approximation, boundary layer type flow, etc. are made to simplify the governing continuity, momentum and energy equations to achieve analytical solutions for velocity and temperature. The entropy generation equation is also simplified based on the same assumptions and then is converted to dimensionless form by using characteristic entropy generation. A time averaged entropy generation rate followed by a global entropy generation rate are calculated and graphically represented for further analysis and inspecting the effect of different parameters on the entropy generation.

Keywords: thermo-acoustics, entropy, second law of thermodynamics, Rott’s linear thermo-acoustic approximation

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Authors: Sedat Bilgili, Alper K. Demir

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The current Internet has become the dominant use with continuing growth in the home, medical, health, smart cities and industrial automation applications. Internet of Things (IoT) is an emerging technology to enable such applications in our lives. Moreover, Named Data Networking (NDN) is also emerging as a Future Internet architecture where it fits the communication needs of IoT networks. The aim of this study is to provide an NDN protocol stack implementation running on the Contiki operating system (OS). Contiki OS is an OS that is developed for constrained IoT devices. In this study, an NDN protocol stack that can work on top of IEEE 802.15.4 link and physical layers have been developed and presented.

Keywords: internet of things (IoT), named-data, named data networking (NDN), operating system

Procedia PDF Downloads 128

Authors: Kyoung-Il Do, Jun-Geol Park, Hee-Guk Chae, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

A SCR stacking structure is proposed to have improved Latch-up immunity. In comparison with conventional SCR (Silicon Controlled Rectifier), the proposed Electrostatic Discharge (ESD) protection circuit has a lower trigger characteristic by using the LVTSCR (Low Voltage Trigger) structure. Also the proposed ESD protection circuit has improved Holding Voltage Characteristic by using N-stack technique. These characteristics enable to have latch-up immunity in operating conditions. The simulations are accomplished by using the Synopsys TCAD. It has a trigger voltage of 8.9V and a holding voltage of 1.8V in a single structure. And when applying the stack technique, 2-stack has the holding voltage of 3.8V and 3-stack has the holding voltage of 5.1 V.

Keywords: electrostatic discharge (ESD), low voltage trigger silicon controlled rectifier (LVTSCR), MVTSCR, power clamp, silicon controlled rectifier (SCR), latch-up

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Authors: Sung Ho Ahn, Jintae Hong, Chang Young Joung, Tae Ho Yang, Sung Ho Heo, Seo Yun Jang

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The performances of nuclear fuels and materials are qualified at an irradiation system in research reactors operating under the commercial nuclear power plant conditions. Fuel centerline temperature, coolant temperature, neutron flux, deformations of fuel stack and swelling are important parameters needed to analyze the nuclear fuel performances. The dimensional stability of nuclear fuels is a key parameter measuring the fuel densification and swelling. In this study, the fuel stack elongation is measured using a LVDT. A mockup LVDT instrumented fuel rod is developed. The performances of mockup LVDT instrumented fuel rod is evaluated by experiments.

Keywords: axial deformation, elongation measurement, in-pile instrumentation, LVDT

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Authors: Chih-Chia Lin, Ching-Ying Huang, Cheng-Hong Liu, Wen-Lin Wang

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A complete fuel cell stack comprises several single cells with end plates, bipolar plates, gaskets and membrane electrode assembly (MEA) components. Electrons generated from cells are conducted through bipolar plates. The amount of cells' components increases as the stack voltage increases, complicating the fuel cell assembly process and mass production. Stack assembly error influence cell performance. PEM fuel cell stack importing laser welding technique could eliminate transverse deformation between bipolar plates to promote stress uniformity of cell components as bipolar plates and MEA. Simultaneously, bipolar plates were melted together using laser welding to decrease interface resistance. A series of experiments as through-plan and in-plan resistance measurement test was conducted to observe the laser welding effect. The result showed that the through-plane resistance with laser welding was a drop of 97.5-97.6% when the contact pressure was about 1MPa to 3 MPa, and the in-plane resistance was not significantly different for laser welding.

Keywords: PEM fuel cell, laser welding, through-plan, in-plan, resistance

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Authors: Feng Tao, Ma Jing, Guo Xian, Wang Jing

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Named Data Networking (NDN) replaces IP address of traditional network with data name, and adopts dynamic cache mechanism. In the existing mechanism, however, only one-to-one search can be achieved because every data has a unique name corresponding to it. There is a certain mapping relationship between data content and data name, so if the data name is intercepted by an adversary, the privacy of the data content and user’s interest can hardly be guaranteed. In order to solve this problem, this paper proposes a one-to-many fuzzy search scheme based on order-preserving encryption to reduce the query overhead by optimizing the caching strategy. In this scheme, we use hash value to ensure the user’s query safe from each node in the process of search, so does the privacy of the requiring data content.

Keywords: NDN, order-preserving encryption, fuzzy search, privacy

Procedia PDF Downloads 447

Authors: Kai-Jui Kou, Tzu-Ling Shen, Ying-Fang Wang

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The objectives of the present study are to characterize nanoparticles generated from the different working type in 3D printing room and the stack flue during 3D printing process. The studied laboratory (10.5 m× 7.2 m × 3.2 m) with a ventilation rate of 500 m³/H is installed a 3D metal printing machine. Direct-reading instrument of a scanning mobility particle sizer (SMPS, Model 3082, TSI Inc., St. Paul, MN, USA) was used to conduct static sampling for nanoparticle number concentration and particle size distribution measurements. The SMPS obtained particle number concentration at every 3 minutes, the diameter of the SMPS ranged from 11~372 nm when the aerosol and sheath flow rates were set at 0.6 and 6 L/min, respectively. The concentrations of background, printing process, clearing operation, and screening operation were performed in the laboratory. On the other hand, we also conducted nanoparticle measurement on the 3D printing machine's stack flue to understand its emission characteristics. Results show that the nanoparticles emitted from the different operation process were the same distribution in the form of the uni-modal with number median diameter (NMD) as approximately 28.3 nm to 29.6 nm. The number concentrations of nanoparticles were 2.55×10³ count/cm³ in laboratory background, 2.19×10³ count/cm³ during printing process, 2.29×10³ count/cm³ during clearing process, 3.05×10³ count/cm³ during screening process, 2.69×10³ count/cm³ in laboratory background after printing process, and 6.75×10³ outside laboratory, respectively. We found that there are no emission nanoparticles during the printing process. However, the number concentration of stack flue nanoparticles in the ongoing print is 1.13×10⁶ count/cm³, and that of the non-printing is 1.63×10⁴ count/cm³, with a NMD of 458 nm and 29.4 nm, respectively. It can be confirmed that the measured particle size belongs to easily penetrate the filter in theory during the printing process, even though the 3D printer has a high-efficiency filtration device. Therefore, it is recommended that the stack flue of the 3D printer would be equipped with an appropriate dust collection device to prevent the operators from exposing these hazardous particles.

Keywords: nanoparticle, particle emission, 3D printing, number concentration

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Authors: Dominic Wentworth-Linton, Shian Gao

Abstract:

This project was aimed at investigating the effect of velocity stacks on the intakes of internal combustion engines for motorsport applications. The intake systems in motorsport are predominantly fuel injection with a plate mounted for the stacks. Using Computational Fluid Dynamics software, the relationship between the stack length and power and torque delivery across the engine’s rev range was investigated and the results were used to choose the best option for its intended motorsport discipline. The test results are expected to vary with engine geometry and its natural manufacturer characteristics. The test was also relevant in bridging between computational data and real simulation as the results show flow, pressure and velocity readings but the behaviour of the engine is inferred from the nature of each test. The results of the data analysis were tested in a real-life simulation on a dynamometer to prove the theory of stack length on power and torque delivery, which helps determine the most suitable stack for the Vauxhall engine for rallying in the Caribbean.

Keywords: CFD simulation, Internal combustion engine, Intake system, Dynamometer test

Procedia PDF Downloads 256

Authors: You-Lin Wu, Yi-Hsing Sung, Shih-Hung Lin, Jing-Jenn Lin

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Performance improvement in optoelectronic devices such as solar cells and photodetectors has been reported when a polymer/ZnO nanorods stack is used. Resistance switching of polymer/ZnO nanocrystals (or nanorods) hybrid has also gained a lot of research interests recently. It has been reported that high- and low-resistance states of a metal/insulator/metal (MIM) structure diode with a polystyrene (PS) and ZnO hybrid as the insulator layer can be switched by applied bias after a high-voltage forming process, while the same device structure merely with a PS layer does not show any forming behavior. In this work, we investigated the current-voltage (I-V) characteristics of an MIM device with a PS/ZnO nanorods stack deposited on fluorine-doped tin oxide (FTO) glass substrate. The ZnO nanorods were grown by a hydrothermal method using a mixture of zinc nitrate, hexamethylenetetramine, and DI water. Following that, a PS layer was deposited by spin coating. Finally, the device with a structure of Ti/ PS/ZnO nanorods/FTO was completed by e-gun evaporated Ti layer on top of the PS layer. Semiconductor parameters analyzer Agilent 4156C was then used to measure the I-V characteristics of the device by applying linear ramp sweep voltage with sweep sequence of 0V → 4V → 0V → 3V → 0V → 2V → 0V → 1V → 0V in both positive and negative directions. It is interesting to find that the I-V characteristics are bias dependent and hysteretic, indicating that the device Ti/PS/ZnO nanorods/FTO structure has ferroelectricity. Our results also show that the maximum hysteresis loop height of the I-V characteristics as well as the voltage at which the maximum hysteresis loop height of each scan occurs increase with increasing maximum sweep voltage. It should be noticed that, although ferroelectricity has been found in ZnO at its melting temperature (1975℃) and in Li- or Co-doped ZnO, neither PS nor ZnO has ferroelectricity at room temperature. Using the same structure but with a PS or ZnO layer only as the insulator does not give and hysteretic I-V characteristics. It is believed that a charge polarization layer is induced near the PS/ZnO nanorods stack interface and thus causes the ferroelectricity in the device with Ti/PS/ZnO nanorods/FTO structure. Our results show that the PS/ZnO stack can find a potential application in a resistive switching memory device with MIM structure.

Keywords: ferroelectricity, hysteresis, polystyrene, resistance switching, ZnO nanorods

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Authors: Chao Yi, Cunyue Lu, Lingwei Quan

Abstract:

Piezoelectric linear motors have the characteristics of great electromagnetic compatibility, high positioning accuracy, compact structure and no deceleration mechanism, which make it promising to applicate in micro-miniature precision drive systems. However, most piezoelectric motors are employed by flexible clamping, which has insufficient rigidity and is difficult to use in rapid positioning. Another problem is that this clamping method seriously affects the vibration efficiency of the vibrating unit. In order to solve these problems, this paper proposes a piezoelectric stack linear motor based on double-end rigid clamping. First, a piezoelectric linear motor with a length of only 35.5 mm is designed. This motor is mainly composed of a motor stator, a driving foot, a ceramic friction strip, a linear guide, a pre-tightening mechanism and a base. This structure is much simpler and smaller than most similar motors, and it is easy to assemble as well as to realize precise control. In addition, the properties of piezoelectric stack are reviewed and in order to obtain the elliptic motion trajectory of the driving head, a driving scheme of the longitudinal-shear composite stack is innovatively proposed. Finally, impedance analysis and speed performance testing were performed on the piezoelectric linear motor prototype. The motor can measure speed up to 25.5 mm/s under the excitation of signal voltage of 120 V and frequency of 390 Hz. The result shows that the proposed piezoelectric stacked linear motor obtains great performance. It can run smoothly in a large speed range, which is suitable for various precision control in medical images, aerospace, precision machinery and many other fields.

Keywords: piezoelectric stack, linear motor, rigid clamping, elliptical trajectory

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Authors: Majid Ali, Xinfang Jin, Victor Eniola, Henning Hoene

Abstract:

The performance of proton exchange membrane (PEM) fuel cells is sensitive to several factors, including power fluctuations, hydrogen utilization, and the quality orientation of the fuel cell stack. In this study, we investigate the impact of these factors on the performance of a PEM fuel cell. We start by analyzing the power fluctuations that are typical in renewable energy systems and their effects on the 50 Watt fuel cell's performance. Next, we examine the hydrogen utilization rate (0-1000 mL/min) and its impact on the cell's efficiency and durability. Finally, we investigate the quality orientation (three different positions) of the fuel cell stack, which can significantly affect the cell's lifetime and overall performance. The basis of our analysis is the utilization of experimental results, which have been further validated by comparing them with simulations and manufacturer results. Our results indicate that power fluctuations can cause significant variations in the fuel cell's voltage and current, leading to a reduction in its performance. Moreover, we show that increasing the hydrogen utilization rate beyond a certain threshold can lead to a decrease in the fuel cell's efficiency. Finally, our analysis demonstrates that the orientation of the fuel cell stack can affect its performance and lifetime due to non-uniform distribution of reactants and products. In summary, our study highlights the importance of considering power fluctuations, hydrogen utilization, and quality orientation in designing and optimizing PEM fuel cell systems. The findings of this study can be useful for researchers and engineers working on the development of fuel cell systems for various applications, including transportation, stationary power generation, and portable devices.

Keywords: fuel cell, proton exchange membrane, renewable energy, power fluctuation, experimental

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