Search results for: property verification
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2041

Search results for: property verification

2041 A Formal Property Verification for Aspect-Oriented Programs in Software Development

Authors: Moustapha Bande, Hakima Ould-Slimane, Hanifa Boucheneb

Abstract:

Software development for complex systems requires efficient and automatic tools that can be used to verify the satisfiability of some critical properties such as security ones. With the emergence of Aspect-Oriented Programming (AOP), considerable work has been done in order to better modularize the separation of concerns in the software design and implementation. The goal is to prevent the cross-cutting concerns to be scattered across the multiple modules of the program and tangled with other modules. One of the key challenges in the aspect-oriented programs is to be sure that all the pieces put together at the weaving time ensure the satisfiability of the overall system requirements. Our paper focuses on this problem and proposes a formal property verification approach for a given property from the woven program. The approach is based on the control flow graph (CFG) of the woven program, and the use of a satisfiability modulo theories (SMT) solver to check whether each property (represented par one aspect) is satisfied or not once the weaving is done.

Keywords: aspect-oriented programming, control flow graph, property verification, satisfiability modulo theories

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2040 Functional and Stimuli Implementation and Verification of Programmable Peripheral Interface (PPI) Protocol

Authors: N. N. Joshi, G. K. Singh

Abstract:

We present the stimuli implementation and verification of a Programmable Peripheral Interface (PPI) 8255. It involves a designing and verification of configurable intellectual property (IP) module of PPI protocol using Verilog HDL for implementation part and System Verilog for verification. The overview of the PPI-8255 presented then the design specification implemented for the work following the functional description and pin configuration of PPI-8255. The coverage report of design shows that our design and verification environment covered 100% functionality in accordance with the design specification generated by the Questa Sim 10.0b.

Keywords: Programmable Peripheral Interface (PPI), verilog HDL, system verilog, questa sim

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2039 Novel Formal Verification Based Coverage Augmentation Technique

Authors: Surinder Sood, Debajyoti Mukherjee

Abstract:

Formal verification techniques have become widely popular in pre-silicon verification as an alternate to constrain random simulation based techniques. This paper proposed a novel formal verification-based coverage augmentation technique in verifying complex RTL functional verification faster. The proposed approach relies on augmenting coverage analysis coming from simulation and formal verification. Besides this, the functional qualification framework not only helps in improving the coverage at a faster pace but also aids in maturing and qualifying the formal verification infrastructure. The proposed technique has helped to achieve faster verification sign-off, resulting in faster time-to-market. The design picked had a complex control and data path and had many configurable options to meet multiple specification needs. The flow is generic, and tool independent, thereby leveraging across the projects and design will be much easier

Keywords: COI (cone of influence), coverage, formal verification, fault injection

Procedia PDF Downloads 87
2038 Effect of Clinical Depression on Automatic Speaker Verification

Authors: Sheeraz Memon, Namunu C. Maddage, Margaret Lech, Nicholas Allen

Abstract:

The effect of a clinical environment on the accuracy of the speaker verification was tested. The speaker verification tests were performed within homogeneous environments containing clinically depressed speakers only, and non-depresses speakers only, as well as within mixed environments containing different mixtures of both climatically depressed and non-depressed speakers. The speaker verification framework included the MFCCs features and the GMM modeling and classification method. The speaker verification experiments within homogeneous environments showed 5.1% increase of the EER within the clinically depressed environment when compared to the non-depressed environment. It indicated that the clinical depression increases the intra-speaker variability and makes the speaker verification task more challenging. Experiments with mixed environments indicated that the increase of the percentage of the depressed individuals within a mixed environment increases the speaker verification equal error rates.

Keywords: speaker verification, GMM, EM, clinical environment, clinical depression

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2037 Formal Verification of Cache System Using a Novel Cache Memory Model

Authors: Guowei Hou, Lixin Yu, Wei Zhuang, Hui Qin, Xue Yang

Abstract:

Formal verification is proposed to ensure the correctness of the design and make functional verification more efficient. As cache plays a vital role in the design of System on Chip (SoC), and cache with Memory Management Unit (MMU) and cache memory unit makes the state space too large for simulation to verify, then a formal verification is presented for such system design. In the paper, a formal model checking verification flow is suggested and a new cache memory model which is called “exhaustive search model” is proposed. Instead of using large size ram to denote the whole cache memory, exhaustive search model employs just two cache blocks. For cache system contains data cache (Dcache) and instruction cache (Icache), Dcache memory model and Icache memory model are established separately using the same mechanism. At last, the novel model is employed to the verification of a cache which is module of a custom-built SoC system that has been applied in practical, and the result shows that the cache system is verified correctly using the exhaustive search model, and it makes the verification much more manageable and flexible.

Keywords: cache system, formal verification, novel model, system on chip (SoC)

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2036 Signature Verification System for a Banking Business Process Management

Authors: A. Rahaf, S. Liyakathunsia

Abstract:

In today’s world, unprecedented operational pressure is faced by banks that test the efficiency, effectiveness, and agility of their business processes. In a typical banking process, a person’s authorization is usually based on his signature on most all of the transactions. Signature verification is considered as one of the highly significant information needed for any bank document processing. Banks usually use Signature Verification to authenticate the identity of individuals. In this paper, a business process model has been proposed in order to increase the quality of the verification process and to reduce time and needed resources. In order to understand the current process, a survey has been conducted and distributed among bank employees. After analyzing the survey, a process model has been created using Bizagi modeler which helps in simulating the process after assigning time and cost of it. The outcomes show that the automation of signature verification process is highly recommended for a banking business process.

Keywords: business process management, process modeling, quality, Signature Verification

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2035 Reform of the Law Relating to Personal Property Security

Authors: Ji Lian Yap

Abstract:

This paper will critically consider developments in 2014 in relation to the law relating to security over personal property in Hong Kong. The rules governing the registration of charges under the Hong Kong Companies Ordinance will be examined. Case law relating to personal property security will also be discussed. The transplantation of the floating charge into China’s Property Law will also be considered.

Keywords: personal property, security law, reform of the law, law

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2034 An Encapsulation of a Navigable Tree Position: Theory, Specification, and Verification

Authors: Nicodemus M. J. Mbwambo, Yu-Shan Sun, Murali Sitaraman, Joan Krone

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This paper presents a generic data abstraction that captures a navigable tree position. The mathematical modeling of the abstraction encapsulates the current tree position, which can be used to navigate and modify the tree. The encapsulation of the tree position in the data abstraction specification avoids the use of explicit references and aliasing, thereby simplifying verification of (imperative) client code that uses the data abstraction. To ease the tasks of such specification and verification, a general tree theory, rich with mathematical notations and results, has been developed. The paper contains an example to illustrate automated verification ramifications. With sufficient tree theory development, automated proving seems plausible even in the absence of a special-purpose tree solver.

Keywords: automation, data abstraction, maps, specification, tree, verification

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2033 Pyramid Binary Pattern for Age Invariant Face Verification

Authors: Saroj Bijarnia, Preety Singh

Abstract:

We propose a simple and effective biometrics system based on face verification across aging using a new variant of texture feature, Pyramid Binary Pattern. This employs Local Binary Pattern along with its hierarchical information. Dimension reduction of generated texture feature vector is done using Principal Component Analysis. Support Vector Machine is used for classification. Our proposed method achieves an accuracy of 92:24% and can be used in an automated age-invariant face verification system.

Keywords: biometrics, age invariant, verification, support vector machine

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2032 A Verification Intellectual Property for Multi-Flow Rate Control on Any Single Flow Bus Functional Model

Authors: Pawamana Ramachandra, Jitesh Gupta, Saranga P. Pogula

Abstract:

In verification of high volume and complex packet processing IPs, finer control of flow management aspects (for example, rate, bits/sec etc.) per flow class (or a virtual channel or a software thread) is needed. When any Software/Universal Verification Methodology (UVM) thread arbitration is left to the simulator (e.g., Verilog Compiler Simulator (VCS) or Incisive Enterprise Simulator core simulation engine (NCSIM)), it is hard to predict its pattern of resulting distribution of bandwidth by the simulator thread arbitration. In many cases, the patterns desired in a test scenario may not be accomplished as the simulator might give a different distribution than what was required. This can lead to missing multiple traffic scenarios, specifically deadlock and starvation related. We invented a component (namely Flow Manager Verification IP) to be intervening between the application (test case) and the protocol VIP (with UVM sequencer) to control the bandwidth per thread/virtual channel/flow. The Flow Manager has knobs visible to the UVM sequence/test to configure the required distribution of rate per thread/virtual channel/flow. This works seamlessly and produces rate stimuli to further harness the Design Under Test (DUT) with asymmetric inputs compared to the programmed bandwidth/Quality of Service (QoS) distributions in the Design Under Test.

Keywords: flow manager, UVM sequencer, rated traffic generation, quality of service

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2031 Examining the Relationship Between Traditional Property Rights and Online Intellectual Property Rights in the Digital Age

Authors: Luljeta Plakolli-Kasumi

Abstract:

In the digital age, the relationship between traditional property rights and online intellectual property rights is becoming increasingly complex. On the one hand, the internet and advancements in technology have allowed for the widespread distribution and use of digital content, making it easier for individuals and businesses to access and share information. On the other hand, the rise of digital piracy and illegal file-sharing has led to increased concerns about the protection of intellectual property rights. This paper aims to examine the relationship between traditional property rights and online intellectual property rights in the digital age by analyzing the current legal frameworks, key challenges and controversies that arise, and potential solutions for addressing these issues. The paper will look at how traditional property rights concepts such as ownership and possession are being applied in the online context and how they intersect with new and evolving forms of intellectual property such as digital downloads, streaming services, and online content creation. It will also discuss the tension between the need for strong intellectual property protection to encourage creativity and innovation and the public interest in promoting access to information and knowledge. Ultimately, the paper will explore how the legal system can adapt to better balance the interests of property owners, creators, and users in the digital age.

Keywords: intellectual property, traditional property, digital age, digital content

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2030 Approximation Property Pass to Free Product

Authors: Kankeyanathan Kannan

Abstract:

On approximation properties of group C* algebras is everywhere; it is powerful, important, backbone of countless breakthroughs. For a discrete group G, let A(G) denote its Fourier algebra, and let M₀A(G) denote the space of completely bounded Fourier multipliers on G. An approximate identity on G is a sequence (Φn) of finitely supported functions such that (Φn) uniformly converge to constant function 1 In this paper we prove that approximation property pass to free product.

Keywords: approximation property, weakly amenable, strong invariant approximation property, invariant approximation property

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2029 Physical Verification Flow on Multiple Foundries

Authors: Rohaya Abdul Wahab, Raja Mohd Fuad Tengku Aziz, Nazaliza Othman, Sharifah Saleh, Nabihah Razali, Muhammad Al Baqir Zinal Abidin, Md Hanif Md Nasir

Abstract:

This paper will discuss how we optimize our physical verification flow in our IC Design Department having various rule decks from multiple foundries. Our ultimate goal is to achieve faster time to tape-out and avoid schedule delay. Currently the physical verification runtimes and memory usage have drastically increased with the increasing number of design rules, design complexity and the size of the chips to be verified. To manage design violations, we use a number of solutions to reduce the amount of violations needed to be checked by physical verification engineers. The most important functions in physical verifications are DRC (design rule check), LVS (layout vs. schematic) and XRC (extraction). Since we have a multiple number of foundries for our design tape-outs, we need a flow that improve the overall turnaround time and ease of use of the physical verification process. The demand for fast turnaround time is even more critical since the physical design is the last stage before sending the layout to the foundries.

Keywords: physical verification, DRC, LVS, XRC, flow, foundry, runset

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2028 A Reduced Distributed Sate Space for Modular Petri Nets

Authors: Sawsen Khlifa, Chiheb AMeur Abid, Belhassan Zouari

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Modular verification approaches have been widely attempted to cope with the well known state explosion problem. This paper deals with the modular verification of modular Petri nets. We propose a reduced version for the modular state space of a given modular Petri net. The new structure allows the creation of smaller modular graphs. Each one draws the behavior of the corresponding module and outlines some global information. Hence, this version helps to overcome the explosion problem and to use less memory space. In this condensed structure, the verification of some generic properties concerning one module is limited to the exploration of its associated graph.

Keywords: distributed systems, modular verification, petri nets, state space explosition

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2027 Automatic Verification Technology of Virtual Machine Software Patch on IaaS Cloud

Authors: Yoji Yamato

Abstract:

In this paper, we propose an automatic verification technology of software patches for user virtual environments on IaaS Cloud to decrease verification costs of patches. In these days, IaaS services have been spread and many users can customize virtual machines on IaaS Cloud like their own private servers. Regarding to software patches of OS or middleware installed on virtual machines, users need to adopt and verify these patches by themselves. This task increases operation costs of users. Our proposed method replicates user virtual environments, extracts verification test cases for user virtual environments from test case DB, distributes patches to virtual machines on replicated environments and conducts those test cases automatically on replicated environments. We have implemented the proposed method on OpenStack using Jenkins and confirmed the feasibility. Using the implementation, we confirmed the effectiveness of test case creation efforts by our proposed idea of 2-tier abstraction of software functions and test cases. We also evaluated the automatic verification performance of environment replications, test cases extractions and test cases conductions.

Keywords: OpenStack, cloud computing, automatic verification, jenkins

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2026 Formal Verification for Ethereum Smart Contract Using Coq

Authors: Xia Yang, Zheng Yang, Haiyong Sun, Yan Fang, Jingyu Liu, Jia Song

Abstract:

The smart contract in Ethereum is a unique program deployed on the Ethereum Virtual Machine (EVM) to help manage cryptocurrency. The security of this smart contract is critical to Ethereum’s operation and highly sensitive. In this paper, we present a formal model for smart contract, using the separated term-obligation (STO) strategy to formalize and verify the smart contract. We use the IBM smart sponsor contract (SSC) as an example to elaborate the detail of the formalizing process. We also propose a formal smart sponsor contract model (FSSCM) and verify SSC’s security properties with an interactive theorem prover Coq. We found the 'Unchecked-Send' vulnerability in the SSC, using our formal model and verification method. Finally, we demonstrate how we can formalize and verify other smart contracts with this approach, and our work indicates that this formal verification can effectively verify the correctness and security of smart contracts.

Keywords: smart contract, formal verification, Ethereum, Coq

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2025 Identity Verification Using k-NN Classifiers and Autistic Genetic Data

Authors: Fuad M. Alkoot

Abstract:

DNA data have been used in forensics for decades. However, current research looks at using the DNA as a biometric identity verification modality. The goal is to improve the speed of identification. We aim at using gene data that was initially used for autism detection to find if and how accurate is this data for identification applications. Mainly our goal is to find if our data preprocessing technique yields data useful as a biometric identification tool. We experiment with using the nearest neighbor classifier to identify subjects. Results show that optimal classification rate is achieved when the test set is corrupted by normally distributed noise with zero mean and standard deviation of 1. The classification rate is close to optimal at higher noise standard deviation reaching 3. This shows that the data can be used for identity verification with high accuracy using a simple classifier such as the k-nearest neighbor (k-NN). 

Keywords: biometrics, genetic data, identity verification, k nearest neighbor

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2024 Failure Analysis and Verification Using an Integrated Method for Automotive Electric/Electronic Systems

Authors: Lei Chen, Jian Jiao, Tingdi Zhao

Abstract:

Failures of automotive electric/electronic systems, which are universally considered to be safety-critical and software-intensive, may cause catastrophic accidents. Analysis and verification of failures in these kinds of systems is a big challenge with increasing system complexity. Model-checking is often employed to allow formal verification by ensuring that the system model conforms to specified safety properties. The system-level effects of failures are established, and the effects on system behavior are observed through the formal verification. A hazard analysis technique, called Systems-Theoretic Process Analysis, is capable of identifying design flaws which may cause potential failure hazardous, including software and system design errors and unsafe interactions among multiple system components. This paper provides a concept on how to use model-checking integrated with Systems-Theoretic Process Analysis to perform failure analysis and verification of automotive electric/electronic systems. As a result, safety requirements are optimized, and failure propagation paths are found. Finally, an automotive electric/electronic system case study is used to verify the effectiveness and practicability of the method.

Keywords: failure analysis and verification, model checking, system-theoretic process analysis, automotive electric/electronic system

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2023 Online Authenticity Verification of a Biometric Signature Using Dynamic Time Warping Method and Neural Networks

Authors: Gałka Aleksandra, Jelińska Justyna, Masiak Albert, Walentukiewicz Krzysztof

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An offline signature is well-known however not the safest way to verify identity. Nowadays, to ensure proper authentication, i.e. in banking systems, multimodal verification is more widely used. In this paper the online signature analysis based on dynamic time warping (DTW) coupled with machine learning approaches has been presented. In our research signatures made with biometric pens were gathered. Signature features as well as their forgeries have been described. For verification of authenticity various methods were used including convolutional neural networks using DTW matrix and multilayer perceptron using sums of DTW matrix paths. System efficiency has been evaluated on signatures and signature forgeries collected on the same day. Results are presented and discussed in this paper.

Keywords: dynamic time warping, handwritten signature verification, feature-based recognition, online signature

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2022 Satellite Technology Usage for Greenhouse Gas Emissions Monitoring and Verification: Policy Considerations for an International System

Authors: Timiebi Aganaba-Jeanty

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Accurate and transparent monitoring, reporting and verification of Greenhouse Gas (GHG) emissions and removals is a requirement of the United Nations Framework Convention on Climate Change (UNFCCC). Several countries are obligated to prepare and submit an annual national greenhouse gas inventory covering anthropogenic emissions by sources and removals by sinks, subject to a review conducted by an international team of experts. However, the process is not without flaws. The self-reporting varies enormously in thoroughness, frequency and accuracy including inconsistency in the way such reporting occurs. The world’s space agencies are calling for a new generation of satellites that would be precise enough to map greenhouse gas emissions from individual nations. The plan is delicate politically because the global system could verify or cast doubt on emission reports from the member states of the UNFCCC. A level playing field is required and an idea that an international system should be perceived as an instrument to facilitate fairness and equality rather than to spy on or punish. This change of perspective is required to get buy in for an international verification system. The research proposes the viability of a satellite system that provides independent access to data regarding greenhouse gas emissions and the policy and governance implications of its potential use as a monitoring and verification system for the Paris Agreement. It assesses the foundations of the reporting monitoring and verification system as proposed in Paris and analyzes this in light of a proposed satellite system. The use of remote sensing technology has been debated for verification purposes and as evidence in courts but this is not without controversy. Lessons can be learned from its use in this context.

Keywords: greenhouse gas emissions, reporting, monitoring and verification, satellite, UNFCCC

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2021 The Co-Simulation Interface SystemC/Matlab Applied in JPEG and SDR Application

Authors: Walid Hassairi, Moncef Bousselmi, Mohamed Abid

Abstract:

Functional verification is a major part of today’s system design task. Several approaches are available for verification on a high abstraction level, where designs are often modeled using MATLAB/Simulink. However, different approaches are a barrier to a unified verification flow. In this paper, we propose a co-simulation interface between SystemC and MATLAB and Simulink to enable functional verification of multi-abstraction levels designs. The resulting verification flow is tested on JPEG compression algorithm. The required synchronization of both simulation environments, as well as data type conversion is solved using the proposed co-simulation flow. We divided into two encoder jpeg parts. First implemented in SystemC which is the DCT is representing the HW part. Second, consisted of quantization and entropy encoding which is implemented in Matlab is the SW part. For communication and synchronization between these two parts we use S-Function and engine in Simulink matlab. With this research premise, this study introduces a new implementation of a Hardware SystemC of DCT. We compare the result of our simulation compared to SW / SW. We observe a reduction in simulation time you have 88.15% in JPEG and the design efficiency of the supply design is 90% in SDR.

Keywords: hardware/software, co-design, co-simulation, systemc, matlab, s-function, communication, synchronization

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2020 Technology Assessment: Exploring Possibilities to Encounter Problems Faced by Intellectual Property through Blockchain

Authors: M. Ismail, E. Grifell-Tatjé, A. Paz

Abstract:

A significant discussion on the topic of blockchain as a solution to the issues of intellectual property highlights the relevance that this topic holds. Some experts label this technology as destructive since it holds immense potential to change course of traditional practices. The extent and areas to which this technology can be of use are still being researched. This paper provides an in-depth review on the intellectual property and blockchain technology. Further it explores what makes blockchain suitable for intellectual property, the practical solutions available and the support different governments are offering. This paper further studies the framework of universities in context of its outputs and how can they be streamlined using blockchain technology. The paper concludes by discussing some limitations and future research question.

Keywords: blockchain, decentralization, open innovation, intellectual property, patents, university-industry relationship

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2019 The Importance of Intellectual Property for Universities of Technology in South Africa: Challenges Faced and Proposed Way Forward

Authors: Martha E. Ikome, John M. Ikome

Abstract:

Intellectual property should be a day-to-day business decision due to its value, but increasingly, a number of institution are still not aware of the importance. Intellectual Property (IP) and its value are often not adequately appreciated. In the increasingly knowledge-driven economy, IP is a key consideration in day-to-day business decisions because new ideas and products appear almost daily in the market, which results in continuous innovation and research. Therefore, this paper will focus on the importance of IP for universities of technology and also further demonstrates how IP can become an economic tool and the challenges faced by these universities in implementing an IP system.

Keywords: intellectual property, institutions, challenges, protection

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2018 Stability of Property (gm) under Perturbation and Spectral Properties Type Weyl Theorems

Authors: M. H. M. Rashid

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A Banach space operator T obeys property (gm) if the isolated points of the spectrum σ(T) of T which are eigenvalues are exactly those points λ of the spectrum for which T − λI is a left Drazin invertible. In this article, we study the stability of property (gm), for a bounded operator acting on a Banach space, under perturbation by finite rank operators, by nilpotent operators, by quasi-nilpotent operators, or more generally by algebraic operators commuting with T.

Keywords: Weyl's Theorem, Weyl Spectrum, Polaroid operators, property (gm)

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2017 A Proposal for Systematic Mapping Study of Software Security Testing, Verification and Validation

Authors: Adriano Bessa Albuquerque, Francisco Jose Barreto Nunes

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Software vulnerabilities are increasing and not only impact services and processes availability as well as information confidentiality, integrity and privacy, but also cause changes that interfere in the development process. Security test could be a solution to reduce vulnerabilities. However, the variety of test techniques with the lack of real case studies of applying tests focusing on software development life cycle compromise its effective use. This paper offers an overview of how a Systematic Mapping Study (MS) about security verification, validation and test (VVT) was performed, besides presenting general results about this study.

Keywords: software test, software security verification validation and test, security test institutionalization, systematic mapping study

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2016 Biometric Identification with Latitude and Longitude Fingerprint Verification for Attendance

Authors: Muhammad Fezan Afzal, Imran Khan, Salma Imtiaz

Abstract:

The need for human verification and identification requires from centuries for authentication. Since it is being used in big institutes like financial, government and crime departments, a continued struggle is important to make this system more efficient to prevent security breaches. Therefore, multiple devices are used to authenticate the biometric for each individual. A large number of devices are required to cover a large number of users. As the number of devices increases, cost will automatically increase. Furthermore, it is time-consuming for biometrics due to the devices being insufficient and are not available at every door. In this paper, we propose the framework and algorithm where the mobile of each individual can also perform the biometric authentication of attendance and security. Every mobile has a biometric authentication system that is used in different mobile applications for security purposes. Therefore, each individual can use the biometric system mobile without moving from one place to another. Moreover, by using the biometrics mobile, the cost of biometric systems can be removed that are mostly deployed in different organizations for the attendance of students, employees and for other security purposes.

Keywords: fingerprint, fingerprint authentication, mobile verification, mobile biometric verification, mobile fingerprint sensor

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2015 Guarding the Fortress: Intellectual Property Rights and the European Union’s Cross-Border Jurisdiction

Authors: Sara Vora (Hoxha)

Abstract:

The present article delves into the intricate matters concerning Intellectual Property Rights (IPR) and cross-border jurisdiction within the confines of the European Union (EU). The prevalence of cross-border intellectual property rights (IPR) disputes has increased in tandem with the globalization of commerce and the widespread adoption of technology. The European Union (EU) is not immune to this trend. The manuscript presents a comprehensive analysis of various forms of intellectual property rights (IPR), such as patents, trademarks, and copyrights, and the regulatory framework established by the European Union (EU) to oversee these rights. The present article examines the diverse approaches employed for ascertaining the appropriate jurisdiction within the European Union (EU), and their potential application in the sphere of cross-border intellectual property rights (IPR) conflicts. The article sheds light on jurisdictional issues and outcomes of significant cross-border intellectual property rights (IPR) disputes in the European Union (EU). Additionally, the document provides suggestions for effectively managing intellectual property rights conflicts across borders within the European Union, which encompasses the utilization of alternative methods for resolving disputes. The article highlights the significance of comprehending the relevant jurisdiction in the European Union for Intellectual Property Rights (IPR). It also offers optimal approaches for enterprises and individuals who aim to safeguard their intellectual property beyond national boundaries. The primary objective of this article is to furnish a thorough comprehension of Intellectual Property Rights (IPR) and the relevant jurisdiction in the European Union (EU). Additionally, it endeavors to provide pragmatic recommendations for managing cross-border IPR conflicts in this intricate and ever-changing legal milieu.

Keywords: intellectual property rights (IPR), cross-border jurisdiction, applicable laws and regulations, dispute resolution, best practices

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2014 Automation Test Method and HILS Environment Configuration for Hydrogen Storage System Management Unit Verification

Authors: Jaejeogn Kim, Jeongmin Hong, Jungin Lee

Abstract:

The Hydrogen Storage System Management Unit (HMU) is a controller that manages hydrogen charging and storage. It detects hydrogen leaks and tank pressure and temperature, calculates the charging concentration and remaining amount, and controls the opening and closing of the hydrogen tank valve. Since this role is an important part of the vehicle behavior and stability of Fuel Cell Electric Vehicles (FCEV), verifying the HMU controller is an essential part. To perform verification under various conditions, it is necessary to increase time efficiency based on an automated verification environment and increase the reliability of the controller by applying numerous test cases. To this end, we introduce the HMU controller automation verification method by applying the HILS environment and an automation test program with the ASAM XIL standard.

Keywords: HILS, ASAM, fuel cell electric vehicle, automation test, hydrogen storage system

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2013 The Term of Intellectual Property and Artificial Intelligence

Authors: Yusuf Turan

Abstract:

Definition of Intellectual Property Rights according to the World Intellectual Property Organization: " Intellectual property (IP) refers to creations of the mind, such as inventions; literary and artistic works; designs; and symbols, names and images used in commerce." It states as follows. There are 2 important points in the definition; we can say that it is the result of intellectual activities that occur by one or more than one PERSON and as INNOVATION. When the history and development of the relevant definitions are briefly examined, it is realized that these two points have remained constant and Intellectual Property law and rights have been shaped around these two points. With the expansion of the scope of the term Intellectual Property as a result of the development of technology, especially in the field of artificial intelligence, questions such as "Can "Artificial Intelligence" be an inventor?" need to be resolved within the expanding scope. In the past years, it was ruled that the artificial intelligence named DABUS seen in the USA did not meet the definition of "individual" and therefore would be an inventor/inventor. With the developing technology, it is obvious that we will encounter such situations much more frequently in the field of intellectual property. While expanding the scope, we should definitely determine the boundaries of how we should decide who performs the mental activity or creativity that we call indispensable on the inventor/inventor according to these problems. As a result of all these problems and innovative situations, it is clearly realized that not only Intellectual Property Law and Rights but also their definitions need to be updated and improved. Ignoring the situations that are outside the scope of the current Intellectual Property Term is not enough to solve the problem and brings uncertainty. The fact that laws and definitions that have been operating on the same theories for years exclude today's innovative technologies from the scope contradicts intellectual property, which is expressed as a new and innovative field. Today, as a result of the innovative creation of poetry, painting, animation, music and even theater works with artificial intelligence, it must be recognized that the definition of Intellectual Property must be revised.

Keywords: artificial intelligence, innovation, the term of intellectual property, right

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2012 Leveraging Hyperledger Iroha for the Issuance and Verification of Higher-Education Certificates

Authors: Vasiliki Vlachou, Christos Kontzinos, Ourania Markaki, Panagiotis Kokkinakos, Vagelis Karakolis, John Psarras

Abstract:

Higher Education is resisting the pull of technology, especially as this concerns the issuance and verification of degrees and certificates. It is widely known that education certificates are largely produced in paper form making them vulnerable to damage while holders of such certificates are dependent on the universities and other issuing organisations. QualiChain is an EU Horizon 2020 (H2020) research project aiming to transform and revolutionise the domain of public education and its ties with the job market by leveraging blockchain, analytics and decision support to develop a platform for the verification and sharing of education certificates. Blockchain plays an integral part in the QualiChain solution in providing a trustworthy environment to store, share and manage such accreditations. Under the context of this paper, three prominent blockchain platforms (Ethereum, Hyperledger Fabric, Hyperledger Iroha) were considered as a means of experimentation for creating a system with the basic functionalities that will be needed for trustworthy degree verification. The methodology and respective system developed and presented in this paper used Hyperledger Iroha and proved that this specific platform can be used to easily develop decentralize applications. Future papers will attempt to further experiment with other blockchain platforms and assess which has the best potential.

Keywords: blockchain, degree verification, higher education certificates, Hyperledger Iroha

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