Search results for: one transistor and one resistor (1T1R)

Authors: Daniel P. Clayton, Edward A. Ball

Abstract:

This paper describes an investigation into the isolation characteristics and bandwidth performance of RF combiners that are used as part of Chireix PA architectures, designed for use in the X-Band range of frequencies. Combiner designs investigated are the typical Chireix and Wilkinson configurations which also include simulation of the Wilkinson using manufacturer’s data for the isolation resistor. Another simulation was the less common approach of using a Branchline coupler to form the combiner, as well as simulation results from adding an additional stage. This paper presents the findings of this investigation and compares the bandwidth performance and isolation characteristics to determine suitability.

Keywords: bandwidth, Chireix, couplers, outphasing, power amplifiers, Wilkinson, X-Band

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Authors: Meng-Jie Hsiao, Cam Nguyen

Abstract:

Wide-band devices in Ku band (12-18 GHz) and K band (18-27 GHz) have received significant attention for high-data-rate communications and high-resolution sensing. Especially, devices operating around 24 GHz is attractive due to the 24-GHz unlicensed applications. One of the most important components in RF systems is power amplifier (PA). Various PAs have been developed in the Ku and K bands on GaAs, InP, and silicon (Si) processes. Although the PAs using GaAs or InP process could have better power handling and efficiency than those realized on Si, it is very hard to integrate the entire system on the same substrate for GaAs or InP. Si, on the other hand, facilitates single-chip systems. Hence, good PAs on Si substrate are desirable. Especially, Si-based PA having good linearity is necessary for next generation communication protocols implemented on Si. We report a 16.5 to 25.5 GHz Si-based PA having flat saturated power of 19.5 ± 1.5 dBm, output 1-dB power compression (OP1dB) of 16.5 ± 1.5 dBm, and 15-23 % power added efficiency (PAE). The PA consists of a drive amplifier, two main amplifiers, and lump-element Wilkinson power divider and combiner designed and fabricated in TowerJazz 0.18µm SiGe BiCMOS process having unity power gain frequency (fMAX) of more than 250 GHz. The PA is realized as a cascode amplifier implementing both heterojunction bipolar transistor (HBT) and n-channel metal–oxide–semiconductor field-effect transistor (NMOS) devices for gain, frequency response, and linearity consideration. Particularly, a body-floating technique is utilized for the NMOS devices to improve the voltage swing and eliminate parasitic capacitances. The developed PA has measured flat gain of 20 ± 1.5 dB across 16.5-25.5 GHz. At 24 GHz, the saturated power, OP1dB, and maximum PAE are 20.8 dBm, 18.1 dBm, and 23%, respectively. Its high performance makes it attractive for use in Ku/K-band, especially 24 GHz, communication and radar systems. This paper was made possible by NPRP grant # 6-241-2-102 from the Qatar National Research Fund (a member of Qatar Foundation). The statements made herein are solely the responsibility of the authors.

Keywords: power amplifiers, amplifiers, communication systems, radar systems

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Authors: Nishant Singh, Christian Huyck, Vaibhav Gandhi, Alexander Jones

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A robotic arm and hand controlled by simulated neurons is presented. The robot makes use of a biological neuron simulator using a point neural model. The neurons and synapses are organised to create a finite state automaton including neural inputs from sensors, and outputs to effectors. The robot performs a simple pick-and-place task. This work is a proof of concept study for a longer term approach. It is hoped that further work will lead to more effective and flexible robots. As another benefit, it is hoped that further work will also lead to a better understanding of human and other animal neural processing, particularly for physical motion. This is a multidisciplinary approach combining cognitive neuroscience, robotics, and psychology.

Keywords: cell assembly, force sensitive resistor, robot, spiking neuron

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Authors: Nkwachukwu Chukwuchekwa, Joy Ulumma Chukwuchekwa

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Magnetic characteristics of grain-oriented electrical steel (GOES) are usually measured at high flux densities suitable for its typical applications in power transformers. There are limited magnetic data at low flux densities which are relevant for the characterization of GOES for applications in metering instrument transformers and low frequency magnetic shielding in magnetic resonance imaging medical scanners. Magnetic properties such as coercivity, B-H loop, AC relative permeability and specific power loss of conventional grain oriented (CGO) and high permeability grain oriented (HGO) electrical steels were measured and compared at high and low flux densities at power magnetising frequency. 40 strips comprising 20 CGO and 20 HGO, 305 mm x 30 mm x 0.27 mm from a supplier were tested. The HGO and CGO strips had average grain sizes of 9 mm and 4 mm respectively. Each strip was singly magnetised under sinusoidal peak flux density from 8.0 mT to 1.5 T at a magnetising frequency of 50 Hz. The novel single sheet tester comprises a personal computer in which LabVIEW version 8.5 from National Instruments (NI) was installed, a NI 4461 data acquisition (DAQ) card, an impedance matching transformer, to match the 600  minimum load impedance of the DAQ card with the 5 to 20  low impedance of the magnetising circuit, and a 4.7 Ω shunt resistor. A double vertical yoke made of GOES which is 290 mm long and 32 mm wide is used. A 500-turn secondary winding, about 80 mm in length, was wound around a plastic former, 270 mm x 40 mm, housing the sample, while a 100-turn primary winding, covering the entire length of the plastic former was wound over the secondary winding. A standard Epstein strip to be tested is placed between the yokes. The magnetising voltage was generated by the LabVIEW program through a voltage output from the DAQ card. The voltage drop across the shunt resistor and the secondary voltage were acquired by the card for calculation of magnetic field strength and flux density respectively. A feedback control system implemented in LabVIEW was used to control the flux density and to make the induced secondary voltage waveforms sinusoidal to have repeatable and comparable measurements. The low noise NI4461 card with 24 bit resolution and a sampling rate of 204.8 KHz and 92 KHz bandwidth were chosen to take the measurements to minimize the influence of thermal noise. In order to reduce environmental noise, the yokes, sample and search coil carrier were placed in a noise shielding chamber. HGO was found to have better magnetic properties at both high and low magnetisation regimes. This is because of the higher grain size of HGO and higher grain-grain misorientation of CGO. HGO is better CGO in both low and high magnetic field applications.

Keywords: flux density, electrical steel, LabVIEW, magnetization

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Authors: Petr Vaculik

Abstract:

The newest semiconductor devices on the market are MOSFET transistors based on the silicon carbide – SiC. This material has exclusive features thanks to which it becomes a better switch than Si – silicon semiconductor switch. There are some special features that need to be understood to enable the device’s use to its full potential. The advantages and differences of SiC MOSFETs in comparison with Si IGBT transistors have been described in first part of this article. Second part describes driver for SiC MOSFET transistor and last part of article represents SiC MOSFET in the application of buck converter (step-down) and design of simple RC snubber.

Keywords: SiC, Si, MOSFET, IGBT, SBD, RC snubber

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Authors: Lekshmi Vijayan, K. Shreekrishna Kumar

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We demonstrated an organic field effect transistor based photodetector using phthalocyanine as the active material that exhibited high photosensitivity under varying light wavelengths. The thermally grown SiO₂ layer on silicon wafer act as a substrate. The critical parameters, such as photosensitivity, responsivity and detectivity, are comparatively high and were 3.09, 0.98AW⁻¹ and 4.86 × 10¹⁰ Jones, respectively, under a bias of 5 V and a monochromatic illumination intensity of 4mW cm⁻². The photodetector has a linear I-V curve with a low dark current. On comparing photoresponse of copper phthalocyanine at four different wavelengths, 560 nm shows better photoresponse and the highest value of photosensitivity is also obtained.

Keywords: photodetector, responsivity, photosensitivity, detectivity

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Authors: A.N. Moulay Khatir, A. Guen-Bouazza, B. Bouazza

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SOI-Multifin-FET shows excellent transistor characteristics, ideal sub-threshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency. In this work, we analyzed this combination by a three-dimensional numerical device simulator to investigate the influence of fins number on corner effect by analyzing its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current for SOI-single-fin FET, three-fin and five-fin, and we provide a comparison with a Trigate SOI Multi-FinFET structure.

Keywords: SOI, FinFET, corner effect, dual-gate, tri-gate, Multi-Fin FET

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Authors: Azizi Cherifa, O. Benzaoui

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The thermal aspects in the design of power circuits often deserve as much attention as pure electric components aspects as the operating temperature has a direct influence on their static and dynamic characteristics. MOSFET is fundamental in the circuits, it is the most widely used device in the current production of semiconductor components using their honorable performance. The aim of this contribution is devoted to the effect of the temperature on the properties of MOSFETs. The study enables us to calculate the drain current as function of bias in both linear and saturated modes. The effect of temperature is evaluated using a numerical simulation, using the laws of mobility and saturation velocity of carriers as a function of temperature.

Keywords: temperature, MOSFET, mobility, transistor

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Authors: Samaniego Campoverde José Enrique, Rosero Muñoz Jorge Enrique, Luzcando Narea Lorena Elizabeth

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This paper presents a practical and theoretical model for the operation of the Tesla coil using digital signal processing. The research is based on the analysis of ten scientific papers exploring the development and operation of the Tesla coil. Starting from the Testa coil, several modifications were carried out on the Tesla coil, with the aim of amplifying the digital signal by making use of digital signal processing. To achieve this, an amplifier with a transistor and digital filters provided by MATLAB software were used, which were chosen according to the characteristics of the signals in question.

Keywords: tesla coil, digital signal process, equalizer, graphical environment

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Authors: Anwar H. Jarndal, Ahmed S. Elwakil

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In this paper, a fraction-order model for pad parasitic effect of GaN HEMT on Si substrate is developed and validated. Open de-embedding structure is used to characterize and de-embed substrate loading parasitic effects. Unbiased device measurements are implemented to extract parasitic inductances and resistances. The model shows very good simulation for S-parameter measurements under different bias conditions. It has been found that this approach can improve the simulation of intrinsic part of the transistor, which is very important for small- and large-signal modeling process.

Keywords: fractional-order modeling, GaNHEMT, si-substrate, open de-embedding structure

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Authors: Yasunori Kobori, Murong Li, Feng Zhao, Shu Wu, Nobukazu Takai, Haruo Kobayashi

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This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors with capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the average of LED current of 350 mA.

Keywords: DC-DC buck converter, four-level output voltage, single inductor multi output (SIMO), switching converter

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Authors: Mourad Hrizi

Abstract:

In this paper, we study the inverse problem of reconstructing an interior interface D appearing in the elliptic partial differential equation: Δu+χ(D)u=0 from the knowledge of the boundary measurements. This problem arises from a semiconductor transistor model. We propose a new shape reconstruction procedure that is based on the Kohn-Vogelius formulation and the topological sensitivity method. The inverse problem is formulated as a topology optimization one. A topological sensitivity analysis is derived from a function. The unknown subdomain D is reconstructed using a level-set curve of the topological gradient. Finally, we give several examples to show the viability of our proposed method.

Keywords: inverse problem, topological optimization, topological gradient, Kohn-Vogelius formulation

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Authors: Mehdi Saeidmanesh, Razali Ismail

Abstract:

Recently, Graphene Nanoribbon Field Effect Transistors (GNR FETs) attract a great deal of attention due to their better performance in comparison with conventional devices. In this paper, channel length Modulation (CLM) effect on the electrical characteristics of GNR FETs is analytically studied and modeled. To this end, the special distribution of the electric potential along the channel and current-voltage characteristic of the device is modeled. The obtained results of analytical model are compared to the experimental data of published works. As a result, it is observable that considering the effect of CLM, the current-voltage response of GNR FET is more realistic.

Keywords: graphene nanoribbon, field effect transistors, short channel effects, channel length modulation

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Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

Abstract:

This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

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Authors: N. Massoum, B. Bouazza

Abstract:

In this paper, we have developed a numerical simulation model to describe the electrical properties of GaInP MESFET with submicron gate (Lg = 0.5 µm). This model takes into account the three-dimensional (3D) distribution of the load in the short channel and the law effect of mobility as a function of electric field. Simulation software based on a stochastic method such as Monte Carlo has been established. The results are discussed and compared with those of the experiment. The result suggests experimentally that, in a very small gate length in our devices (smaller than 40 nm), short-channel tunneling explains the degradation of transistor performance, which was previously enhanced by velocity overshoot.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device, simulation software

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Authors: A. boursali, A. Guen Bouazza, M. Khaouani, Z. Kourdi, B. Bouazza

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This paper presents the design, development and characterization of the devices simulation for X-Band Radar applications. The effect of an InAlN/GaN structure on the RF performance High Electron Mobility Transistor (HEMT) device. Systematic investigations on the small signal as well as power performance as functions of the drain biases are presented. Were improved for X-band applications. The Power Added Efficiency (PAE) was achieved over 23% for X-band. The developed devices combine two InAlN/GaN HEMTs of 30nm gate periphery and exhibited the output power of over 50W. An InAlN/GaN HEMT with 30nm gate periphery was developed and exhibited the output power of over 120W.

Keywords: InAlN/GaN, HEMT, RF analyses, PAE, X-Band, radar

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Authors: Khaoula Bensaida, Osama Eljamal

Abstract:

The electrical energy generation through Microbial Fuel Cells (MFCs) using microorganisms is a renewable and sustainable approach. It creates truly an efficient technology for power production and wastewater treatment. MFC is an electrochemical device which turns wastewater into electricity. The most important part of MFC is microbes. Nano zero-valent Iron NZVI technique was successfully applied in degrading the chemical pollutants and cleaning wastewater. However, the use of NZVI for enhancing the current production is still not confirmed yet. This study aims to confirm the effect of these particles on the current generation by using MFC. A constructed microbial fuel cell, which utilizes domestic wastewater, has been considered for wastewater treatment and bio-electricity generation. The two electrodes were connected to an external resistor (200 ohms). Experiments were conducted in two steps. First, the MFC was constructed without adding NZVI particles (Control) while at a second step, nanoparticles were added with a concentration of 50mg/L. After 20 hours, the measured voltage increased to 5 and 8mV, respectively. To conclude, the use of zero-valent iron in an MFC system can increase electricity generation.

Keywords: bacterial growth, electricity generation, microbial fuel cell MFC, nano zero-valent iron NZVI.

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Authors: A. N. Moulai Khatir

Abstract:

SOI-Multifin-FETs are placed to be the workhorse of the industry for the coming few generations, and thus, in a few years because their excellent transistor characteristics, ideal sub-threshold swing, low drain induced barrier lowering (DIBL) without pocket implantation, and negligible body bias dependency. The corner effect may also exist in the two lower corners; this effect is called the BOX effect, which can also occur in the direction X-Z. The electric field lines from the source and drain cross the bottom oxide and arrive in the silicon. This effect is also called DIVSB (Drain Induced Virtual Substrate Basing). The potential in the silicon film in particular near the drain is increased by the drain bias. It is similar to DIBL and result in a decrease of the threshold voltage. This work provides an understanding of the limitation of this effect by reducing the fin width for components with increased fin number.

Keywords: SOI, finFET, corner effect, dual-gate, tri-gate, BOX, multi-finFET

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Authors: Mohsen Khaledian, Razali Ismail, Mehdi Saeidmanesh, Mahdiar Hosseinghadiry

Abstract:

A semi-analytical model for impact ionization coefficient of graphene nanoribbon (GNR) is presented. The model is derived by calculating probability of electrons reaching ionization threshold energy Et and the distance traveled by electron gaining Et. In addition, ionization threshold energy is semi-analytically modeled for GNR. We justify our assumptions using analytic modeling and comparison with simulation results. Gaussian simulator together with analytical modeling is used in order to calculate ionization threshold energy and Kinetic Monte Carlo is employed to calculate ionization coefficient and verify the analytical results. Finally, the profile of ionization is presented using the proposed models and simulation and the results are compared with that of silicon.

Keywords: nanostructures, electronic transport, semiconductor modeling, systems engineering

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Authors: Abdalla Mohamed Eblabla

Abstract:

Due to the high increase and demand for a wide assortment of applications that require low-cost, high-efficiency, and compact systems, RF power amplifiers are considered the most critical design blocks and power consuming components in wireless communication, TV transmission, radar, and RF heating. Therefore, much research has been carried out in order to improve the performance of power amplifiers. Classes-A, B, C, D, E, and F are the main techniques for realizing power amplifiers. An implementation of high efficiency class-F power amplifier with Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) was realized in this paper. The simulation and optimization of the class-F power amplifier circuit model was undertaken using Agilent’s Advanced Design system (ADS). The circuit was designed using lumped elements.

Keywords: Power Amplifier (PA), gallium nitride (GaN), Agilent’s Advanced Design System (ADS), lumped elements

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Authors: Dawit Burusie Abdi, Mamidala Jagadesh Kumar

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In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.

Keywords: dual material gate, suppressing ambipolar current, symmetrically doped TFET, tunnel FETs, PNPN TFET

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Authors: Kiran Jose, Anjana J. G., Venu Anand, Aswathi R. Nair

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This work investigates the change in structural, optical, and electrical properties of Zinc Oxynitride (ZnON) thin film when annealed in different atmospheres. ZnON film is prepared by reactively sputtering the Zinc target using argon, oxygen, and nitrogen. The deposited film is annealed for one hour at 3250C in the Vaccum condition and Nitrogen and oxygen atmospheres. XRD and Raman spectroscopy is used to study the structural properties of samples. The current conduction mechanism is examined by extracting voltage versus current characteristics on a logarithmic scale, and the optical response is quantified by analyzing persistent photoconductivity (PPC) behavior. This study proposes the optimum annealing atmosphere for ZnON thin film for a better transistor and photosensor application.

Keywords: Zinc oxynitride, thin film, annealing, DC sputtering

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Authors: Yu-Hsien Lin, Yu-Ru Lin, Yung-Chun Wu

Abstract:

This work demonstrates the ultra-thin poly-Si (polycrystalline Silicon) nanowire junctionless thin film transistors (NWs JL-TFT) with nickel silicide contact. For nickel silicide film, this work designs to use two-step annealing to form ultra-thin, uniform and low sheet resistance (Rs) Ni silicide film. The NWs JL-TFT with nickel silicide contact exhibits the good electrical properties, including high driving current (>10⁷ Å), subthreshold slope (186 mV/dec.), and low parasitic resistance. In addition, this work also compares the electrical characteristics of NWs JL-TFT with nickel silicide and non-silicide contact. Nickel silicide techniques are widely used for high-performance devices as the device scaling due to the source/drain sheet resistance issue. Therefore, the self-aligned silicide (salicide) technique is presented to reduce the series resistance of the device. Nickel silicide has several advantages including low-temperature process, low silicon consumption, no bridging failure property, smaller mechanical stress, and smaller contact resistance. The junctionless thin-film transistor (JL-TFT) is fabricated simply by heavily doping the channel and source/drain (S/D) regions simultaneously. Owing to the special doping profile, JL-TFT has some advantages such as lower thermal the budget which can integrate with high-k/metal-gate easier than conventional MOSFETs (Metal Oxide Semiconductor Field-Effect Transistors), longer effective channel length than conventional MOSFETs, and avoidance of complicated source/drain engineering. To solve JL-TFT has turn-off problem, JL-TFT needs ultra-thin body (UTB) structure to reach fully depleted channel region in off-state. On the other hand, the drive current (Iᴅ) is declined as transistor features are scaled. Therefore, this work demonstrates ultra thin poly-Si nanowire junctionless thin film transistors with nickel silicide contact. This work investigates the low-temperature formation of nickel silicide layer by physical-chemical deposition (PVD) of a 15nm Ni layer on the poly-Si substrate. Notably, this work designs to use two-step annealing to form ultrathin, uniform and low sheet resistance (Rs) Ni silicide film. The first step was promoted Ni diffusion through a thin interfacial amorphous layer. Then, the unreacted metal was lifted off after the first step. The second step was annealing for lower sheet resistance and firmly merged the phase.The ultra-thin poly-Si nanowire junctionless thin film transistors NWs JL-TFT with nickel silicide contact is demonstrated, which reveals high driving current (>10⁷ Å), subthreshold slope (186 mV/dec.), and low parasitic resistance. In silicide film analysis, the second step of annealing was applied to form lower sheet resistance and firmly merge the phase silicide film. In short, the NWs JL-TFT with nickel silicide contact has exhibited a competitive short-channel behavior and improved drive current.

Keywords: poly-Si, nanowire, junctionless, thin-film transistors, nickel silicide

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Authors: T. Bielewicz, S. Dogan, C. Klinke

Abstract:

Two-dimensional, solution-processable semiconductor materials are interesting for low-cost electronic applications [1]. We demonstrate the synthesis of lead sulfide nanosheets and how their size, shape and height can be tuned by varying concentrations of pre-cursors, ligands and by varying the reaction temperature. Especially, the charge carrier confinement in the nanosheets’ height adjustable from 2 to 20 nm has a decisive impact on their electronic properties. This is demonstrated by their use as conduction channel in a field effect transistor [2]. Recently we also showed that especially thin nanosheets show a high carrier multiplication (CM) efficiency [3] which could make them, through the confinement induced band gap and high photoconductivity, very attractive for application in photovoltaic devices. We are already able to manufacture photovoltaic devices out of single nanosheets which show promising results.

Keywords: physical sciences, chemistry, materials, chemistry, colloids, physics, condensed-matter physics, semiconductors, two-dimensional materials

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Authors: Sonia Vanessa Campos Moreira

Abstract:

The aim of this research is the production and mechanical properties of Alkali-Activated Inorganic Binders (AAIB) made from The Basic Oxygen Furnace Slag (BOF Slag) and Thin Film Transistor Liquid Crystal Display (TFT-LCD), glass powder (waste and industrial by-products). Many factors have an influence on the production of AAIB like the glass powder finesses, the alkaline equivalent content (AE %), water binder ratios (w/b ratios) and the differences curing process. The findings show different behavior in the AAIB related to the factors mentioned, the best results are given with a glass powder fineness of 4,500 cm²/g, w/b=0.30, a curing temperature of 70 ℃, curing duration of 4 days and an aging duration of 14 days results in the highest compressive strength of 18.51 MPa.

Keywords: alkaline activators, BOF slag, glass powder fineness, TFT-LCD, w/b ratios

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Authors: N. Massoum, A. Guen. Bouazza, B. Bouazza, A. El Ouchdi

Abstract:

The progress of industry integrated circuits in recent years has been pushed by continuous miniaturization of transistors. With the reduction of dimensions of components at 0.1 micron and below, new physical effects come into play as the standard simulators of two dimensions (2D) do not consider. In fact the third dimension comes into play because the transverse and longitudinal dimensions of the components are of the same order of magnitude. To describe the operation of such components with greater fidelity, we must refine simulation tools and adapted to take into account these phenomena. After an analytical study of the static characteristics of the component, according to the different operating modes, a numerical simulation is performed of field-effect transistor with submicron gate MESFET GaInP. The influence of the dimensions of the gate length is studied. The results are used to determine the optimal geometric and physical parameters of the component for their specific applications and uses.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device, GaInP

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Authors: Kala Bharathan, R. Seshasayanan

Abstract:

In this paper, a 1-bit Embedded Logic Full Adder (EFA) circuit in transistor level is proposed, which reduces logic complexity, gives low power and high speed. The design is further extended till 64 bits. To evaluate the performance of EFA, a 16, 32, 64-bit both Linear and Square root Carry Select Adder/Subtractor (CSLAS) Structure is also proposed. Realistic testing of proposed circuits is done on 8 X 8 Modified Booth multiplier and comparison in terms of power and delay is done. The EFA is implemented for different multiplier architectures for performance parameter comparison. Overall delay for CSLAS is reduced to 78% when compared to conventional one. The circuit implementations are done on TSMC 28nm CMOS technology using Cadence Virtuoso tool. The EFA has power savings of up to 14% when compared to the conventional adder. The present implementation was found to offer significant improvement in terms of power and speed in comparison to other full adder circuits.

Keywords: embedded logic, full adder, pdp, xor gate

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Authors: Kaivan Karami, Sahalu Hassan, Sanna Taking, Afesome Ofiare, Aniket Dhongde, Abdullah Al-Khalidi, Edward Wasige

Abstract:

We have made a comparative study on the influence of Al₂O₃ and HfO₂ grown using atomic layer deposition (ALD) technique as dielectric in the AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) structure. Five samples consisting of 20 nm and 10 nm each of Al₂O₃ and HfO₂ respectively and a Schottky gate HEMT, were fabricated and measured. The threshold voltage shifts towards negative by 0.1 V and 1.8 V for 10 nm thick HfO2 and 10 nm thick Al₂O₃ gate dielectric layers respectively. The negative shift for the 20 nm HfO2 and 20 nm Al₂O₃ were 1.2 V and 4.9 V respectively. Higher gm/IDS (transconductance to drain current) ratio was also obtained in HfO₂ than Al₂O₃. With both materials as dielectric, a significant reduction in the gate leakage current in the order of 10^4 was obtained compared to the sample without the dielectric material.

Keywords: AlGaN/GaN HEMTs, Al2O3, HfO2, MOSHEMTs.

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Authors: Antonis Constantinides, Christos Yiallouras, Christakis Damianou

Abstract:

The application of today's semiconductor transistors in high power UHF DVB-T linear amplifiers has evolved significantly by utilizing LDMOS technology. This fact provides engineers with the option to design a single transistor signal amplifier which enables output power and linearity that was unobtainable previously using bipolar junction transistors or later type first generation MOSFETS. The quiescent current stability in terms of thermal variations of the LDMOS guarantees a robust operation in any topology of DVB-T signal amplifiers. Otherwise, progressively uncontrolled heat dissipation enhancement on the LDMOS case can degrade the amplifier’s crucial parameters in regards to the gain, linearity, and RF stability, resulting in dysfunctional operation or a total destruction of the unit. This paper presents one more sophisticated approach from the traditional biasing circuits used so far in LDMOS DVB-T amplifiers. It utilizes a microprocessor control technology, providing stability in topologies where IDQ must be perfectly accurate.

Keywords: LDMOS, amplifier, back-off, bias circuit

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Authors: Peiyuan Guan, Tao Wan, Dewei Chu

Abstract:

With the flash memory approaching its physical limit, the emerging resistive random-access memory (RRAM) has been considered as one of the most promising candidates for the next-generation non-volatile memory. One selector-one resistor configuration has shown the most promising way to resolve the crosstalk issue without affecting the scalability and high-density integration of the RRAM array. By comparison with other candidates of selectors (such as diodes and nonlinear devices), threshold switching selectors dominated by formation/spontaneous rupture of fragile conductive filaments have been proved to possess low voltages, high selectivity, and ultra-low current leakage. However, the flexibility and transparency of selectors are barely mentioned. Therefore, it is a matter of urgency to develop a selector with highly flexible and transparent properties to assist the application of RRAM for a diversity of memory devices. In this work, threshold switching selectors were designed using a facilely solution-processed fabrication on AgNWs@PDMS composite films, which show high flexibility, transparency and scratch resistance. As-fabricated threshold switching selectors also have revealed relatively high selectivity (~107), low operating voltages (Vth < 1 V) and good switching performance.

Keywords: flexible and transparent, resistive random-access memory, silver nanowires, threshold switching selector

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