Search results for: gate dielectric

Authors: Fatima Zohra Rahou, A.Guen Bouazza, B. Bouazza

Abstract:

SOI TRI GATE FinFET transistors have emerged as novel devices due to its simple architecture and better performance: better control over short channel effects (SCEs) and reduced power dissipation due to reduced gate leakage currents. As the oxide thickness scales below 2 nm, leakage currents due to tunneling increase drastically, leading to high power consumption and reduced device reliability. Replacing the SiO2 gate oxide with a high-κ material allows increased gate capacitance without the associated leakage effects. In this paper, SOI TRI-GATE FinFET structure with use of high K dielectric materials (HfO2) and SiO2 dielectric are simulated using the 3-D device simulator Devedit and Atlas of TCAD Silvaco. The simulated results exhibits significant improvements in the performances of SOI TRI GATE FinFET with gate oxide HfO2 compared with conventional gate oxide SiO2 for the same structure. SOI TRI-GATE FinFET structure with the use of high K materials (HfO2) in gate oxide results into the increase in saturation current, threshold voltage, on-state current and Ion/Ioff ratio while off-state current, subthreshold slope and DIBL effect are decreased.

Keywords: technology SOI, short-channel effects (SCEs), multi-gate SOI MOSFET, SOI-TRI Gate FinFET, high-K dielectric, Silvaco software

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Authors: Kaivan Karami, Sahalu Hassan, Sanna Taking, Afesome Ofiare, Aniket Dhongde, Abdullah Al-Khalidi, Edward Wasige

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We have made a comparative study on the influence of Al₂O₃ and HfO₂ grown using atomic layer deposition (ALD) technique as dielectric in the AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) structure. Five samples consisting of 20 nm and 10 nm each of Al₂O₃ and HfO₂ respectively and a Schottky gate HEMT, were fabricated and measured. The threshold voltage shifts towards negative by 0.1 V and 1.8 V for 10 nm thick HfO2 and 10 nm thick Al₂O₃ gate dielectric layers respectively. The negative shift for the 20 nm HfO2 and 20 nm Al₂O₃ were 1.2 V and 4.9 V respectively. Higher gm/IDS (transconductance to drain current) ratio was also obtained in HfO₂ than Al₂O₃. With both materials as dielectric, a significant reduction in the gate leakage current in the order of 10^4 was obtained compared to the sample without the dielectric material.

Keywords: AlGaN/GaN HEMTs, Al2O3, HfO2, MOSHEMTs.

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Authors: Nikhil Jain, Bin Yu

Abstract:

We explore the potential of using ultra-thin hexagonal boron nitride (h-BN) as both supporting substrate and gate dielectric for graphene-channel field effect transistors (GFETs). Different from commonly used oxide-based dielectric materials which are typically amorphous, very rough in surface, and rich with surface traps, h-BN is layered insulator free of dangling bonds and surface states, featuring atomically smooth surface. In a graphene-channel-last device structure with local buried metal gate electrode (TiN), thin h-BN multilayer is employed as both supporting “substrate” and gate dielectric for graphene active channel. We observed superior carrier mobility and electrical conduction, significantly improved from that in GFETs with SiO2 as substrate/gate insulator. In addition, we report excellent dielectric behavior of layered h-BN, including ultra-low leakage current and high critical electric field for breakdown.

Keywords: graphene, field-effect transistors, hexagonal boron nitride, dielectric strength, tunneling

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Authors: Porag Jyoti Ligira, Gargi Khanna

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The paper presents a simulation study of the electrical characteristic of Bulk Planar Junctionless Transistor (BPJLT) using spacer. The BPJLT is a transistor without any PN junctions in the vertical direction. It is a gate controlled variable resistor. The characteristics of BPJLT are analyzed by varying the oxide material under the gate. It can be shown from the simulation that an ideal subthreshold slope of ~60 mV/decade can be achieved by using highk dielectric. The effects of variation of spacer length and material on the electrical characteristic of BPJLT are also investigated in the paper. The ION / IOFF ratio improvement is of the order of 107 and the OFF current reduction of 10-4 is obtained by using gate dielectric of HfO2 instead of SiO2.

Keywords: spacer, BPJLT, high-k, double gate

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Authors: Fatima Zohra Rahou, A. Guen Bouazza, B. Bouazza

Abstract:

Multi-gate SOI MOSFETs has shown better results in subthreshold performances. The replacement of SiO2 by high-k dielectric can fulfill the requirements of Multi-gate MOSFETS with a scaling trend in device dimensions. The advancement in fabrication technology has also boosted the use of different high -k dielectric materials as oxide layer at different places in MOSFET structures. One of the most important multi-gate structures is square GAA SOI MOSFET that is a strong candidate for the next generation nanoscale devices; show an even stronger control of short channel effects. In this paper, GAA SOI MOSFET structure with using high -k dielectrics materials Al2O3 (k~9), HfO2 (k~20), La2O3 (k~30) and metal gate TiN are simulated by using 3-D device simulator DevEdit and Atlas of SILVACO TCAD tools. Square GAA SOI MOSFET transistor with High-k HfO2 gate dielectrics and TiN metal gate exhibits significant improvements performances compared to Al2O3 and La2O3 dielectrics for the same structure. Simulation results of GAA SOI MOSFET transistor with HfO2 dielectric show the increase in saturation current and Ion/Ioff ratio while leakage current, subthreshold slope and DIBL effect are decreased.

Keywords: technology SOI, short-channel effects (SCEs), multi-gate SOI MOSFET, square GAA SOI MOSFET, high-k dielectric, Silvaco software

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Authors: Nikhil Jain, Yang Xu, Bin Yu

Abstract:

Hexagonal boron nitride (h-BN) has been used as a substrate and gate dielectric for graphene field effect transistors (GFETs). Using a graphene/h-BN/TiN (channel/dielectric/gate) stack, key material properties of h-BN were investigated i.e. dielectric strength and tunneling behavior. Work function difference between graphene and TiN results in spontaneous p-doping of graphene through a multi-layer h-BN flake. However, at high levels of current stress, n-doping of graphene is observed, possibly due to the charge transfer across the thin h-BN multi layer. Neither Direct Tunneling (DT) nor Fowler-Nordheim Tunneling (FNT) was observed in TiN/h-BN/Au hetero structures with h-BN showing two distinct volatile conduction states before breakdown. Hexagonal boron nitride emerges as a material of choice for gate dielectrics in GFETs because of robust dielectric properties and high tunneling barrier.

Keywords: graphene, transistors, conduction, hexagonal boron nitride, dielectric strength, tunneling

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Authors: Debabrata Bhadra, B. K. Chaudhuri

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The operation of organic thin film transistors (OFETs) with low voltage is currently a prevailing issue. We have fabricated anthracene thin-film transistor (TFT) with an ultrathin layer (~450nm) of Poly-vinylidene fluoride (PVDF)/CuO nanocomposites as a gate insulator. We obtained a device with excellent electrical characteristics at low operating voltages (<1V). Different layers of the film were also prepared to achieve the best optimization of ideal gate insulator with various static dielectric constant (εr ). Capacitance density, leakage current at 1V gate voltage and electrical characteristics of OFETs with a single and multi layer films were investigated. This device was found to have highest field effect mobility of 2.27 cm2/Vs, a threshold voltage of 0.34V, an exceptionally low sub threshold slope of 380 mV/decade and an on/off ratio of 106. Such favorable combination of properties means that these OFETs can be utilized successfully as voltages below 1V. A very simple fabrication process has been used along with step wise poling process for enhancing the pyroelectric effects on the device performance. The output characteristic of OFET after poling were changed and exhibited linear current-voltage relationship showing the evidence of large polarization. The temperature dependent response of the device was also investigated. The stable performance of the OFET after poling operation makes it reliable in temperature sensor applications. Such High-ε CuO/PVDF gate dielectric appears to be highly promising candidates for organic non-volatile memory and sensor field-effect transistors (FETs).

Keywords: organic field effect transistors, thin film transistor, gate dielectric, organic semiconductor

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Authors: S. Slimani, B. Djellouli

Abstract:

Novel materials and innovative device structures has become necessary for the future of CMOS. High mobility materials like Ge is a very promising material due to its high mobility and is being considered to replace Si in the channel to achieve higher drive currents and switching speeds .Various approaches to circumvent the scaling limits to benchmark the performance of nanoscale MOSFETS with different channel materials, the optimized structure is simulated within nextnano in order to highlight the quantum effects on DG MOSFETs when Si is replaced by Ge and SiO2 is replaced by ZrO2 and HfO2as the gate dielectric. The results have shown that Ge MOSFET have the highest mobility and high permittivity oxides serve to maintain high drive current. The simulations show significant improvements compared with DGMOSFET using SiO2 gate dielectric and Si channel.

Keywords: high mobility, high-k, quantum effects, SOI-DGMOSFET

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Authors: Kuan Yu Lin, Shih Chih Chen

Abstract:

This study focuses on the Al/HfO₂/Si/Al structure to explore the electrical properties of the structure. This experiment uses a radio frequency magnetron sputtering system to deposit high dielectric materials on p-type silicon substrates of 1~10 Ω-cm (100). Consider the hafnium dioxide film as a dielectric layer. Post-deposition annealing at 750°C in nitrogen atmosphere. Electron beam evaporation of metallic aluminum is then used to complete the top/bottom electrodes. The metal is post-annealed at 450°C for 20 minutes in a nitrogen environment to complete the MOS component. Its dielectric constant, equivalent oxide layer thickness, oxide layer defects, and leakage current mechanism are discussed. At PDA 750°C-5s, the maximum k value was found to be 21.2, and the EOT was 3.68nm.

Keywords: high-k gate dielectrics, HfO₂, post deposition annealing, RF magnetic

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Authors: Zina Saheb, Ezz El-Masry

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As CMOS technology scaling down, Silicon oxide thickness (SiO2) become very thin (few Nano meters). When SiO2 is less than 3nm, gate direct tunneling (DT) leakage current becomes a dormant problem that impacts the transistor performance. Floating gate MOSFET (FGMOSFET) has been used in many low-voltage and low-power applications. Most of the available simulation models of FGMOSFET for analog circuit design does not account for gate DT current and there is no accurate analysis for the gate DT. It is a crucial to use an accurate mode in order to get a realistic simulation result that account for that DT impact on FGMOSFET performance effectively.

Keywords: CMOS transistor, direct-tunneling current, floating-gate, gate-leakage current, simulation model

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Authors: D. Ravinder, K. S. Nagaraju

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Ni–Al ferrite with composition of NiAlxFe2-xO4 (x=0.2, 0.4 0.6, and 0.8, ) were prepared by citrate gel method. The dielectric properties for all the samples were investigated at room temperature as a function of frequency. The dielectric constant shows dispersion in the lower frequency region and remains almost constant at higher frequencies. The frequency dependence of dielectric loss tangent (tanδ) is found to be abnormal, giving a peak at certain frequency for mixed Ni-Al ferrites. A qualitative explanation is given for the composition and frequency dependence of the dielectric loss tangent.

Keywords: ferrites, citrate method, lattice parameter, dielectric constant

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Authors: Yun-Hsuan Yu, Chi-Shung Tang, Nzar Rauf Abdullah, Vidar Gudmundsson

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Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteristics in the SOI-Zeeman influenced split-gate devices by means of a generalized spin-mixed propagation matrix method. For the finger-gate system, we find a bound state in continuum for incident electrons within the ultra-low energy regime. For the top-gate system, we observe more bound-state features in conductance associated with the formation of spin-associated hole-like or electron-like quasi-bound states around band thresholds, as well as hole bound states around the reverse point of the energy dispersion. We demonstrate that the spin-dependent transport behavior of a top-gate system is similar to that of a finger-gate system only if the top-gate length is less than the effective Fermi wavelength.

Keywords: spin-orbit, zeeman, top-gate, finger-gate, bound state

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Authors: Sukhleen Bindra Narang, Dalveer Kaur, Kunal Pubby

Abstract:

Dielectric ceramic samples in the BaO-Re2O3-TiO2 ternary system were synthesized with structural formula Ba2-xRe4+2x/3Ti8O24 where Re= rare earth metal and Re= Sm and La where x varies from 0.0 to 0.6 with step size 0.1. Polycrystalline samples were prepared by the conventional solid state reaction technique. The dielectric, electrical and impedance analysis of all the samples in the frequency range 1KHz- 1MHz at room temperature (25°C) have been done to get the understanding of electrical conduction and dielectric relaxation and their correlation. Dielectric response of the samples at lower frequencies shows dielectric dispersion while at higher frequencies it shows dielectric relaxation. The ac conductivity is well fitted by the Jonscher law (σac = σdc+Aωn). The spectroscopic data in the impedance plane confirms the existence of grain contribution to the relaxation. All the properties are found out to be function of frequency as well as the amount of substitution.

Keywords: dielectric ceramics, dielectric constant, loss tangent, AC conductivity, impedance spectroscopy

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Authors: A. Douara, N. Kermas, B. Djellouli

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In this study, we report calculations of gate capacitance of AlGaN/GaN HEMTs with nextnano device simulation software. We have used a physical gate capacitance model for III-V FETs that incorporates quantum capacitance and centroid capacitance in the channel. These simulations explore various device structures with different values of barrier thickness and channel thickness. A detailed understanding of the impact of gate capacitance in HEMTs will allow us to determine their role in future 10 nm physical gate length node.

Keywords: gate capacitance, AlGaN/GaN, HEMTs, quantum capacitance, centroid capacitance

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Authors: Mahendrapal Singh Pachlaniya, Laxmi Kumre

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The AOI (AND – OR- INVERTER) based design of XOR gate is proposed in this paper with less number of gates. This new XOR gate required four basic gates and basic gate include only AND, OR, Inverter (AOI). Conventional XOR gate required five basic gates. Ripple Carry Adder (RCA) used in parallel addition but propagation delay time is large. RCA replaced with Carry Select Adder (CSLA) to reduce propagation delay time. CSLA design with dual RCA considering carry = ‘0’ and carry = ‘1’, so it is not an area efficient adder. To make area efficient, modified CSLA is designed with single RCA considering carry = ‘0’ and another RCA considering carry = ‘1’ replaced with Binary to Excess 1 Converter (BEC). Now replacement of conventional XOR gate by new design of XOR gate in modified CSLA reduces much area compared to regular CSLA and modified CSLA.

Keywords: CSLA, BEC, XOR gate, area efficient

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Authors: Sangeeta Singh, Pankaj Kumar, P. N. Kondekar

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In this paper, the transient device performance analysis of n-type Gate Inside Junctionless Transistor (GIJLT)has been evaluated. 3-D Bohm Quantum Potential (BQP)transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay product, intrinsic gate delay and energy delay product as compared to Gate-all-around transistors GAA-JLT. In addition to this, various other device performance parameters namely, on/off current ratio, short channel effects (SCE), transconductance Generation Factor(TGF) and unity gain cut-off frequency (fT) and subthreshold slope (SS) of the GI-JLT and Gate-all-around junctionless transistor(GAA-JLT) have been analyzed and compared. GI-JLT shows better device performance characteristics than GAA-JLT for low power and high frequency applications, because of its larger gate electrostatic control on the device operation.

Keywords: gate-inside junctionless transistor GI-JLT, gate-all-around junctionless transistor GAA-JLT, propagation delay, power delay product

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Authors: Lin Gong, Holger Göbel

Abstract:

In the present study, we have investigated the influence of UV/ozone treatment on pentacene-based organic field effect transistors (OFETs) with a bilayer gate dielectric. The OFETs for this study were fabricated on heavily n-doped Si substrates with a thermally deposited SiO2 dielectric layer (300nm). On the SiO2 dielectric a very thin (≈ 15nm) buffer layer of polystyrene (PS) was first spin-coated and then treated by UV/ozone to modify the surface prior to the deposition of pentacene. We found out that by extending the UV/ozone treatment time the threshold voltage of the OFETs was monotonically shifted towards positive values, whereas the field effect mobility first decreased but eventually reached a stable value after a treatment time of approximately thirty seconds. Since the field effect mobility of the UV/ozone treated bilayer OFETs was found to be higher than the value of a comparable transistor with a single layer dielectric, we propose that the bilayer (SiO2/PS) structure can be used to shift the threshold voltage to a desired value without sacrificing field effect mobility.

Keywords: buffer layer, organic field effect transistors, threshold voltage, UV/ozone treatment

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Authors: Peng Lu, Branimir Radisavljevic, Martin Seeger, Daniel Over, Torsten Votteler, Bernardo Galletti

Abstract:

CO₂-based gas mixtures exhibit huge potential as the interruption medium for replacing SF₆ in high voltage switchgears. In this paper, the recovery characteristics of dielectric strength of CO₂-O₂ mixture in the post arc phase after the current zero are presented. As representative examples, the dielectric recovery curves under conditions of different gas filling pressures and short-circuit current amplitudes are presented. A series of dielectric recovery measurements suggests that the dielectric recovery rate is proportional to the mass flux of the blowing gas, and the dielectric strength recovers faster in the case of lower short circuit currents.

Keywords: CO₂ mixture, high voltage circuit breakers, dielectric recovery rate, short-circuit current, mass flux

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Authors: C. S Lee, W. C. Hsu, H. Y. Liu, C. J. Lin, S. C. Yao, Y. T. Shen, Y. C. Lin

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In₀.₁₈Al₀.₈₂N/AlN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) having Al₂O₃ gate-dielectric and backside metal-trench structure are investigated. The Al₂O₃ gate oxide was formed by using a cost-effective non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. In order to enhance the heat dissipation efficiency, metal trenches were etched 3-µm deep and evaporated with a 150-nm thick Ni film on the backside of the Si substrate. The present In₀.₁₈Al₀.₈₂N/AlN/GaN MOS-HFET (Schottky-gate HFET) has demonstrated improved maximum drain-source current density (IDS, max) of 1.08 (0.86) A/mm at VDS = 8 V, gate-voltage swing (GVS) of 4 (2) V, on/off-current ratio (Ion/Ioff) of 8.9 × 10⁸ (7.4 × 10⁴), subthreshold swing (SS) of 140 (244) mV/dec, two-terminal off-state gate-drain breakdown voltage (BVGD) of -191.1 (-173.8) V, turn-on voltage (Von) of 4.2 (1.2) V, and three-terminal on-state drain-source breakdown voltage (BVDS) of 155.9 (98.5) V. Enhanced power performances, including saturated output power (Pout) of 27.9 (21.5) dBm, power gain (Gₐ) of 20.3 (15.5) dB, and power-added efficiency (PAE) of 44.3% (34.8%), are obtained. Superior breakdown and RF power performances are achieved. The present In₀.₁₈Al₀.₈₂N/AlN/GaN MOS-HFET design with backside metal-trench is advantageous for high-power circuit applications.

Keywords: backside metal-trench, InAlN/AlN/GaN, MOS-HFET, non-vacuum ultrasonic spray pyrolysis deposition

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Authors: Kaiyuan Chena, Senentxu Lanceros-Méndeza, Laijun Liub, Qi Zhanga

Abstract:

0.6Bi(Mg1/2Ti1/2)O3-0.4Ba0.8Ca0.2(Nb0.125Ti0.875)O3 (0.6BMT-0.4BCNT) ceramics with a pseudo-cubic structure and re-entrant dipole glass behavior have been investigated via X-ray diffraction and dielectric permittivity-temperature spectra. It shows an excellent dielectric-temperature stability with small variations of dielectric permittivity (± 5%, 420 - 802 K) and dielectric loss tangent (tanδ < 2.5%, 441 - 647 K) in a wide temperature range. Three dielectric anomalies are observed from 290 K to 1050 K. The low-temperature weakly coupled re-entrant relaxor behavior was described using Vogel-Fulcher law and the new glass model. The mid- and high-temperature dielectric anomalies are characterized by isothermal impedance and electrical modulus. The activation energy of both dielectric relaxation and conductivity follows the Arrhenius law in the temperature ranges of 633 - 753 K and 833 - 973 K, respectively. The ultrahigh thermal stability of the dielectric permittivity is attributed to the weakly coupling of polar clusters, the formation of diffuse phase transition (DPT) and the local phase transition of calcium-containing perovskite.

Keywords: permittivity, relaxor, electronic ceramics, activation energy

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Authors: Ying-Chieh Lee, Huei-Jyun Shih, Ting-Yang Wang, Christian Pithan

Abstract:

This study focuses on the synthesis and characterization of Ca₀.₆Sr₀.₄₋ₓBaₓZrO₃ (x = 0.01, 0.04, 0.07, and 0.10) ceramics prepared via the solid-state method and sintered at 1450 °C. The impact of Sr substitution by Ba at the A-site of the perovskite structure on crystalline properties and microwave dielectric performance was investigated. The experimental results show the formation of a single-phase structure, Ca₀.₆₁₂Sr₀.₃₈₈ZrO₃(CSZ), across the entire range of x values. It is evident that the Ca₀.₆Sr₀.₃₉Ba₀.₀₁ZrO₃ ceramics exhibit the highest sintering density and the lowest porosity. These ceramics exhibit impressive dielectric properties, including a high permittivity of 28.38, low dielectric loss of 4.0×10⁻⁴, and a Q factor value of 22988 at 9~10GHz. The research reveals that the influences of Sr substitution by Ba in enhancing the microwave dielectric properties of Ca₀.₆₁₂Sr₀.₃₈₈ZrO₃ ceramics and the impedance curves clearly showed effects on the electrical properties.

Keywords: NPO dielectric material, (Ca₀.₆Sr₀.₄)ZrO₃, microwave dielectric properties

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Authors: Arijit Basuray

Abstract:

It is well known that if an electrical insulation system is stressed under high voltage then discharge may occur in various form and if the system is made of composite dielectric having interfaces of materials having different dielectric constant discharge may occur due to gross mismatch of dielectric constant causing intense local field in the interfaces. Here author has studied, firstly, behavior of discharges in gaseous dielectric circuit under AC and DC voltages. A gaseous dielectric circuit is made such that a pair of electrode of typical geometry is used to make the discharges occur under application of AC and DC voltages. Later on, composite insulation system with air gap is also studied. Discharge response of the dielectric circuit is measured across a typically designed impedance. The time evolution of the discharge characteristics showed some interesting chaotic behavior. Author here proposed some analysis of such behavior of the discharge pattern and discussed about the possibility of presence of such discharge circuit in lumped electric circuit.

Keywords: electrical insulation system, EIS, composite dielectric, discharge, chaos

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Authors: Dheeraj Sharma, Santosh Kumar Vishvakarma

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We present a detailed analysis of analog and radiofrequency (RF) performance with different gate lengths for nanowire cylindrical gate (CylG) gate-all-around (GAA) MOSFET. CylG GAA MOSFET not only suppresses the short channel effects (SCEs), it is also a good candidate for analog/RF device due to its high transconductance (gm) and high cutoff frequency (fT ). The presented work would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequency covering the RF spectrum. For this purpose, the analog/RF figures of merit for CylG GAA MOSFET is analyzed in terms of gate to source capacitance (Cgs), gate to drain capacitance (Cgd), transconductance generation factor gm = Id (where Id represents drain current), intrinsic gain, output resistance, fT, maximum frequency of oscillation (fmax) and gain bandwidth (GBW) product.

Keywords: Gate-All-Around MOSFET, GAA, output resistance, transconductance generation factor, intrinsic gain, cutoff frequency, fT

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Authors: Xize Dai, Jian Hao, Claus Leth Bak, Gian Carlo Montanari, Huai Wang

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Printed Circuit Board (PCB) is a critical component applicable to power electronics systems, especially for high-voltage applications involving several high-voltage and high-frequency SiC/GaN devices. The insulation system of PCB is facing more challenges from high-voltage and high-frequency stress that can alter the dielectric properties. Dielectric properties of the PCB insulation system also determine the electrical field distribution that correlates with intrinsic and extrinsic aging mechanisms. Hence, investigating the dielectric properties in the frequency domain of the PCB insulation system is a must. The paper presents the frequency-dependent, temperature-dependent, and voltage-dependent dielectric properties, permittivity, conductivity, and dielectric loss tangents of PCB insulation systems. The dielectric properties mechanisms associated with frequency, temperature, and voltage are revealed from the design perspective. It can be concluded that the dielectric properties of PCB in the frequency domain show a strong dependence on voltage, frequency, and temperature. The voltage-, frequency-, and temperature-dependent dielectric properties are associated with intrinsic conduction behavior and polarization patterns from the perspective of dielectric theory. The results may provide some reference for the PCB insulation system design in high voltage, high frequency, and high-temperature power electronics applications.

Keywords: electrical insulation system, dielectric properties, high voltage and frequency, printed circuit board

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Authors: Nur Suraya Anis Ahmad Bakhtiar, Hazizan Md Akil

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In the present work, the dielectric properties of Epoxy/MWCNTs-muscovite HYBRID and MIXED composites based on ratio 30:70 were studies. The multi-wall carbon nanotubes (MWCNTs) were prepared by two method; (a) muscovite-MWCNTs hybrids were synthesized by chemical vapor deposition (CVD) and (b) physically mixing of muscovite with MWCNTs. The effect of different preparations of the composites and filler loading was evaluated. It is revealed that the dielectric constants of HYBRID epoxy composites are slightly higher compared to MIXED epoxy composites. It is also indicated that the dielectric constant increased by increases the MWCNTs filler loading.

Keywords: muscovite, epoxy, dielectric properties, hybrid composite

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Authors: Shagufta Tabassum, V. P. Pawar

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The study of static dielectric properties in a binary mixture of 1,2 dichloroethane (DE) and n,n dimethylformamide (DMF) polar liquids has been carried out in the frequency range of 10 MHz to 30 GHz for 11 different concentration using time domain reflectometry technique at 10ºC temperature. The dielectric relaxation study of solute-solvent mixture at microwave frequencies gives information regarding the creation of monomers and multimers as well as interaction between the molecules of the binary mixture. The least squares fit method is used to determine the values of dielectric parameters such as static dielectric constant (ε₀), dielectric constant at high frequency (ε_∞) and relaxation time (τ).

Keywords: shagufta shaikhexcess parameters, relaxation time, static dielectric constant, time domain reflectometry

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Authors: Ching-Sung Lee, Wei-Chou Hsu, Han-Yin Liu, Hung-Hsi Huang, Si-Fu Chen, Yun-Jung Yang, Bo-Chun Chiang, Yu-Chuang Chen, Shen-Tin Yang

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AlGaN/GaN high electron mobility transistors (HEMTs) have been intensively studied due to their intrinsic advantages of high breakdown electric field, high electron saturation velocity, and excellent chemical stability. They are also suitable for ultra-violet (UV) photodetection due to the corresponding wavelengths of GaN bandgap. To improve the optical responsivity by decreasing the dark current due to gate leakage problems and limited Schottky barrier heights in GaN-based HEMT devices, various metal-oxide-semiconductor HEMTs (MOS-HEMTs) have been devised by using atomic layer deposition (ALD), molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), liquid phase deposition (LPD), and RF sputtering. The gate dielectrics include MgO, HfO2, Al2O3, La2O3, and TiO2. In order to provide complementary circuit operation, enhancement-mode (E-mode) devices have been lately studied using techniques of fluorine treatment, p-type capper, piezoneutralization layer, and MOS-gate structure. This work reports an Al2O3-dielectric Al0.25Ga0.75N/GaN E-mode MOS-HEMT design by using a cost-effective ozone water oxidization technique. The present ozone oxidization method advantages of low cost processing facility, processing simplicity, compatibility to device fabrication, and room-temperature operation under atmospheric pressure. It can further reduce the gate-to-channel distance and improve the transocnductance (gm) gain for a specific oxide thickness, since the formation of the Al2O3 will consume part of the AlGaN barrier at the same time. The epitaxial structure of the studied devices was grown by using the MOCVD technique. On a Si substrate, the layer structures include a 3.9 m C-doped GaN buffer, a 300 nm GaN channel layer, and a 5 nm Al0.25Ga0.75N barrier layer. Mesa etching was performed to provide electrical isolation by using an inductively coupled-plasma reactive ion etcher (ICP-RIE). Ti/Al/Au were thermally evaporated and annealed to form the source and drain ohmic contacts. The device was immersed into the H2O2 solution pumped with ozone gas generated by using an OW-K2 ozone generator. Ni/Au were deposited as the gate electrode to complete device fabrication of MOS-HEMT. The formed Al2O3 oxide thickness 7 nm and the remained AlGaN barrier thickness is 2 nm. A reference HEMT device has also been fabricated in comparison on the same epitaxial structure. The gate dimensions are 1.2 × 100 µm 2 with a source-to-drain spacing of 5 μm for both devices. The dielectric constant (k) of Al2O3 was characterized to be 9.2 by using C-V measurement. Reduced interface state density after oxidization has been verified by the low-frequency noise spectra, Hooge coefficients, and pulse I-V measurement. Improved device characteristics at temperatures of 300 K-450 K have been achieved for the present MOS-HEMT design. Consequently, Al2O3-dielectric Al0.25Ga0.75N/GaN E-mode MOS-HEMTs by using the ozone water oxidization method are reported. In comparison with a conventional Schottky-gate HEMT, the MOS-HEMT design has demonstrated excellent enhancements of 138% (176%) in gm, max, 118% (139%) in IDS, max, 53% (62%) in BVGD, 3 (2)-order reduction in IG leakage at VGD = -60 V at 300 (450) K. This work is promising for millimeter-wave integrated circuit (MMIC) and three-terminal active UV photodetector applications.

Keywords: MOS-HEMT, enhancement mode, AlGaN/GaN, passivation, ozone water oxidation, gate leakage

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Authors: Roumaissa Derdour, Lebbal Mohamed Redha

Abstract:

We present a study of the transmission of the all-optical logic gate using a structure connected with a triangular photonic crystal lattice that is improved. The proposed logic gate consists of a photonic crystal nano-resonator formed by changing the size of the air holes. In addition to the simplicity, the response time is very short, and the designed nano-resonator increases the bit rate of the logic gate. The two-dimensional finite difference time domain (2DFDTD) method is used to simulate the structure; the transmission obtained is about 98% with very negligible losses. The proposed photonic crystal AND logic gate is widely used in future integrated optical microelectronics.

Keywords: logic gates, photonic crystals, optical integrated circuits, resonant cavities

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Authors: Shagufta Tabassum, V. P. Pawar, jr., G. N. Shinde

Abstract:

The study of dielectric relaxation properties of polar liquids in the binary mixture has been carried out at 10, 15, 20 and 25 ºC temperatures for 11 different concentrations using time domain reflectometry technique. The dielectric properties of a solute-solvent mixture of polar liquids in the frequency range of 10 MHz to 30 GHz gives the information regarding formation of monomers and multimers and also an interaction between the molecules of the liquid mixture under study. The dielectric parameters have been obtained by the least squares fit method using the Debye equation characterized by a single relaxation time without relaxation time distribution.

Keywords: excess properties, relaxation time, static dielectric constant, and time domain reflectometry technique

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Authors: K. Silakaew, P. Thongbai

Abstract:

There is an increasing need for high–permittivity polymer–matrix composites (PMC) owing to the rapid development of the electronics industry. Unfortunately, the dielectric permittivity of PMC is still too low ( < 80). Moreover, the dielectric loss tangent is usually high (tan > 0.1) when the dielectric permittivity of PMC increased. In this research work, the dielectric properties of poly(vinylidene fluoride) (PVDF)–based nanocomposites can be significantly improved by incorporating by silver–BaTiO3 (Ag–BT) ceramic hybrid nanoparticles. The Ag–BT/PVDF nanocomposites were fabricated using various volume fractions of Ag–BT hybrid nanoparticles (fAg–BT = 0–0.5). The Ag–BT/PVDF nanocomposites were characterized using several techniques. The main phase of Ag and BT can be detected by the XRD technique. The microstructure of the Ag–BT/PVDF nanocomposites was investigated to reveal the dispersion of Ag–BT hybrid nanoparticles because the dispersion state of a filler can have an effect on the dielectric properties of the nanocomposites. It was found that the filler hybrid nanoparticles were well dispersed in the PVDF matrix. The phase formation of PVDF phases was identified using the XRD and FTIR techniques. We found that the fillers can increase the polar phase of a PVDF polymer. The fabricated Ag–BT/PVDF nanocomposites are systematically characterized to explain the dielectric behavior in Ag–BT/PVDF nanocomposites. Interestingly, largely enhanced dielectric permittivity (>240) and suppressed loss tangent (tan<0.08) over a wide frequency range (102 – 105 Hz) are obtained. Notably, the dielectric permittivity is slightly dependent on temperature. The greatly enhanced dielectric permittivity was explained by the interfacial polarization between the Ag and PVDF interface, and due to a high permittivity of BT particles.

Keywords: BaTiO3, PVDF, polymer composite, dielectric properties

Procedia PDF Downloads 148