@article{(Open Science Index):https://publications.waset.org/pdf/9391,
	  title     = {Performance Comparison of Real Time EDAC Systems for Applications On-Board Small Satellites},
	  author    = {Y. Bentoutou},
	  country	= {},
	  institution	= {},
	  abstract     = {On-board Error Detection and Correction (EDAC)
devices aim to secure data transmitted between the central
processing unit (CPU) of a satellite onboard computer and its local
memory. This paper presents a comparison of the performance of
four low complexity EDAC techniques for application in Random
Access Memories (RAMs) on-board small satellites. The
performance of a newly proposed EDAC architecture is measured
and compared with three different EDAC strategies, using the same
FPGA technology. A statistical analysis of single-event upset (SEU)
and multiple-bit upset (MBU) activity in commercial memories
onboard Alsat-1 is given for a period of 8 years},
	    journal   = {International Journal of Electrical and Computer Engineering},
	  volume    = {5},
	  number    = {5},
	  year      = {2011},
	  pages     = {466 - 469},
	  ee        = {https://publications.waset.org/pdf/9391},
	  url   	= {https://publications.waset.org/vol/53},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 53, 2011},
	}