TY - JFULL AU - N. Shen and Z. X. Chen and K.D. Buddharaju and H. M. Chua and X. Li and N. Singh and G.Q Lo and D.-L. Kwong PY - 2010/1/ TI - Vertical GAA Silicon Nanowire Transistor with Impact of Temperature on Device Parameters T2 - International Journal of Electronics and Communication Engineering SP - 1879 EP - 1883 VL - 4 SN - 1307-6892 UR - https://publications.waset.org/pdf/8846 PU - World Academy of Science, Engineering and Technology NX - Open Science Index 48, 2010 N2 - In this paper, we present a vertical wire NMOS device fabricated using CMOS compatible processes. The impact of temperature on various device parameters is investigated in view of usual increase in surrounding temperature with device density. ER -