Yi-Hsiung Fang

Publications

1 Bridgeless Boost Power Factor Correction Rectifier with Hold-Up Time Extension Circuit

Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: boost converter, power factor correction, hold-up time, Bridgeless boost

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Abstracts

2 An Improved Photovolatic System Balancer Architecture

Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Cyuan-Jyun Wong

Abstract:

An improved PV balancer for photovoltaic applications is proposed in this paper. The proposed PV balancer senses the voltage and current of PV module and adjusts the output voltage of converter. Thus, the PV system can implement maximum power point tracking (MPPT) independently for each module whether it is under shading, different irradiation or degradation of PV cell. In addition, the cost of PV balancer can be reduced due to the low power rating of converter. To assess the effectiveness of the proposed system, two PV balancers are designed and verified through simulation under different shading conditions. The proposed PV balancers can provide more energy than the traditional PV balancer.

Keywords: MPPT, converter, partial shading, PV system

Procedia PDF Downloads 123
1 Bridgeless Boost Power Factor Correction Rectifier with Hold-Up Time Extension Circuit

Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: boost converter, bridgeless boost (BLB), power factor correction (PFC), hold-up time

Procedia PDF Downloads 228