Simulation Study of Lateral Trench Gate Power MOSFET on 4H-SiC
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Simulation Study of Lateral Trench Gate Power MOSFET on 4H-SiC

Authors: Yashvir Singh, Mayank Joshi

Abstract:

A lateral trench-gate power metal-oxide-semiconductor on 4H-SiC is proposed. The device consists of two separate trenches in which two gates are placed on both sides of P-body region resulting two parallel channels. Enhanced current conduction and reduced-surface-field effect in the structure provide substantial improvement in the device performance. Using two dimensional simulations, the performance of proposed device is evaluated and compare of with that of the conventional device for same cell pitch. It is demonstrated that the proposed structure provides two times higher output current, 11% decrease in threshold voltage, 70% improvement in transconductance, 70% reduction in specific ON-resistance, 52% increase in breakdown voltage, and nearly eight time improvement in figure-of-merit over the conventional device.

Keywords: 4H-SiC, lateral, trench-gate, power MOSFET.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1337119

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References:


[1] J. A. Cooper, and A. Agarwal, "SiC power-switching devices - the second electronics revolution,” Proc. IEEE, vol. 90, pp. 956–968, Jun. 2002
[2] M. Noborio, J. Suda, and T. Kimoto, "4H-SiC Lateral Double RESURF MOSFETs with Low ON Resistance,” IEEE Transactions on Electron Devices, vol. 54, pp. 1216 –1223, May 2007.
[3] W. S. Lee, C. W. Lin, M. H. Yang, C. F. Huang, J. Gong, and Z. Feng, "Demonstration of 3500 V 4H-SiC Lateral MOSFETs,” IEEE Electron Device Letters, vol. 32, pp. 360 – 362, Mar. 2011.
[4] K. Varadarajan, A. Sinkar, and T. Chow, "Novel Integrable 80V silicon lateral trench power MOSFETs for high frequency DC-DC converters,” in Power Electronics Specialists Conference, pp. 1013– 1017, Jun. 2007.
[5] X. Luo, T. F. Lei, Y. G. Wang, G. L. Yao, Y. H. Jiang, K. Zhou, P. Wang, Z. Y. Zhang, J. Fan, Q. Wang, B. Z. R. Ge, Z. Li, and F. Udrea, "Low on-resistance SOI dual-trench-gate MOSFET,” IEEE Trans. Electron Devices, vol. 59, pp. 504 – 509, Feb. 2012.
[6] Y. Singh and M. Punetha, "A Lateral Trench Dual Gate Power MOSFET on Thin SOI for Improved Performance,” ECS J. of Solid State Sci. and Tech., Vol. 2(7), May 2013, pp. Q113-Q117.
[7] A. Saha and J. A. Cooper, "A 1-kV 4H-SiC power DMOSFET optimized for Low ON-Resistance,” IEEE Transactions on Electron Devices, vol. 54, Oct. 2007, pp. 2786 – 2791.
[8] ATLAS User’s manual: Device simulation software, Silvaco Int., Santa Clara, CA, (2010).