%0 Journal Article
	%A Jihyung Kim and  Taejin Kim and  Sungho Park and  Jun-Dong Cho
	%D 2011
	%J International Journal of Electrical and Computer Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 49, 2011
	%T Low Power Bus Binding Based on Dynamic Bit Reordering
	%U https://publications.waset.org/pdf/943
	%V 49
	%X In this paper, the problem of reducing switching
activity in on-chip buses at the stage of high-level synthesis is
considered, and a high-level low power bus binding based on dynamic
bit reordering is proposed. Whereas conventional methods use a fixed
bit ordering between variables within a bus, the proposed method
switches a bit ordering dynamically to obtain a switching activity
reduction. As a result, the proposed method finds a binding solution
with a smaller value of total switching activity (TSA). Experimental
result shows that the proposed method obtains a binding solution
having 12.0-34.9% smaller TSA compared with the conventional
methods.
	%P 62 - 67