WASET
	%0 Journal Article
	%A Morteza Fathipour and  Samira Omidbakhsh and  Kimia Khodayari
	%D 2010
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 48, 2010
	%T Improvement in Silicon on Insulator Devices using Strained Si/SiGe Technology for High Performance in RF Integrated Circuits
	%U https://publications.waset.org/pdf/7201
	%V 48
	%X RF performance of SOI CMOS device has attracted
significant amount of interest recently. In order to improve RF
parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a
replacement for Si technology .Enhancement of carrier mobility
associated with strain engineering makes Strained Si a promising
candidate for improving RF performance of CMOS technology.
From the simulation, the cut-off frequency is estimated to be 224
GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore,
Strained Si exhibits 19% improvement in cut-off frequency over
similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of
the key parameters in logic and digital application. Strained Si/SiGe
demonstrates better Ion/Ioff characteristic than SOI, in similar channel
length of 100 nm.Another important key analog figures of merit such
as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids)
are studied. They introduce the efficiency of the devices to convert
dc power into ac frequency.
	%P 1780 - 1783