Analytical Modeling of Channel Noise for Gate Material Engineered Surrounded/Cylindrical Gate (SGT/CGT) MOSFET
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Analytical Modeling of Channel Noise for Gate Material Engineered Surrounded/Cylindrical Gate (SGT/CGT) MOSFET

Authors: Pujarini Ghosh A, Rishu Chaujar B, Subhasis Haldar C, R.S Gupta D, Mridula Gupta E

Abstract:

In this paper, an analytical modeling is presentated to describe the channel noise in GME SGT/CGT MOSFET, based on explicit functions of MOSFETs geometry and biasing conditions for all channel length down to deep submicron and is verified with the experimental data. Results shows the impact of various parameters such as gate bias, drain bias, channel length ,device diameter and gate material work function difference on drain current noise spectral density of the device reflecting its applicability for circuit design applications.

Keywords: Cylindrical/Surrounded gate (SGT/CGT) MOSFET, Gate Material Engineering (GME), Spectral Noise and short channeleffect (SCE).

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1328862

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References:


[1] A. Chaudhry and M. J. Kumar, "Controlling short-channel effect in deep-submicron SOI MOSFETs for improved reliability: A review," IEEE Trans. Device Mater. Rel., vol. 4, no. 1, pp. 99-109, Mar. 2004.
[2] S.L. Jang and S.-S. Liu, "An analytical surrounding gate MOSFET model," Solid State Electron., vol. 42, no. 5, pp. 721-726, 1998.
[3] M.J Kumar, Ali A.Orouji, and H.Dhakad "New Dual-Material SG Nanoscale MOSFET: Analytical Threshold-Voltage Model" IEEE Trans.on Eelectron Devices,, vol 53,no. 4,pp. 920-923, April. 2004.
[4] A. Rofougaran, J. Y.-C. Chang, M. Rofougaran, and A. A. Abidi, "A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver," IEEE J. Solid-State Circuits, vol. 31, pp. 880-889, July 1996.
[5] Abhinav Kranti , Subhasis Haldar , R.S. Gupta," Temperaturedependent threshold voltage analysis of surrounding / cylindrical gate fully depleted thin film SOI MOSFET in the range 77 to 520 K" Microelectronic Engineering 49 (1999) 273-286.
[6] Harsupreet Kaur, Sneha Kabra, Simrata Bindra, Subhasis Haldar, R.S. Gupta" Impact of graded channel (GC) design in fully depleted cylindrical/surrounding gate MOSFET (FD CGT/SGT) for improved short channel immunity and hot carrier reliability" Solid-State Electronics 51 (2007) 398-404.
[7] Abhinav Kranti , Subhasis Haldar , R.S. Gupta "An accurate 2D analytical model for short channel thin ®lm fully depleted cylindrical/surrounding gate (CGT/SGT) MOSFET" Microelectronics Journal 32 (2001) 305┬▒313.
[8] C. H. Chen and M. J. Deen, "Channel noise modeling of deep submicron MOSFETs," IEEE Trans. Electron Devices, vol. 49, pp. 1484-1487, Aug. 2002.
[9] B. J. Sheu, D. L. Scharfetter, P.-K.Ko, and M.-C. Jeng, "BSIM: Berkeley short-channel IGFET model for MOS transistors," IEEE J. Solid-State Circuits, vol. SC-22, pp. 558-566, Aug. 1987.
[10] F. M. Klaassen and J. Prins, "Thermal noise of MOS transistors," Philips J. Res., vol. 22, pp. 504-514, 1967.
[11] C.G Sodini, P.K.KO, and J.L Moll," The effect of high fields on MOS devices and circuit performance" ,IEEE Trans. Electron Devices,vol.ED-31,pp.1386-1393,oct.1984