%0 Journal Article
	%A Doshi N. A. and  Dhobale S. B. and  Kakade S. R.
	%D 2008
	%J International Journal of Computer and Information Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 24, 2008
	%T LFSR Counter Implementation in CMOS VLSI
	%U https://publications.waset.org/pdf/4463
	%V 24
	%X As chip manufacturing technology is suddenly on the
threshold of major evaluation, which shrinks chip in size and
performance, LFSR (Linear Feedback Shift Register) is implemented
in layout level which develops the low power consumption chip,
using recent CMOS, sub-micrometer layout tools. Thus LFSR
counter can be a new trend setter in cryptography and is also
beneficial as compared to GRAY & BINARY counter and variety of
other applications.
This paper compares 3 architectures in terms of the hardware
implementation, CMOS layout and power consumption, using
Microwind CMOS layout tool. Thus it provides solution to a low
power architecture implementation of LFSR in CMOS VLSI.
	%P 4278 - 4282