@article{(Open Science Index):https://publications.waset.org/pdf/1588,
	  title     = {A high Speed 8 Transistor Full Adder Design Using Novel 3 Transistor XOR Gates},
	  author    = {Shubhajit Roy Chowdhury and  Aritra Banerjee and  Aniruddha Roy and  Hiranmay Saha},
	  country	= {},
	  institution	= {},
	  abstract     = {The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been investigated using 0.15um and 0.35um technologies. Compared to the earlier designed 10 transistor full adder, the proposed adder shows a significant improvement in silicon area and power delay product. The whole simulation has been carried out using HSPICE.
},
	    journal   = {International Journal of Electronics and Communication Engineering},
	  volume    = {2},
	  number    = {10},
	  year      = {2008},
	  pages     = {2244 - 2250},
	  ee        = {https://publications.waset.org/pdf/1588},
	  url   	= {https://publications.waset.org/vol/22},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 22, 2008},
	}