@article{(Open Science Index):https://publications.waset.org/pdf/10306,
	  title     = {Development of Manufacturing Simulation Model for Semiconductor Fabrication},
	  author    = {Syahril Ridzuan Ab Rahim and  Ibrahim Ahmad and  Mohd Azizi Chik and  Ahmad Zafir Md. Rejab and  and
U. Hashim},
	  country	= {},
	  institution	= {},
	  abstract     = {This research presents the development of simulation
modeling for WIP management in semiconductor fabrication.
Manufacturing simulation modeling is needed for productivity
optimization analysis due to the complex process flows involved
more than 35 percent re-entrance processing steps more than 15 times
at same equipment. Furthermore, semiconductor fabrication required
to produce high product mixed with total processing steps varies from
300 to 800 steps and cycle time between 30 to 70 days. Besides the
complexity, expansive wafer cost that potentially impact the
company profits margin once miss due date is another motivation to
explore options to experiment any analysis using simulation
modeling. In this paper, the simulation model is developed using
existing commercial software platform AutoSched AP, with
customized integration with Manufacturing Execution Systems
(MES) and Advanced Productivity Family (APF) for data collections
used to configure the model parameters and data source. Model
parameters such as processing steps cycle time, equipment
performance, handling time, efficiency of operator are collected
through this customization. Once the parameters are validated, few
customizations are made to ensure the prior model is executed. The
accuracy for the simulation model is validated with the actual output
per day for all equipments. The comparison analysis from result of
the simulation model compared to actual for achieved 95 percent
accuracy for 30 days. This model later was used to perform various
what if analysis to understand impacts on cycle time and overall
output. By using this simulation model, complex manufacturing
environment like semiconductor fabrication (fab) now have
alternative source of validation for any new requirements impact
analysis.},
	    journal   = {International Journal of Computer and Systems Engineering},
	  volume    = {7},
	  number    = {2},
	  year      = {2013},
	  pages     = {202 - 206},
	  ee        = {https://publications.waset.org/pdf/10306},
	  url   	= {https://publications.waset.org/vol/74},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 74, 2013},
	}